| Message ID | 20180110052048.4425-1-peng.fan@nxp.com |
|---|---|
| Headers | show |
| Series | imx: add i.MX8M support and i.MX8MQ EVK | expand |
Hi Peng, 2018-01-10 3:20 GMT-02:00 Peng Fan <peng.fan@nxp.com>: > This patchset is to add i.MX8M and i.MX8MQ-EVK support > > V5: > Drop wait_mask_set/clr_timeout and switch to use readl_poll_timeout in > the patchset. > > V4: > Regenerate patchset based on Tom's master tree. > In this patchset, https://patchwork.ozlabs.org/patch/855027/ > "arm: imx: Rework i.MX specific commands to be excluded from SPL" from > Tom is included to avoid merge conflicts because the i.mx8m change > also has some modification to bootaux and arch/arm/mach-imx/Makefile. > Because CONFIG_GPT_TIMER change, I did a small modification to apply > Tom's patch, no function change. > > Include ATF link in README. > > V3: > This patchset based on https://patchwork.ozlabs.org/patch/855027/ > "arm: imx: Rework i.MX specific commands to be excluded from SPL" from > Tom to avoid this patchset fail apply after Tom's patch merged. > > Previously "power: pmic/regulator allow dm be omited by SPL" broke other > boards, in V3 patchset, only touch pfuze100 related options. > > Sharing code about get mac from fuse between mx7/mx8m > Sharing code about bootaux between mx6/7/mx8m > Sharing code about cpu speed grade between mx7/mx8m > Sharing code about get boot device between mx7/mx8m > Sharding code about mmc env between mx7/mx8m > > Introduce wait_mask_set/clr_timeout to avoid deadloop in clock pll configuration > > Correct authorship of fix building warning on fec arm64, patch 27/31. > > Switch to use structure for DDR Controller. For DDR PHY registers, > there are about more than 10 thousands registers, I could not convert > them with detailed register name, and the script is generated from IC team, > So I use regs[0xxxxx] arrays here fo easily converting between IC team > released script and uboot ddr phy cod. > > Improve REAMME file to include where to download firmware and imx-mkimage > and how to build > > Add review tags on the V2 patchset. > > Hope this patchset could catch up next release :) > > V2: > > patch 02/23: convert to structure, drop is_boot_from_usb and > disconnect_from_usb > patch 04/23: conver to use structure for the clock driver, removed the > CCM_xxx macros. Add static for local functons. > Add init_usdhc_clk, init_uart_clk and etc to not enable > them all at default. > patch 05/23: Add more commit msg for the sip part. > patch 08/23: Merge the spl boot device with i.MX7 > patch 12/23: Typo fix and return error fix from Heiko for the SoC related part > patch 22/23: Use a weak function ddr_init. If patch 23/23 could not be > accepted at current stage, to make others still be could be > compiled. > > The patchset depends on > https://patchwork.ozlabs.org/patch/841934/ > https://patchwork.ozlabs.org/patch/841958/ > to be tested on real hardware. > > V1: > > patch: "power: pmic.h: include dm/ofnode.h" and > "power: pmic/regulator allow dm be omited by SPL" is previously reviewed > in mailist to not merged. If no issue, you may pick it up. > > The board support is a large patch because of the ddr related code. > If it is not good, please first review/pick-up other patches if they > are ok. > > > > Peng Fan (29): > imx: add i.MX8M into Kconfig > imx: mx8m: add register definition header file > imx: mx8m: add pin header file > imx: mx8m: add clock driver > imx: add sip function > imx: boot_mode: add USB_BOOT entry > imx: cpu: update cpu file to support i.MX8M > imx: spl: implement spl_boot_device for i.MX8M > imx: add i.MX8MQ SoC Revision and is_mx8m helper > imx: add pad settings bit definition for i.MX8M > imx: cpu: move speed/temp to common cpu > imx: cpu: add cpu speed/grade for i.MX8M > imx: refactor imx_get_mac_from_fuse > imx: cleanup bootaux > imx: bootaux: support i.MX8M > imx: mx7: move get_boot_device to cpu.c > imx: cpu: support get_boot_device for i.MX8M > imx: mx7: move mmc env code to mmc_env.c > imx: mx8m: add soc related settings and files > imx: makefile: compile files for i.MX8M > misc: ocotp: add i.MX8M support > mmc: fsl_esdhc: support i.MX8M > imx: lcdif: include i.MX8M > gpio: mxc: add i.MX8M support > net: fec: do not access reserved register for i.MX8M > imx: imx8mq: add dtsi file > power: pmic/regulator allow dm be omitted by SPL > imx: mx8m: add ddr controller memory map > imx: add i.MX8MQ EVK support > > Tom Rini (1): > arm: imx: Rework i.MX specific commands to be excluded from SPL Thanks for your V5 patches, this time I had no problem on compiling it. But, even following your README step by step, the U-Boot hangs completely on this point: U-Boot SPL 2018.01-00038-gb464677cc7 (Jan 10 2018 - 09:50:45) PMIC: PFUZE100 ID=0x10 PMU message timeout Normal Boot Trying to boot from MMC2 Do you know how to solve it? If so, please add this information on the README file. Thanks, Diego
Hi Diego, On Wed, Jan 10, 2018 at 11:08:54AM -0200, Diego Dorta wrote: >Hi Peng, > >2018-01-10 3:20 GMT-02:00 Peng Fan <peng.fan@nxp.com>: >> This patchset is to add i.MX8M and i.MX8MQ-EVK support >> >> V5: >> Drop wait_mask_set/clr_timeout and switch to use readl_poll_timeout in >> the patchset. >> >> V4: >> Regenerate patchset based on Tom's master tree. >> In this patchset, https://patchwork.ozlabs.org/patch/855027/ >> "arm: imx: Rework i.MX specific commands to be excluded from SPL" from >> Tom is included to avoid merge conflicts because the i.mx8m change >> also has some modification to bootaux and arch/arm/mach-imx/Makefile. >> Because CONFIG_GPT_TIMER change, I did a small modification to apply >> Tom's patch, no function change. >> >> Include ATF link in README. >> >> V3: >> This patchset based on https://patchwork.ozlabs.org/patch/855027/ >> "arm: imx: Rework i.MX specific commands to be excluded from SPL" from >> Tom to avoid this patchset fail apply after Tom's patch merged. >> >> Previously "power: pmic/regulator allow dm be omited by SPL" broke other >> boards, in V3 patchset, only touch pfuze100 related options. >> >> Sharing code about get mac from fuse between mx7/mx8m >> Sharing code about bootaux between mx6/7/mx8m >> Sharing code about cpu speed grade between mx7/mx8m >> Sharing code about get boot device between mx7/mx8m >> Sharding code about mmc env between mx7/mx8m >> >> Introduce wait_mask_set/clr_timeout to avoid deadloop in clock pll configuration >> >> Correct authorship of fix building warning on fec arm64, patch 27/31. >> >> Switch to use structure for DDR Controller. For DDR PHY registers, >> there are about more than 10 thousands registers, I could not convert >> them with detailed register name, and the script is generated from IC team, >> So I use regs[0xxxxx] arrays here fo easily converting between IC team >> released script and uboot ddr phy cod. >> >> Improve REAMME file to include where to download firmware and imx-mkimage >> and how to build >> >> Add review tags on the V2 patchset. >> >> Hope this patchset could catch up next release :) >> >> V2: >> >> patch 02/23: convert to structure, drop is_boot_from_usb and >> disconnect_from_usb >> patch 04/23: conver to use structure for the clock driver, removed the >> CCM_xxx macros. Add static for local functons. >> Add init_usdhc_clk, init_uart_clk and etc to not enable >> them all at default. >> patch 05/23: Add more commit msg for the sip part. >> patch 08/23: Merge the spl boot device with i.MX7 >> patch 12/23: Typo fix and return error fix from Heiko for the SoC related part >> patch 22/23: Use a weak function ddr_init. If patch 23/23 could not be >> accepted at current stage, to make others still be could be >> compiled. >> >> The patchset depends on >> https://patchwork.ozlabs.org/patch/841934/ >> https://patchwork.ozlabs.org/patch/841958/ >> to be tested on real hardware. >> >> V1: >> >> patch: "power: pmic.h: include dm/ofnode.h" and >> "power: pmic/regulator allow dm be omited by SPL" is previously reviewed >> in mailist to not merged. If no issue, you may pick it up. >> >> The board support is a large patch because of the ddr related code. >> If it is not good, please first review/pick-up other patches if they >> are ok. >> >> >> >> Peng Fan (29): >> imx: add i.MX8M into Kconfig >> imx: mx8m: add register definition header file >> imx: mx8m: add pin header file >> imx: mx8m: add clock driver >> imx: add sip function >> imx: boot_mode: add USB_BOOT entry >> imx: cpu: update cpu file to support i.MX8M >> imx: spl: implement spl_boot_device for i.MX8M >> imx: add i.MX8MQ SoC Revision and is_mx8m helper >> imx: add pad settings bit definition for i.MX8M >> imx: cpu: move speed/temp to common cpu >> imx: cpu: add cpu speed/grade for i.MX8M >> imx: refactor imx_get_mac_from_fuse >> imx: cleanup bootaux >> imx: bootaux: support i.MX8M >> imx: mx7: move get_boot_device to cpu.c >> imx: cpu: support get_boot_device for i.MX8M >> imx: mx7: move mmc env code to mmc_env.c >> imx: mx8m: add soc related settings and files >> imx: makefile: compile files for i.MX8M >> misc: ocotp: add i.MX8M support >> mmc: fsl_esdhc: support i.MX8M >> imx: lcdif: include i.MX8M >> gpio: mxc: add i.MX8M support >> net: fec: do not access reserved register for i.MX8M >> imx: imx8mq: add dtsi file >> power: pmic/regulator allow dm be omitted by SPL >> imx: mx8m: add ddr controller memory map >> imx: add i.MX8MQ EVK support >> >> Tom Rini (1): >> arm: imx: Rework i.MX specific commands to be excluded from SPL > >Thanks for your V5 patches, this time I had no problem on compiling it. > >But, even following your README step by step, the U-Boot hangs >completely on this point: > >U-Boot SPL 2018.01-00038-gb464677cc7 (Jan 10 2018 - 09:50:45) >PMIC: PFUZE100 ID=0x10 >PMU message timeout Seems needs larger time wait. Could you try static inline void poll_pmu_message_ready(void) { int ret; u32 val; /* * When BIT0 set to 0, the PMU has a message for the user * 10ms seems not enough for poll message, so use 1s here. */ ret = readl_poll_timeout(®s->reg[0xd0004], val, !(val & BIT(0)), 1000000); --> Change 1000000 to 0? if (ret) puts("PMU message timeout\n"); } in board/freescale/mx8mq_evk/ddr/ddrphy_train.c Not sure you are using latest B0 chip or not. I'll wait for comments before sending new version patchset. Thanks, Peng. >Normal Boot >Trying to boot from MMC2 > >Do you know how to solve it? If so, please add this information on the >README file. > >Thanks, >Diego >_______________________________________________ >U-Boot mailing list >U-Boot@lists.denx.de >https://lists.denx.de/listinfo/u-boot
Hi Peng, 2018-01-10 23:16 GMT-02:00 Peng Fan <van.freenix@gmail.com>: > Hi Diego, > > On Wed, Jan 10, 2018 at 11:08:54AM -0200, Diego Dorta wrote: >>Hi Peng, >> >>2018-01-10 3:20 GMT-02:00 Peng Fan <peng.fan@nxp.com>: >>> This patchset is to add i.MX8M and i.MX8MQ-EVK support >>> >>> V5: >>> Drop wait_mask_set/clr_timeout and switch to use readl_poll_timeout in >>> the patchset. >>> >>> V4: >>> Regenerate patchset based on Tom's master tree. >>> In this patchset, https://patchwork.ozlabs.org/patch/855027/ >>> "arm: imx: Rework i.MX specific commands to be excluded from SPL" from >>> Tom is included to avoid merge conflicts because the i.mx8m change >>> also has some modification to bootaux and arch/arm/mach-imx/Makefile. >>> Because CONFIG_GPT_TIMER change, I did a small modification to apply >>> Tom's patch, no function change. >>> >>> Include ATF link in README. >>> >>> V3: >>> This patchset based on https://patchwork.ozlabs.org/patch/855027/ >>> "arm: imx: Rework i.MX specific commands to be excluded from SPL" from >>> Tom to avoid this patchset fail apply after Tom's patch merged. >>> >>> Previously "power: pmic/regulator allow dm be omited by SPL" broke other >>> boards, in V3 patchset, only touch pfuze100 related options. >>> >>> Sharing code about get mac from fuse between mx7/mx8m >>> Sharing code about bootaux between mx6/7/mx8m >>> Sharing code about cpu speed grade between mx7/mx8m >>> Sharing code about get boot device between mx7/mx8m >>> Sharding code about mmc env between mx7/mx8m >>> >>> Introduce wait_mask_set/clr_timeout to avoid deadloop in clock pll configuration >>> >>> Correct authorship of fix building warning on fec arm64, patch 27/31. >>> >>> Switch to use structure for DDR Controller. For DDR PHY registers, >>> there are about more than 10 thousands registers, I could not convert >>> them with detailed register name, and the script is generated from IC team, >>> So I use regs[0xxxxx] arrays here fo easily converting between IC team >>> released script and uboot ddr phy cod. >>> >>> Improve REAMME file to include where to download firmware and imx-mkimage >>> and how to build >>> >>> Add review tags on the V2 patchset. >>> >>> Hope this patchset could catch up next release :) >>> >>> V2: >>> >>> patch 02/23: convert to structure, drop is_boot_from_usb and >>> disconnect_from_usb >>> patch 04/23: conver to use structure for the clock driver, removed the >>> CCM_xxx macros. Add static for local functons. >>> Add init_usdhc_clk, init_uart_clk and etc to not enable >>> them all at default. >>> patch 05/23: Add more commit msg for the sip part. >>> patch 08/23: Merge the spl boot device with i.MX7 >>> patch 12/23: Typo fix and return error fix from Heiko for the SoC related part >>> patch 22/23: Use a weak function ddr_init. If patch 23/23 could not be >>> accepted at current stage, to make others still be could be >>> compiled. >>> >>> The patchset depends on >>> https://patchwork.ozlabs.org/patch/841934/ >>> https://patchwork.ozlabs.org/patch/841958/ >>> to be tested on real hardware. >>> >>> V1: >>> >>> patch: "power: pmic.h: include dm/ofnode.h" and >>> "power: pmic/regulator allow dm be omited by SPL" is previously reviewed >>> in mailist to not merged. If no issue, you may pick it up. >>> >>> The board support is a large patch because of the ddr related code. >>> If it is not good, please first review/pick-up other patches if they >>> are ok. >>> >>> >>> >>> Peng Fan (29): >>> imx: add i.MX8M into Kconfig >>> imx: mx8m: add register definition header file >>> imx: mx8m: add pin header file >>> imx: mx8m: add clock driver >>> imx: add sip function >>> imx: boot_mode: add USB_BOOT entry >>> imx: cpu: update cpu file to support i.MX8M >>> imx: spl: implement spl_boot_device for i.MX8M >>> imx: add i.MX8MQ SoC Revision and is_mx8m helper >>> imx: add pad settings bit definition for i.MX8M >>> imx: cpu: move speed/temp to common cpu >>> imx: cpu: add cpu speed/grade for i.MX8M >>> imx: refactor imx_get_mac_from_fuse >>> imx: cleanup bootaux >>> imx: bootaux: support i.MX8M >>> imx: mx7: move get_boot_device to cpu.c >>> imx: cpu: support get_boot_device for i.MX8M >>> imx: mx7: move mmc env code to mmc_env.c >>> imx: mx8m: add soc related settings and files >>> imx: makefile: compile files for i.MX8M >>> misc: ocotp: add i.MX8M support >>> mmc: fsl_esdhc: support i.MX8M >>> imx: lcdif: include i.MX8M >>> gpio: mxc: add i.MX8M support >>> net: fec: do not access reserved register for i.MX8M >>> imx: imx8mq: add dtsi file >>> power: pmic/regulator allow dm be omitted by SPL >>> imx: mx8m: add ddr controller memory map >>> imx: add i.MX8MQ EVK support >>> >>> Tom Rini (1): >>> arm: imx: Rework i.MX specific commands to be excluded from SPL >> >>Thanks for your V5 patches, this time I had no problem on compiling it. >> >>But, even following your README step by step, the U-Boot hangs >>completely on this point: >> >>U-Boot SPL 2018.01-00038-gb464677cc7 (Jan 10 2018 - 09:50:45) >>PMIC: PFUZE100 ID=0x10 >>PMU message timeout > > Seems needs larger time wait. > Could you try > static inline void poll_pmu_message_ready(void) > { > int ret; > u32 val; > > /* > * When BIT0 set to 0, the PMU has a message for the user > * 10ms seems not enough for poll message, so use 1s here. > */ > ret = readl_poll_timeout(®s->reg[0xd0004], val, > !(val & BIT(0)), 1000000); --> Change 1000000 to 0? > if (ret) > puts("PMU message timeout\n"); > } > I've just tested your suggestion and this time the U-Boot hangs it before: U-Boot SPL 2018.01-00038-gb464677cc7-dirty (Jan 11 2018 - 10:20:13) PMIC: PFUZE100 ID=0x10 > in board/freescale/mx8mq_evk/ddr/ddrphy_train.c > Not sure you are using latest B0 chip or not. > I only have the A0 chip, can you test on this one? > I'll wait for comments before sending new version patchset. > > Thanks, > Peng. > >>Normal Boot >>Trying to boot from MMC2 >> >>Do you know how to solve it? If so, please add this information on the >>README file. >> >>Thanks, >>Diego Thanks, Diego
Hi Diego, On Thu, Jan 11, 2018 at 10:36:02AM -0200, Diego Dorta wrote: >Hi Peng, > >2018-01-10 23:16 GMT-02:00 Peng Fan <van.freenix@gmail.com>: >> Hi Diego, >> >> On Wed, Jan 10, 2018 at 11:08:54AM -0200, Diego Dorta wrote: >>>Hi Peng, >>> >>>2018-01-10 3:20 GMT-02:00 Peng Fan <peng.fan@nxp.com>: >>>> This patchset is to add i.MX8M and i.MX8MQ-EVK support >>>> >>>> V5: >>>> Drop wait_mask_set/clr_timeout and switch to use readl_poll_timeout in >>>> the patchset. >>>> >>>> V4: >>>> Regenerate patchset based on Tom's master tree. >>>> In this patchset, https://patchwork.ozlabs.org/patch/855027/ >>>> "arm: imx: Rework i.MX specific commands to be excluded from SPL" from >>>> Tom is included to avoid merge conflicts because the i.mx8m change >>>> also has some modification to bootaux and arch/arm/mach-imx/Makefile. >>>> Because CONFIG_GPT_TIMER change, I did a small modification to apply >>>> Tom's patch, no function change. >>>> >>>> Include ATF link in README. >>>> >>>> V3: >>>> This patchset based on https://patchwork.ozlabs.org/patch/855027/ >>>> "arm: imx: Rework i.MX specific commands to be excluded from SPL" from >>>> Tom to avoid this patchset fail apply after Tom's patch merged. >>>> >>>> Previously "power: pmic/regulator allow dm be omited by SPL" broke other >>>> boards, in V3 patchset, only touch pfuze100 related options. >>>> >>>> Sharing code about get mac from fuse between mx7/mx8m >>>> Sharing code about bootaux between mx6/7/mx8m >>>> Sharing code about cpu speed grade between mx7/mx8m >>>> Sharing code about get boot device between mx7/mx8m >>>> Sharding code about mmc env between mx7/mx8m >>>> >>>> Introduce wait_mask_set/clr_timeout to avoid deadloop in clock pll configuration >>>> >>>> Correct authorship of fix building warning on fec arm64, patch 27/31. >>>> >>>> Switch to use structure for DDR Controller. For DDR PHY registers, >>>> there are about more than 10 thousands registers, I could not convert >>>> them with detailed register name, and the script is generated from IC team, >>>> So I use regs[0xxxxx] arrays here fo easily converting between IC team >>>> released script and uboot ddr phy cod. >>>> >>>> Improve REAMME file to include where to download firmware and imx-mkimage >>>> and how to build >>>> >>>> Add review tags on the V2 patchset. >>>> >>>> Hope this patchset could catch up next release :) >>>> >>>> V2: >>>> >>>> patch 02/23: convert to structure, drop is_boot_from_usb and >>>> disconnect_from_usb >>>> patch 04/23: conver to use structure for the clock driver, removed the >>>> CCM_xxx macros. Add static for local functons. >>>> Add init_usdhc_clk, init_uart_clk and etc to not enable >>>> them all at default. >>>> patch 05/23: Add more commit msg for the sip part. >>>> patch 08/23: Merge the spl boot device with i.MX7 >>>> patch 12/23: Typo fix and return error fix from Heiko for the SoC related part >>>> patch 22/23: Use a weak function ddr_init. If patch 23/23 could not be >>>> accepted at current stage, to make others still be could be >>>> compiled. >>>> >>>> The patchset depends on >>>> https://patchwork.ozlabs.org/patch/841934/ >>>> https://patchwork.ozlabs.org/patch/841958/ >>>> to be tested on real hardware. >>>> >>>> V1: >>>> >>>> patch: "power: pmic.h: include dm/ofnode.h" and >>>> "power: pmic/regulator allow dm be omited by SPL" is previously reviewed >>>> in mailist to not merged. If no issue, you may pick it up. >>>> >>>> The board support is a large patch because of the ddr related code. >>>> If it is not good, please first review/pick-up other patches if they >>>> are ok. >>>> >>>> >>>> >>>> Peng Fan (29): >>>> imx: add i.MX8M into Kconfig >>>> imx: mx8m: add register definition header file >>>> imx: mx8m: add pin header file >>>> imx: mx8m: add clock driver >>>> imx: add sip function >>>> imx: boot_mode: add USB_BOOT entry >>>> imx: cpu: update cpu file to support i.MX8M >>>> imx: spl: implement spl_boot_device for i.MX8M >>>> imx: add i.MX8MQ SoC Revision and is_mx8m helper >>>> imx: add pad settings bit definition for i.MX8M >>>> imx: cpu: move speed/temp to common cpu >>>> imx: cpu: add cpu speed/grade for i.MX8M >>>> imx: refactor imx_get_mac_from_fuse >>>> imx: cleanup bootaux >>>> imx: bootaux: support i.MX8M >>>> imx: mx7: move get_boot_device to cpu.c >>>> imx: cpu: support get_boot_device for i.MX8M >>>> imx: mx7: move mmc env code to mmc_env.c >>>> imx: mx8m: add soc related settings and files >>>> imx: makefile: compile files for i.MX8M >>>> misc: ocotp: add i.MX8M support >>>> mmc: fsl_esdhc: support i.MX8M >>>> imx: lcdif: include i.MX8M >>>> gpio: mxc: add i.MX8M support >>>> net: fec: do not access reserved register for i.MX8M >>>> imx: imx8mq: add dtsi file >>>> power: pmic/regulator allow dm be omitted by SPL >>>> imx: mx8m: add ddr controller memory map >>>> imx: add i.MX8MQ EVK support >>>> >>>> Tom Rini (1): >>>> arm: imx: Rework i.MX specific commands to be excluded from SPL >>> >>>Thanks for your V5 patches, this time I had no problem on compiling it. >>> >>>But, even following your README step by step, the U-Boot hangs >>>completely on this point: >>> >>>U-Boot SPL 2018.01-00038-gb464677cc7 (Jan 10 2018 - 09:50:45) >>>PMIC: PFUZE100 ID=0x10 >>>PMU message timeout >> >> Seems needs larger time wait. >> Could you try >> static inline void poll_pmu_message_ready(void) >> { >> int ret; >> u32 val; >> >> /* >> * When BIT0 set to 0, the PMU has a message for the user >> * 10ms seems not enough for poll message, so use 1s here. >> */ >> ret = readl_poll_timeout(®s->reg[0xd0004], val, >> !(val & BIT(0)), 1000000); --> Change 1000000 to 0? >> if (ret) >> puts("PMU message timeout\n"); >> } >> > >I've just tested your suggestion and this time the U-Boot hangs it before: > >U-Boot SPL 2018.01-00038-gb464677cc7-dirty (Jan 11 2018 - 10:20:13) >PMIC: PFUZE100 ID=0x10 > > >> in board/freescale/mx8mq_evk/ddr/ddrphy_train.c >> Not sure you are using latest B0 chip or not. >> > >I only have the A0 chip, can you test on this one? I test the patchset on my A0 board, it works. But I still suggest using board with B0 chip. Thanks, Peng > >> I'll wait for comments before sending new version patchset. >> >> Thanks, >> Peng. >> >>>Normal Boot >>>Trying to boot from MMC2 >>> >>>Do you know how to solve it? If so, please add this information on the >>>README file. >>> >>>Thanks, >>>Diego > >Thanks, >Diego
Hi Peng, 2018-01-13 8:55 GMT-02:00 Peng Fan <van.freenix@gmail.com>: > Hi Diego, > On Thu, Jan 11, 2018 at 10:36:02AM -0200, Diego Dorta wrote: >>Hi Peng, >> >>2018-01-10 23:16 GMT-02:00 Peng Fan <van.freenix@gmail.com>: >>> Hi Diego, >>> >>> On Wed, Jan 10, 2018 at 11:08:54AM -0200, Diego Dorta wrote: >>>>Hi Peng, >>>> >>>>2018-01-10 3:20 GMT-02:00 Peng Fan <peng.fan@nxp.com>: >>>>> This patchset is to add i.MX8M and i.MX8MQ-EVK support >>>>> >>>>> V5: >>>>> Drop wait_mask_set/clr_timeout and switch to use readl_poll_timeout in >>>>> the patchset. >>>>> >>>>> V4: >>>>> Regenerate patchset based on Tom's master tree. >>>>> In this patchset, https://patchwork.ozlabs.org/patch/855027/ >>>>> "arm: imx: Rework i.MX specific commands to be excluded from SPL" from >>>>> Tom is included to avoid merge conflicts because the i.mx8m change >>>>> also has some modification to bootaux and arch/arm/mach-imx/Makefile. >>>>> Because CONFIG_GPT_TIMER change, I did a small modification to apply >>>>> Tom's patch, no function change. >>>>> >>>>> Include ATF link in README. >>>>> >>>>> V3: >>>>> This patchset based on https://patchwork.ozlabs.org/patch/855027/ >>>>> "arm: imx: Rework i.MX specific commands to be excluded from SPL" from >>>>> Tom to avoid this patchset fail apply after Tom's patch merged. >>>>> >>>>> Previously "power: pmic/regulator allow dm be omited by SPL" broke other >>>>> boards, in V3 patchset, only touch pfuze100 related options. >>>>> >>>>> Sharing code about get mac from fuse between mx7/mx8m >>>>> Sharing code about bootaux between mx6/7/mx8m >>>>> Sharing code about cpu speed grade between mx7/mx8m >>>>> Sharing code about get boot device between mx7/mx8m >>>>> Sharding code about mmc env between mx7/mx8m >>>>> >>>>> Introduce wait_mask_set/clr_timeout to avoid deadloop in clock pll configuration >>>>> >>>>> Correct authorship of fix building warning on fec arm64, patch 27/31. >>>>> >>>>> Switch to use structure for DDR Controller. For DDR PHY registers, >>>>> there are about more than 10 thousands registers, I could not convert >>>>> them with detailed register name, and the script is generated from IC team, >>>>> So I use regs[0xxxxx] arrays here fo easily converting between IC team >>>>> released script and uboot ddr phy cod. >>>>> >>>>> Improve REAMME file to include where to download firmware and imx-mkimage >>>>> and how to build >>>>> >>>>> Add review tags on the V2 patchset. >>>>> >>>>> Hope this patchset could catch up next release :) >>>>> >>>>> V2: >>>>> >>>>> patch 02/23: convert to structure, drop is_boot_from_usb and >>>>> disconnect_from_usb >>>>> patch 04/23: conver to use structure for the clock driver, removed the >>>>> CCM_xxx macros. Add static for local functons. >>>>> Add init_usdhc_clk, init_uart_clk and etc to not enable >>>>> them all at default. >>>>> patch 05/23: Add more commit msg for the sip part. >>>>> patch 08/23: Merge the spl boot device with i.MX7 >>>>> patch 12/23: Typo fix and return error fix from Heiko for the SoC related part >>>>> patch 22/23: Use a weak function ddr_init. If patch 23/23 could not be >>>>> accepted at current stage, to make others still be could be >>>>> compiled. >>>>> >>>>> The patchset depends on >>>>> https://patchwork.ozlabs.org/patch/841934/ >>>>> https://patchwork.ozlabs.org/patch/841958/ >>>>> to be tested on real hardware. >>>>> >>>>> V1: >>>>> >>>>> patch: "power: pmic.h: include dm/ofnode.h" and >>>>> "power: pmic/regulator allow dm be omited by SPL" is previously reviewed >>>>> in mailist to not merged. If no issue, you may pick it up. >>>>> >>>>> The board support is a large patch because of the ddr related code. >>>>> If it is not good, please first review/pick-up other patches if they >>>>> are ok. >>>>> >>>>> >>>>> >>>>> Peng Fan (29): >>>>> imx: add i.MX8M into Kconfig >>>>> imx: mx8m: add register definition header file >>>>> imx: mx8m: add pin header file >>>>> imx: mx8m: add clock driver >>>>> imx: add sip function >>>>> imx: boot_mode: add USB_BOOT entry >>>>> imx: cpu: update cpu file to support i.MX8M >>>>> imx: spl: implement spl_boot_device for i.MX8M >>>>> imx: add i.MX8MQ SoC Revision and is_mx8m helper >>>>> imx: add pad settings bit definition for i.MX8M >>>>> imx: cpu: move speed/temp to common cpu >>>>> imx: cpu: add cpu speed/grade for i.MX8M >>>>> imx: refactor imx_get_mac_from_fuse >>>>> imx: cleanup bootaux >>>>> imx: bootaux: support i.MX8M >>>>> imx: mx7: move get_boot_device to cpu.c >>>>> imx: cpu: support get_boot_device for i.MX8M >>>>> imx: mx7: move mmc env code to mmc_env.c >>>>> imx: mx8m: add soc related settings and files >>>>> imx: makefile: compile files for i.MX8M >>>>> misc: ocotp: add i.MX8M support >>>>> mmc: fsl_esdhc: support i.MX8M >>>>> imx: lcdif: include i.MX8M >>>>> gpio: mxc: add i.MX8M support >>>>> net: fec: do not access reserved register for i.MX8M >>>>> imx: imx8mq: add dtsi file >>>>> power: pmic/regulator allow dm be omitted by SPL >>>>> imx: mx8m: add ddr controller memory map >>>>> imx: add i.MX8MQ EVK support >>>>> >>>>> Tom Rini (1): >>>>> arm: imx: Rework i.MX specific commands to be excluded from SPL >>>> >>>>Thanks for your V5 patches, this time I had no problem on compiling it. >>>> >>>>But, even following your README step by step, the U-Boot hangs >>>>completely on this point: >>>> >>>>U-Boot SPL 2018.01-00038-gb464677cc7 (Jan 10 2018 - 09:50:45) >>>>PMIC: PFUZE100 ID=0x10 >>>>PMU message timeout >>> >>> Seems needs larger time wait. >>> Could you try >>> static inline void poll_pmu_message_ready(void) >>> { >>> int ret; >>> u32 val; >>> >>> /* >>> * When BIT0 set to 0, the PMU has a message for the user >>> * 10ms seems not enough for poll message, so use 1s here. >>> */ >>> ret = readl_poll_timeout(®s->reg[0xd0004], val, >>> !(val & BIT(0)), 1000000); --> Change 1000000 to 0? >>> if (ret) >>> puts("PMU message timeout\n"); >>> } >>> >> >>I've just tested your suggestion and this time the U-Boot hangs it before: >> >>U-Boot SPL 2018.01-00038-gb464677cc7-dirty (Jan 11 2018 - 10:20:13) >>PMIC: PFUZE100 ID=0x10 >> >> >>> in board/freescale/mx8mq_evk/ddr/ddrphy_train.c >>> Not sure you are using latest B0 chip or not. >>> >> >>I only have the A0 chip, can you test on this one? > > I test the patchset on my A0 board, it works. But I still > suggest using board with B0 chip. > It is still not working on my A0 chip. I've enable the debug mode so you can see where it hangs: Training PASS Normal Boot Trying to boot from MMC2 spl: mmc boot mode: raw hdr read sector 300, count=1 spl: payload image: Second uimage loader load addr: 0x40000fc0 size: 632345 read 4d4 sectors to 40000fc0 Jumping to U-Boot loaded - jumping to U-Boot... image entry point: 0x40001000 Unfortunately we do not have here the B0 chip. Can you solve the problem with this log? Thanks, Diego > Thanks, > Peng > >> >>> I'll wait for comments before sending new version patchset. >>> >>> Thanks, >>> Peng. >>> >>>>Normal Boot >>>>Trying to boot from MMC2 >>>> >>>>Do you know how to solve it? If so, please add this information on the >>>>README file. >>>> >>>>Thanks, >>>>Diego >> >>Thanks, >>Diego > > --
> -----Original Message----- > From: Diego Dorta [mailto:diegohdorta@gmail.com] > Sent: Tuesday, January 16, 2018 8:15 PM > To: Peng Fan <van.freenix@gmail.com> > Cc: Peng Fan <peng.fan@nxp.com>; Fabio Estevam > <fabio.estevam@nxp.com>; U-Boot-Denx <u-boot@lists.denx.de> > Subject: Re: [U-Boot] [PATCH V5 00/31] imx: add i.MX8M support and > i.MX8MQ EVK > > Hi Peng, > > 2018-01-13 8:55 GMT-02:00 Peng Fan <van.freenix@gmail.com>: > > Hi Diego, > > On Thu, Jan 11, 2018 at 10:36:02AM -0200, Diego Dorta wrote: > >>Hi Peng, > >> > >>2018-01-10 23:16 GMT-02:00 Peng Fan <van.freenix@gmail.com>: > >>> Hi Diego, > >>> > >>> On Wed, Jan 10, 2018 at 11:08:54AM -0200, Diego Dorta wrote: > >>>>Hi Peng, > >>>> > >>>>2018-01-10 3:20 GMT-02:00 Peng Fan <peng.fan@nxp.com>: > >>>>> This patchset is to add i.MX8M and i.MX8MQ-EVK support > >>>>> > >>>>> V5: > >>>>> Drop wait_mask_set/clr_timeout and switch to use > >>>>> readl_poll_timeout in the patchset. > >>>>> > >>>>> V4: > >>>>> Regenerate patchset based on Tom's master tree. > >>>>> In this patchset, > >>>>> > https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2 > >>>>> > Fpatchwork.ozlabs.org%2Fpatch%2F855027%2F&data=02%7C01%7Cpeng.fan% > >>>>> > 40nxp.com%7C7ff0a80d79454c1eb43608d55cdad59d%7C686ea1d3bc2b4c6fa92 > >>>>> > cd99c5c301635%7C0%7C1%7C636517017329353990&sdata=ukU9u%2B99GtYbM > Pu > >>>>> 1F18ZK2FvUpwWJI5ge4Hb607OPMk%3D&reserved=0 > >>>>> "arm: imx: Rework i.MX specific commands to be excluded from SPL" > >>>>> from Tom is included to avoid merge conflicts because the i.mx8m > >>>>> change also has some modification to bootaux and arch/arm/mach- > imx/Makefile. > >>>>> Because CONFIG_GPT_TIMER change, I did a small modification to > >>>>> apply Tom's patch, no function change. > >>>>> > >>>>> Include ATF link in README. > >>>>> > >>>>> V3: > >>>>> This patchset based on > >>>>> > https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2 > >>>>> > Fpatchwork.ozlabs.org%2Fpatch%2F855027%2F&data=02%7C01%7Cpeng.fan% > >>>>> > 40nxp.com%7C7ff0a80d79454c1eb43608d55cdad59d%7C686ea1d3bc2b4c6fa92 > >>>>> > cd99c5c301635%7C0%7C1%7C636517017329353990&sdata=ukU9u%2B99GtYbM > Pu > >>>>> 1F18ZK2FvUpwWJI5ge4Hb607OPMk%3D&reserved=0 > >>>>> "arm: imx: Rework i.MX specific commands to be excluded from SPL" > >>>>> from Tom to avoid this patchset fail apply after Tom's patch merged. > >>>>> > >>>>> Previously "power: pmic/regulator allow dm be omited by SPL" > >>>>> broke other boards, in V3 patchset, only touch pfuze100 related options. > >>>>> > >>>>> Sharing code about get mac from fuse between mx7/mx8m Sharing > >>>>> code about bootaux between mx6/7/mx8m Sharing code about cpu > >>>>> speed grade between mx7/mx8m Sharing code about get boot device > >>>>> between mx7/mx8m Sharding code about mmc env between > mx7/mx8m > >>>>> > >>>>> Introduce wait_mask_set/clr_timeout to avoid deadloop in clock > >>>>> pll configuration > >>>>> > >>>>> Correct authorship of fix building warning on fec arm64, patch 27/31. > >>>>> > >>>>> Switch to use structure for DDR Controller. For DDR PHY > >>>>> registers, there are about more than 10 thousands registers, I > >>>>> could not convert them with detailed register name, and the > >>>>> script is generated from IC team, So I use regs[0xxxxx] arrays > >>>>> here fo easily converting between IC team released script and uboot > ddr phy cod. > >>>>> > >>>>> Improve REAMME file to include where to download firmware and > >>>>> imx-mkimage and how to build > >>>>> > >>>>> Add review tags on the V2 patchset. > >>>>> > >>>>> Hope this patchset could catch up next release :) > >>>>> > >>>>> V2: > >>>>> > >>>>> patch 02/23: convert to structure, drop is_boot_from_usb and > >>>>> disconnect_from_usb > >>>>> patch 04/23: conver to use structure for the clock driver, removed the > >>>>> CCM_xxx macros. Add static for local functons. > >>>>> Add init_usdhc_clk, init_uart_clk and etc to not enable > >>>>> them all at default. > >>>>> patch 05/23: Add more commit msg for the sip part. > >>>>> patch 08/23: Merge the spl boot device with i.MX7 patch 12/23: > >>>>> Typo fix and return error fix from Heiko for the SoC related part > >>>>> patch 22/23: Use a weak function ddr_init. If patch 23/23 could not be > >>>>> accepted at current stage, to make others still be could be > >>>>> compiled. > >>>>> > >>>>> The patchset depends on > >>>>> > https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2 > >>>>> > Fpatchwork.ozlabs.org%2Fpatch%2F841934%2F&data=02%7C01%7Cpeng.fan% > >>>>> > 40nxp.com%7C7ff0a80d79454c1eb43608d55cdad59d%7C686ea1d3bc2b4c6fa92 > >>>>> > cd99c5c301635%7C0%7C1%7C636517017329353990&sdata=Il%2F%2Bkzq%2B0G > S > >>>>> TtZMKo1tnVYBFx4rLD1ymPgrbx5Pdj3s%3D&reserved=0 > >>>>> > https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2 > >>>>> > Fpatchwork.ozlabs.org%2Fpatch%2F841958%2F&data=02%7C01%7Cpeng.fan% > >>>>> > 40nxp.com%7C7ff0a80d79454c1eb43608d55cdad59d%7C686ea1d3bc2b4c6fa92 > >>>>> > cd99c5c301635%7C0%7C1%7C636517017329353990&sdata=FLMRWI8K0W6XsijQ > F > >>>>> cD5JSuRcRjtqEgFBJ%2B4F%2FkVS3o%3D&reserved=0 > >>>>> to be tested on real hardware. > >>>>> > >>>>> V1: > >>>>> > >>>>> patch: "power: pmic.h: include dm/ofnode.h" and > >>>>> "power: pmic/regulator allow dm be omited by SPL" is previously > >>>>> reviewed in mailist to not merged. If no issue, you may pick it up. > >>>>> > >>>>> The board support is a large patch because of the ddr related code. > >>>>> If it is not good, please first review/pick-up other patches if > >>>>> they are ok. > >>>>> > >>>>> > >>>>> > >>>>> Peng Fan (29): > >>>>> imx: add i.MX8M into Kconfig > >>>>> imx: mx8m: add register definition header file > >>>>> imx: mx8m: add pin header file > >>>>> imx: mx8m: add clock driver > >>>>> imx: add sip function > >>>>> imx: boot_mode: add USB_BOOT entry > >>>>> imx: cpu: update cpu file to support i.MX8M > >>>>> imx: spl: implement spl_boot_device for i.MX8M > >>>>> imx: add i.MX8MQ SoC Revision and is_mx8m helper > >>>>> imx: add pad settings bit definition for i.MX8M > >>>>> imx: cpu: move speed/temp to common cpu > >>>>> imx: cpu: add cpu speed/grade for i.MX8M > >>>>> imx: refactor imx_get_mac_from_fuse > >>>>> imx: cleanup bootaux > >>>>> imx: bootaux: support i.MX8M > >>>>> imx: mx7: move get_boot_device to cpu.c > >>>>> imx: cpu: support get_boot_device for i.MX8M > >>>>> imx: mx7: move mmc env code to mmc_env.c > >>>>> imx: mx8m: add soc related settings and files > >>>>> imx: makefile: compile files for i.MX8M > >>>>> misc: ocotp: add i.MX8M support > >>>>> mmc: fsl_esdhc: support i.MX8M > >>>>> imx: lcdif: include i.MX8M > >>>>> gpio: mxc: add i.MX8M support > >>>>> net: fec: do not access reserved register for i.MX8M > >>>>> imx: imx8mq: add dtsi file > >>>>> power: pmic/regulator allow dm be omitted by SPL > >>>>> imx: mx8m: add ddr controller memory map > >>>>> imx: add i.MX8MQ EVK support > >>>>> > >>>>> Tom Rini (1): > >>>>> arm: imx: Rework i.MX specific commands to be excluded from SPL > >>>> > >>>>Thanks for your V5 patches, this time I had no problem on compiling it. > >>>> > >>>>But, even following your README step by step, the U-Boot hangs > >>>>completely on this point: > >>>> > >>>>U-Boot SPL 2018.01-00038-gb464677cc7 (Jan 10 2018 - 09:50:45) > >>>>PMIC: PFUZE100 ID=0x10 > >>>>PMU message timeout > >>> > >>> Seems needs larger time wait. > >>> Could you try > >>> static inline void poll_pmu_message_ready(void) { > >>> int ret; > >>> u32 val; > >>> > >>> /* > >>> * When BIT0 set to 0, the PMU has a message for the user > >>> * 10ms seems not enough for poll message, so use 1s here. > >>> */ > >>> ret = readl_poll_timeout(®s->reg[0xd0004], val, > >>> !(val & BIT(0)), 1000000); --> Change 1000000 to 0? > >>> if (ret) > >>> puts("PMU message timeout\n"); } > >>> > >> > >>I've just tested your suggestion and this time the U-Boot hangs it before: > >> > >>U-Boot SPL 2018.01-00038-gb464677cc7-dirty (Jan 11 2018 - 10:20:13) > >>PMIC: PFUZE100 ID=0x10 > >> > >> > >>> in board/freescale/mx8mq_evk/ddr/ddrphy_train.c > >>> Not sure you are using latest B0 chip or not. > >>> > >> > >>I only have the A0 chip, can you test on this one? > > > > I test the patchset on my A0 board, it works. But I still suggest > > using board with B0 chip. > > > > It is still not working on my A0 chip. I've enable the debug mode so you can see > where it hangs: > > Training PASS > Normal Boot > Trying to boot from MMC2 > spl: mmc boot mode: raw > hdr read sector 300, count=1 > spl: payload image: Second uimage loader load addr: 0x40000fc0 size: 632345 > read 4d4 sectors to 40000fc0 Jumping to U-Boot loaded - jumping to U-Boot... > image entry point: 0x40001000 I think the entry point address is not correct. It should be 0x910000 for ATF. You need to check your imx-mkimage. Also for PMU message timeout, You still need to use 0 as the timeout value. Regards, Peng. > > Unfortunately we do not have here the B0 chip. Can you solve the problem > with this log? > > Thanks, > Diego > > > Thanks, > > Peng > > > >> > >>> I'll wait for comments before sending new version patchset. > >>> > >>> Thanks, > >>> Peng. > >>> > >>>>Normal Boot > >>>>Trying to boot from MMC2 > >>>> > >>>>Do you know how to solve it? If so, please add this information on > >>>>the README file. > >>>> > >>>>Thanks, > >>>>Diego > >> > >>Thanks, > >>Diego > > > > --
Hi Peng, 2018-01-16 10:25 GMT-02:00 Peng Fan <peng.fan@nxp.com>: > > >> -----Original Message----- >> From: Diego Dorta [mailto:diegohdorta@gmail.com] >> Sent: Tuesday, January 16, 2018 8:15 PM >> To: Peng Fan <van.freenix@gmail.com> >> Cc: Peng Fan <peng.fan@nxp.com>; Fabio Estevam >> <fabio.estevam@nxp.com>; U-Boot-Denx <u-boot@lists.denx.de> >> Subject: Re: [U-Boot] [PATCH V5 00/31] imx: add i.MX8M support and >> i.MX8MQ EVK >> >> Hi Peng, >> >> 2018-01-13 8:55 GMT-02:00 Peng Fan <van.freenix@gmail.com>: >> > Hi Diego, >> > On Thu, Jan 11, 2018 at 10:36:02AM -0200, Diego Dorta wrote: >> >>Hi Peng, >> >> >> >>2018-01-10 23:16 GMT-02:00 Peng Fan <van.freenix@gmail.com>: >> >>> Hi Diego, >> >>> >> >>> On Wed, Jan 10, 2018 at 11:08:54AM -0200, Diego Dorta wrote: >> >>>>Hi Peng, >> >>>> >> >>>>2018-01-10 3:20 GMT-02:00 Peng Fan <peng.fan@nxp.com>: >> >>>>> This patchset is to add i.MX8M and i.MX8MQ-EVK support >> >>>>> >> >>>>> V5: >> >>>>> Drop wait_mask_set/clr_timeout and switch to use >> >>>>> readl_poll_timeout in the patchset. >> >>>>> >> >>>>> V4: >> >>>>> Regenerate patchset based on Tom's master tree. >> >>>>> In this patchset, >> >>>>> >> https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2 >> >>>>> >> Fpatchwork.ozlabs.org%2Fpatch%2F855027%2F&data=02%7C01%7Cpeng.fan% >> >>>>> >> 40nxp.com%7C7ff0a80d79454c1eb43608d55cdad59d%7C686ea1d3bc2b4c6fa92 >> >>>>> >> cd99c5c301635%7C0%7C1%7C636517017329353990&sdata=ukU9u%2B99GtYbM >> Pu >> >>>>> 1F18ZK2FvUpwWJI5ge4Hb607OPMk%3D&reserved=0 >> >>>>> "arm: imx: Rework i.MX specific commands to be excluded from SPL" >> >>>>> from Tom is included to avoid merge conflicts because the i.mx8m >> >>>>> change also has some modification to bootaux and arch/arm/mach- >> imx/Makefile. >> >>>>> Because CONFIG_GPT_TIMER change, I did a small modification to >> >>>>> apply Tom's patch, no function change. >> >>>>> >> >>>>> Include ATF link in README. >> >>>>> >> >>>>> V3: >> >>>>> This patchset based on >> >>>>> >> https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2 >> >>>>> >> Fpatchwork.ozlabs.org%2Fpatch%2F855027%2F&data=02%7C01%7Cpeng.fan% >> >>>>> >> 40nxp.com%7C7ff0a80d79454c1eb43608d55cdad59d%7C686ea1d3bc2b4c6fa92 >> >>>>> >> cd99c5c301635%7C0%7C1%7C636517017329353990&sdata=ukU9u%2B99GtYbM >> Pu >> >>>>> 1F18ZK2FvUpwWJI5ge4Hb607OPMk%3D&reserved=0 >> >>>>> "arm: imx: Rework i.MX specific commands to be excluded from SPL" >> >>>>> from Tom to avoid this patchset fail apply after Tom's patch merged. >> >>>>> >> >>>>> Previously "power: pmic/regulator allow dm be omited by SPL" >> >>>>> broke other boards, in V3 patchset, only touch pfuze100 related options. >> >>>>> >> >>>>> Sharing code about get mac from fuse between mx7/mx8m Sharing >> >>>>> code about bootaux between mx6/7/mx8m Sharing code about cpu >> >>>>> speed grade between mx7/mx8m Sharing code about get boot device >> >>>>> between mx7/mx8m Sharding code about mmc env between >> mx7/mx8m >> >>>>> >> >>>>> Introduce wait_mask_set/clr_timeout to avoid deadloop in clock >> >>>>> pll configuration >> >>>>> >> >>>>> Correct authorship of fix building warning on fec arm64, patch 27/31. >> >>>>> >> >>>>> Switch to use structure for DDR Controller. For DDR PHY >> >>>>> registers, there are about more than 10 thousands registers, I >> >>>>> could not convert them with detailed register name, and the >> >>>>> script is generated from IC team, So I use regs[0xxxxx] arrays >> >>>>> here fo easily converting between IC team released script and uboot >> ddr phy cod. >> >>>>> >> >>>>> Improve REAMME file to include where to download firmware and >> >>>>> imx-mkimage and how to build >> >>>>> >> >>>>> Add review tags on the V2 patchset. >> >>>>> >> >>>>> Hope this patchset could catch up next release :) >> >>>>> >> >>>>> V2: >> >>>>> >> >>>>> patch 02/23: convert to structure, drop is_boot_from_usb and >> >>>>> disconnect_from_usb >> >>>>> patch 04/23: conver to use structure for the clock driver, removed the >> >>>>> CCM_xxx macros. Add static for local functons. >> >>>>> Add init_usdhc_clk, init_uart_clk and etc to not enable >> >>>>> them all at default. >> >>>>> patch 05/23: Add more commit msg for the sip part. >> >>>>> patch 08/23: Merge the spl boot device with i.MX7 patch 12/23: >> >>>>> Typo fix and return error fix from Heiko for the SoC related part >> >>>>> patch 22/23: Use a weak function ddr_init. If patch 23/23 could not be >> >>>>> accepted at current stage, to make others still be could be >> >>>>> compiled. >> >>>>> >> >>>>> The patchset depends on >> >>>>> >> https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2 >> >>>>> >> Fpatchwork.ozlabs.org%2Fpatch%2F841934%2F&data=02%7C01%7Cpeng.fan% >> >>>>> >> 40nxp.com%7C7ff0a80d79454c1eb43608d55cdad59d%7C686ea1d3bc2b4c6fa92 >> >>>>> >> cd99c5c301635%7C0%7C1%7C636517017329353990&sdata=Il%2F%2Bkzq%2B0G >> S >> >>>>> TtZMKo1tnVYBFx4rLD1ymPgrbx5Pdj3s%3D&reserved=0 >> >>>>> >> https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2 >> >>>>> >> Fpatchwork.ozlabs.org%2Fpatch%2F841958%2F&data=02%7C01%7Cpeng.fan% >> >>>>> >> 40nxp.com%7C7ff0a80d79454c1eb43608d55cdad59d%7C686ea1d3bc2b4c6fa92 >> >>>>> >> cd99c5c301635%7C0%7C1%7C636517017329353990&sdata=FLMRWI8K0W6XsijQ >> F >> >>>>> cD5JSuRcRjtqEgFBJ%2B4F%2FkVS3o%3D&reserved=0 >> >>>>> to be tested on real hardware. >> >>>>> >> >>>>> V1: >> >>>>> >> >>>>> patch: "power: pmic.h: include dm/ofnode.h" and >> >>>>> "power: pmic/regulator allow dm be omited by SPL" is previously >> >>>>> reviewed in mailist to not merged. If no issue, you may pick it up. >> >>>>> >> >>>>> The board support is a large patch because of the ddr related code. >> >>>>> If it is not good, please first review/pick-up other patches if >> >>>>> they are ok. >> >>>>> >> >>>>> >> >>>>> >> >>>>> Peng Fan (29): >> >>>>> imx: add i.MX8M into Kconfig >> >>>>> imx: mx8m: add register definition header file >> >>>>> imx: mx8m: add pin header file >> >>>>> imx: mx8m: add clock driver >> >>>>> imx: add sip function >> >>>>> imx: boot_mode: add USB_BOOT entry >> >>>>> imx: cpu: update cpu file to support i.MX8M >> >>>>> imx: spl: implement spl_boot_device for i.MX8M >> >>>>> imx: add i.MX8MQ SoC Revision and is_mx8m helper >> >>>>> imx: add pad settings bit definition for i.MX8M >> >>>>> imx: cpu: move speed/temp to common cpu >> >>>>> imx: cpu: add cpu speed/grade for i.MX8M >> >>>>> imx: refactor imx_get_mac_from_fuse >> >>>>> imx: cleanup bootaux >> >>>>> imx: bootaux: support i.MX8M >> >>>>> imx: mx7: move get_boot_device to cpu.c >> >>>>> imx: cpu: support get_boot_device for i.MX8M >> >>>>> imx: mx7: move mmc env code to mmc_env.c >> >>>>> imx: mx8m: add soc related settings and files >> >>>>> imx: makefile: compile files for i.MX8M >> >>>>> misc: ocotp: add i.MX8M support >> >>>>> mmc: fsl_esdhc: support i.MX8M >> >>>>> imx: lcdif: include i.MX8M >> >>>>> gpio: mxc: add i.MX8M support >> >>>>> net: fec: do not access reserved register for i.MX8M >> >>>>> imx: imx8mq: add dtsi file >> >>>>> power: pmic/regulator allow dm be omitted by SPL >> >>>>> imx: mx8m: add ddr controller memory map >> >>>>> imx: add i.MX8MQ EVK support >> >>>>> >> >>>>> Tom Rini (1): >> >>>>> arm: imx: Rework i.MX specific commands to be excluded from SPL >> >>>> >> >>>>Thanks for your V5 patches, this time I had no problem on compiling it. >> >>>> >> >>>>But, even following your README step by step, the U-Boot hangs >> >>>>completely on this point: >> >>>> >> >>>>U-Boot SPL 2018.01-00038-gb464677cc7 (Jan 10 2018 - 09:50:45) >> >>>>PMIC: PFUZE100 ID=0x10 >> >>>>PMU message timeout >> >>> >> >>> Seems needs larger time wait. >> >>> Could you try >> >>> static inline void poll_pmu_message_ready(void) { >> >>> int ret; >> >>> u32 val; >> >>> >> >>> /* >> >>> * When BIT0 set to 0, the PMU has a message for the user >> >>> * 10ms seems not enough for poll message, so use 1s here. >> >>> */ >> >>> ret = readl_poll_timeout(®s->reg[0xd0004], val, >> >>> !(val & BIT(0)), 1000000); --> Change 1000000 to 0? >> >>> if (ret) >> >>> puts("PMU message timeout\n"); } >> >>> >> >> >> >>I've just tested your suggestion and this time the U-Boot hangs it before: >> >> >> >>U-Boot SPL 2018.01-00038-gb464677cc7-dirty (Jan 11 2018 - 10:20:13) >> >>PMIC: PFUZE100 ID=0x10 >> >> >> >> >> >>> in board/freescale/mx8mq_evk/ddr/ddrphy_train.c >> >>> Not sure you are using latest B0 chip or not. >> >>> >> >> >> >>I only have the A0 chip, can you test on this one? >> > >> > I test the patchset on my A0 board, it works. But I still suggest >> > using board with B0 chip. >> > >> >> It is still not working on my A0 chip. I've enable the debug mode so you can see >> where it hangs: >> >> Training PASS >> Normal Boot >> Trying to boot from MMC2 >> spl: mmc boot mode: raw >> hdr read sector 300, count=1 >> spl: payload image: Second uimage loader load addr: 0x40000fc0 size: 632345 >> read 4d4 sectors to 40000fc0 Jumping to U-Boot loaded - jumping to U-Boot... >> image entry point: 0x40001000 > > I think the entry point address is not correct. It should be 0x910000 for ATF. I've changed the entry point 0x40001000 to 0x910000 on the imx-mkimage and it worked! However, and I try to boot I got this: U-Boot SPL 2018.01-00038-gb464677cc7-dirty (Jan 17 2018 - 12:44:27) PMIC: PFUZE100 ID=0x10 PMU message timeout Normal Boot Trying to boot from MMC2 "Synchronous Abort" handler, esr 0x02000000 ELR: 400052f4 LR: 910020 x0 : 0000000000914e40 x1 : 000000004100d030 x2 : 00000000400052f4 x3 : 00000000ff00fff0 x4 : 0000000000914e60 x5 : 0000000000914e60 x6 : 000000000000000a x7 : 0000000000000001 x8 : 0000000000000000 x9 : 0000000000000018 x10: 000000000018276e x11: 0000000000000006 x12: 000000000001869f x13: 00000000ffffffff x14: 000000003c04c000 x15: 00000000ffffffff x16: 00000000000007c8 x17: 00000000000000b7 x18: 0000000000185e50 x19: 0000000000910020 x20: 0000000000000000 x21: 00000000007ef3e0 x22: 0000000000185df0 x23: 00000000007ef3c8 x24: 00000000007f1000 x25: 00000000007f1c70 x26: 00000000deadbeef x27: 0000000000000000 x28: 0000000000000000 x29: 0000000000185d80 Resetting CPU ... resetting ... "Synchronous Abort" handler, esr 0x5e000000 ELR: 7e1cc8 LR: 185a20 x0 : 0000000084000009 x1 : d16302ad9caf8317 x2 : 80d24fad756fa1f7 x3 : fa9cacdc9281e74a x4 : 4be1cc32342e0c28 x5 : d34d32a2c33c2001 x6 : 2a4ad3ad0b84f752 x7 : 000000000000000f x8 : 0000000000185b20 x9 : 0000000000000018 x10: 0000000000185742 x11: 0000000000000021 x12: 0000000000000010 x13: 00000000ffffffff x14: 000000003c04c000 x15: 0000000000000010 x16: 00000000000007c8 x17: 00000000000000b7 x18: 0000000000185e50 x19: 0000000000185c80 x20: 0000000000000000 x21: 00000000007ef3e0 x22: 0000000000185df0 x23: 00000000007ef3c8 x24: 00000000007f1000 x25: 00000000007f1c70 x26: 00000000deadbeef x27: 0000000000000000 x28: 0000000000000000 x29: 0000000000185a00 Resetting CPU ... resetting ... > You need to check your imx-mkimage. Also for PMU message timeout, > You still need to use 0 as the timeout value. > I also have changed the timeout value to 0, and then I got this: U-Boot SPL 2018.01-00038-gb464677cc7-dirty (Jan 17 2018 - 12:51:06) PMIC: PFUZE100 ID=0x10 U-Boot hangs at this point again. Is there anything else for solving this problem? Thanks, Diego > Regards, > Peng. > >> >> Unfortunately we do not have here the B0 chip. Can you solve the problem >> with this log? >> >> Thanks, >> Diego >> >> > Thanks, >> > Peng >> > >> >> >> >>> I'll wait for comments before sending new version patchset. >> >>> >> >>> Thanks, >> >>> Peng. >> >>> >> >>>>Normal Boot >> >>>>Trying to boot from MMC2 >> >>>> >> >>>>Do you know how to solve it? If so, please add this information on >> >>>>the README file. >> >>>> >> >>>>Thanks, >> >>>>Diego >> >> >> >>Thanks, >> >>Diego >> > >> > --
> -----Original Message----- > From: Diego Dorta [mailto:diegohdorta@gmail.com] > Sent: Wednesday, January 17, 2018 11:00 PM > To: Peng Fan <peng.fan@nxp.com> > Cc: Peng Fan <van.freenix@gmail.com>; Fabio Estevam > <fabio.estevam@nxp.com>; U-Boot-Denx <u-boot@lists.denx.de>; Diego > Dorta <diegohdorta@gmail.com> > Subject: Re: [U-Boot] [PATCH V5 00/31] imx: add i.MX8M support and > i.MX8MQ EVK > > Hi Peng, > > 2018-01-16 10:25 GMT-02:00 Peng Fan <peng.fan@nxp.com>: > > > > > >> -----Original Message----- > >> From: Diego Dorta [mailto:diegohdorta@gmail.com] > >> Sent: Tuesday, January 16, 2018 8:15 PM > >> To: Peng Fan <van.freenix@gmail.com> > >> Cc: Peng Fan <peng.fan@nxp.com>; Fabio Estevam > >> <fabio.estevam@nxp.com>; U-Boot-Denx <u-boot@lists.denx.de> > >> Subject: Re: [U-Boot] [PATCH V5 00/31] imx: add i.MX8M support and > >> i.MX8MQ EVK > >> > >> Hi Peng, > >> > >> 2018-01-13 8:55 GMT-02:00 Peng Fan <van.freenix@gmail.com>: > >> > Hi Diego, > >> > On Thu, Jan 11, 2018 at 10:36:02AM -0200, Diego Dorta wrote: > >> >>Hi Peng, > >> >> > >> >>2018-01-10 23:16 GMT-02:00 Peng Fan <van.freenix@gmail.com>: > >> >>> Hi Diego, > >> >>> > >> >>> On Wed, Jan 10, 2018 at 11:08:54AM -0200, Diego Dorta wrote: > >> >>>>Hi Peng, > >> >>>> > >> >>>>2018-01-10 3:20 GMT-02:00 Peng Fan <peng.fan@nxp.com>: > >> >>>>> This patchset is to add i.MX8M and i.MX8MQ-EVK support > >> >>>>> > >> >>>>> V5: > >> >>>>> Drop wait_mask_set/clr_timeout and switch to use > >> >>>>> readl_poll_timeout in the patchset. > >> >>>>> > >> >>>>> V4: > >> >>>>> Regenerate patchset based on Tom's master tree. > >> >>>>> In this patchset, > >> >>>>> > >> https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2 > >> >>>>> > >> > Fpatchwork.ozlabs.org%2Fpatch%2F855027%2F&data=02%7C01%7Cpeng.fan% > >> >>>>> > >> > 40nxp.com%7C7ff0a80d79454c1eb43608d55cdad59d%7C686ea1d3bc2b4c6fa92 > >> >>>>> > >> > cd99c5c301635%7C0%7C1%7C636517017329353990&sdata=ukU9u%2B99GtYbM > >> Pu > >> >>>>> 1F18ZK2FvUpwWJI5ge4Hb607OPMk%3D&reserved=0 > >> >>>>> "arm: imx: Rework i.MX specific commands to be excluded from > SPL" > >> >>>>> from Tom is included to avoid merge conflicts because the > >> >>>>> i.mx8m change also has some modification to bootaux and > >> >>>>> arch/arm/mach- > >> imx/Makefile. > >> >>>>> Because CONFIG_GPT_TIMER change, I did a small modification to > >> >>>>> apply Tom's patch, no function change. > >> >>>>> > >> >>>>> Include ATF link in README. > >> >>>>> > >> >>>>> V3: > >> >>>>> This patchset based on > >> >>>>> > >> https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2 > >> >>>>> > >> > Fpatchwork.ozlabs.org%2Fpatch%2F855027%2F&data=02%7C01%7Cpeng.fan% > >> >>>>> > >> > 40nxp.com%7C7ff0a80d79454c1eb43608d55cdad59d%7C686ea1d3bc2b4c6fa92 > >> >>>>> > >> > cd99c5c301635%7C0%7C1%7C636517017329353990&sdata=ukU9u%2B99GtYbM > >> Pu > >> >>>>> 1F18ZK2FvUpwWJI5ge4Hb607OPMk%3D&reserved=0 > >> >>>>> "arm: imx: Rework i.MX specific commands to be excluded from > SPL" > >> >>>>> from Tom to avoid this patchset fail apply after Tom's patch merged. > >> >>>>> > >> >>>>> Previously "power: pmic/regulator allow dm be omited by SPL" > >> >>>>> broke other boards, in V3 patchset, only touch pfuze100 related > options. > >> >>>>> > >> >>>>> Sharing code about get mac from fuse between mx7/mx8m Sharing > >> >>>>> code about bootaux between mx6/7/mx8m Sharing code about cpu > >> >>>>> speed grade between mx7/mx8m Sharing code about get boot > >> >>>>> device between mx7/mx8m Sharding code about mmc env between > >> mx7/mx8m > >> >>>>> > >> >>>>> Introduce wait_mask_set/clr_timeout to avoid deadloop in clock > >> >>>>> pll configuration > >> >>>>> > >> >>>>> Correct authorship of fix building warning on fec arm64, patch 27/31. > >> >>>>> > >> >>>>> Switch to use structure for DDR Controller. For DDR PHY > >> >>>>> registers, there are about more than 10 thousands registers, I > >> >>>>> could not convert them with detailed register name, and the > >> >>>>> script is generated from IC team, So I use regs[0xxxxx] arrays > >> >>>>> here fo easily converting between IC team released script and > >> >>>>> uboot > >> ddr phy cod. > >> >>>>> > >> >>>>> Improve REAMME file to include where to download firmware and > >> >>>>> imx-mkimage and how to build > >> >>>>> > >> >>>>> Add review tags on the V2 patchset. > >> >>>>> > >> >>>>> Hope this patchset could catch up next release :) > >> >>>>> > >> >>>>> V2: > >> >>>>> > >> >>>>> patch 02/23: convert to structure, drop is_boot_from_usb and > >> >>>>> disconnect_from_usb patch 04/23: conver to use > >> >>>>> structure for the clock driver, removed the > >> >>>>> CCM_xxx macros. Add static for local functons. > >> >>>>> Add init_usdhc_clk, init_uart_clk and etc to not enable > >> >>>>> them all at default. > >> >>>>> patch 05/23: Add more commit msg for the sip part. > >> >>>>> patch 08/23: Merge the spl boot device with i.MX7 patch 12/23: > >> >>>>> Typo fix and return error fix from Heiko for the SoC related > >> >>>>> part patch 22/23: Use a weak function ddr_init. If patch 23/23 could > not be > >> >>>>> accepted at current stage, to make others still be could be > >> >>>>> compiled. > >> >>>>> > >> >>>>> The patchset depends on > >> >>>>> > >> https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2 > >> >>>>> > >> > Fpatchwork.ozlabs.org%2Fpatch%2F841934%2F&data=02%7C01%7Cpeng.fan% > >> >>>>> > >> > 40nxp.com%7C7ff0a80d79454c1eb43608d55cdad59d%7C686ea1d3bc2b4c6fa92 > >> >>>>> > >> > cd99c5c301635%7C0%7C1%7C636517017329353990&sdata=Il%2F%2Bkzq%2B0G > >> S > >> >>>>> TtZMKo1tnVYBFx4rLD1ymPgrbx5Pdj3s%3D&reserved=0 > >> >>>>> > >> https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2 > >> >>>>> > >> > Fpatchwork.ozlabs.org%2Fpatch%2F841958%2F&data=02%7C01%7Cpeng.fan% > >> >>>>> > >> > 40nxp.com%7C7ff0a80d79454c1eb43608d55cdad59d%7C686ea1d3bc2b4c6fa92 > >> >>>>> > >> > cd99c5c301635%7C0%7C1%7C636517017329353990&sdata=FLMRWI8K0W6XsijQ > >> F > >> >>>>> cD5JSuRcRjtqEgFBJ%2B4F%2FkVS3o%3D&reserved=0 > >> >>>>> to be tested on real hardware. > >> >>>>> > >> >>>>> V1: > >> >>>>> > >> >>>>> patch: "power: pmic.h: include dm/ofnode.h" and > >> >>>>> "power: pmic/regulator allow dm be omited by SPL" is previously > >> >>>>> reviewed in mailist to not merged. If no issue, you may pick it up. > >> >>>>> > >> >>>>> The board support is a large patch because of the ddr related code. > >> >>>>> If it is not good, please first review/pick-up other patches if > >> >>>>> they are ok. > >> >>>>> > >> >>>>> > >> >>>>> > >> >>>>> Peng Fan (29): > >> >>>>> imx: add i.MX8M into Kconfig > >> >>>>> imx: mx8m: add register definition header file > >> >>>>> imx: mx8m: add pin header file > >> >>>>> imx: mx8m: add clock driver > >> >>>>> imx: add sip function > >> >>>>> imx: boot_mode: add USB_BOOT entry > >> >>>>> imx: cpu: update cpu file to support i.MX8M > >> >>>>> imx: spl: implement spl_boot_device for i.MX8M > >> >>>>> imx: add i.MX8MQ SoC Revision and is_mx8m helper > >> >>>>> imx: add pad settings bit definition for i.MX8M > >> >>>>> imx: cpu: move speed/temp to common cpu > >> >>>>> imx: cpu: add cpu speed/grade for i.MX8M > >> >>>>> imx: refactor imx_get_mac_from_fuse > >> >>>>> imx: cleanup bootaux > >> >>>>> imx: bootaux: support i.MX8M > >> >>>>> imx: mx7: move get_boot_device to cpu.c > >> >>>>> imx: cpu: support get_boot_device for i.MX8M > >> >>>>> imx: mx7: move mmc env code to mmc_env.c > >> >>>>> imx: mx8m: add soc related settings and files > >> >>>>> imx: makefile: compile files for i.MX8M > >> >>>>> misc: ocotp: add i.MX8M support > >> >>>>> mmc: fsl_esdhc: support i.MX8M > >> >>>>> imx: lcdif: include i.MX8M > >> >>>>> gpio: mxc: add i.MX8M support > >> >>>>> net: fec: do not access reserved register for i.MX8M > >> >>>>> imx: imx8mq: add dtsi file > >> >>>>> power: pmic/regulator allow dm be omitted by SPL > >> >>>>> imx: mx8m: add ddr controller memory map > >> >>>>> imx: add i.MX8MQ EVK support > >> >>>>> > >> >>>>> Tom Rini (1): > >> >>>>> arm: imx: Rework i.MX specific commands to be excluded from > >> >>>>> SPL > >> >>>> > >> >>>>Thanks for your V5 patches, this time I had no problem on compiling it. > >> >>>> > >> >>>>But, even following your README step by step, the U-Boot hangs > >> >>>>completely on this point: > >> >>>> > >> >>>>U-Boot SPL 2018.01-00038-gb464677cc7 (Jan 10 2018 - 09:50:45) > >> >>>>PMIC: PFUZE100 ID=0x10 > >> >>>>PMU message timeout > >> >>> > >> >>> Seems needs larger time wait. > >> >>> Could you try > >> >>> static inline void poll_pmu_message_ready(void) { > >> >>> int ret; > >> >>> u32 val; > >> >>> > >> >>> /* > >> >>> * When BIT0 set to 0, the PMU has a message for the user > >> >>> * 10ms seems not enough for poll message, so use 1s here. > >> >>> */ > >> >>> ret = readl_poll_timeout(®s->reg[0xd0004], val, > >> >>> !(val & BIT(0)), 1000000); --> Change 1000000 to 0? > >> >>> if (ret) > >> >>> puts("PMU message timeout\n"); } > >> >>> > >> >> > >> >>I've just tested your suggestion and this time the U-Boot hangs it before: > >> >> > >> >>U-Boot SPL 2018.01-00038-gb464677cc7-dirty (Jan 11 2018 - 10:20:13) > >> >>PMIC: PFUZE100 ID=0x10 > >> >> > >> >> > >> >>> in board/freescale/mx8mq_evk/ddr/ddrphy_train.c > >> >>> Not sure you are using latest B0 chip or not. > >> >>> > >> >> > >> >>I only have the A0 chip, can you test on this one? > >> > > >> > I test the patchset on my A0 board, it works. But I still suggest > >> > using board with B0 chip. > >> > > >> > >> It is still not working on my A0 chip. I've enable the debug mode so > >> you can see where it hangs: > >> > >> Training PASS > >> Normal Boot > >> Trying to boot from MMC2 > >> spl: mmc boot mode: raw > >> hdr read sector 300, count=1 > >> spl: payload image: Second uimage loader load addr: 0x40000fc0 size: > >> 632345 read 4d4 sectors to 40000fc0 Jumping to U-Boot loaded - jumping to > U-Boot... > >> image entry point: 0x40001000 > > > > I think the entry point address is not correct. It should be 0x910000 for ATF. > > I've changed the entry point 0x40001000 to 0x910000 on the imx-mkimage and > it worked! > > However, and I try to boot I got this: > > U-Boot SPL 2018.01-00038-gb464677cc7-dirty (Jan 17 2018 - 12:44:27) > PMIC: PFUZE100 ID=0x10 > PMU message timeout > Normal Boot > Trying to boot from MMC2 > "Synchronous Abort" handler, esr 0x02000000 > ELR: 400052f4 > LR: 910020 > x0 : 0000000000914e40 x1 : 000000004100d030 > x2 : 00000000400052f4 x3 : 00000000ff00fff0 > x4 : 0000000000914e60 x5 : 0000000000914e60 > x6 : 000000000000000a x7 : 0000000000000001 > x8 : 0000000000000000 x9 : 0000000000000018 > x10: 000000000018276e x11: 0000000000000006 > x12: 000000000001869f x13: 00000000ffffffff > x14: 000000003c04c000 x15: 00000000ffffffff > x16: 00000000000007c8 x17: 00000000000000b7 > x18: 0000000000185e50 x19: 0000000000910020 > x20: 0000000000000000 x21: 00000000007ef3e0 > x22: 0000000000185df0 x23: 00000000007ef3c8 > x24: 00000000007f1000 x25: 00000000007f1c70 > x26: 00000000deadbeef x27: 0000000000000000 > x28: 0000000000000000 x29: 0000000000185d80 > > Resetting CPU ... > > resetting ... > "Synchronous Abort" handler, esr 0x5e000000 > ELR: 7e1cc8 > LR: 185a20 > x0 : 0000000084000009 x1 : d16302ad9caf8317 > x2 : 80d24fad756fa1f7 x3 : fa9cacdc9281e74a > x4 : 4be1cc32342e0c28 x5 : d34d32a2c33c2001 > x6 : 2a4ad3ad0b84f752 x7 : 000000000000000f > x8 : 0000000000185b20 x9 : 0000000000000018 > x10: 0000000000185742 x11: 0000000000000021 > x12: 0000000000000010 x13: 00000000ffffffff > x14: 000000003c04c000 x15: 0000000000000010 > x16: 00000000000007c8 x17: 00000000000000b7 > x18: 0000000000185e50 x19: 0000000000185c80 > x20: 0000000000000000 x21: 00000000007ef3e0 > x22: 0000000000185df0 x23: 00000000007ef3c8 > x24: 00000000007f1000 x25: 00000000007f1c70 > x26: 00000000deadbeef x27: 0000000000000000 > x28: 0000000000000000 x29: 0000000000185a00 > > Resetting CPU ... > > resetting ... > > > > You need to check your imx-mkimage. Also for PMU message timeout, You > > still need to use 0 as the timeout value. > > > > I also have changed the timeout value to 0, and then I got this: > > U-Boot SPL 2018.01-00038-gb464677cc7-dirty (Jan 17 2018 - 12:51:06) > PMIC: PFUZE100 ID=0x10 > > U-Boot hangs at this point again. Is there anything else for solving this problem? Could you share the info that with timeout value to 0 and uboot debug enabled? Did you try nxp internal uboot on your board? What's the behavior? Actually I do not want to bother debugging for A0. Regards, Peng. > > Thanks, > Diego > > > Regards, > > Peng. > > > >> > >> Unfortunately we do not have here the B0 chip. Can you solve the > >> problem with this log? > >> > >> Thanks, > >> Diego > >> > >> > Thanks, > >> > Peng > >> > > >> >> > >> >>> I'll wait for comments before sending new version patchset. > >> >>> > >> >>> Thanks, > >> >>> Peng. > >> >>> > >> >>>>Normal Boot > >> >>>>Trying to boot from MMC2 > >> >>>> > >> >>>>Do you know how to solve it? If so, please add this information > >> >>>>on the README file. > >> >>>> > >> >>>>Thanks, > >> >>>>Diego > >> >> > >> >>Thanks, > >> >>Diego > >> > > >> > --
Hi Stefano, Do you have any comments on this v5 patchset? I would like this patchset could catch up 2018.03. Thanks, Peng. > -----Original Message----- > From: Peng Fan > Sent: Wednesday, January 10, 2018 1:20 PM > To: sbabic@denx.de; Fabio Estevam <fabio.estevam@nxp.com> > Cc: van.freenix@gmail.com; u-boot@lists.denx.de; Peng Fan > <peng.fan@nxp.com> > Subject: [PATCH V5 00/31] imx: add i.MX8M support and i.MX8MQ EVK > > This patchset is to add i.MX8M and i.MX8MQ-EVK support > > V5: > Drop wait_mask_set/clr_timeout and switch to use readl_poll_timeout in the > patchset. > > V4: > Regenerate patchset based on Tom's master tree. > In this patchset, https://patchwork.ozlabs.org/patch/855027/ > "arm: imx: Rework i.MX specific commands to be excluded from SPL" from > Tom is included to avoid merge conflicts because the i.mx8m change also has > some modification to bootaux and arch/arm/mach-imx/Makefile. > Because CONFIG_GPT_TIMER change, I did a small modification to apply Tom's > patch, no function change. > > Include ATF link in README. > > V3: > This patchset based on https://patchwork.ozlabs.org/patch/855027/ > "arm: imx: Rework i.MX specific commands to be excluded from SPL" from > Tom to avoid this patchset fail apply after Tom's patch merged. > > Previously "power: pmic/regulator allow dm be omited by SPL" broke other > boards, in V3 patchset, only touch pfuze100 related options. > > Sharing code about get mac from fuse between mx7/mx8m Sharing code > about bootaux between mx6/7/mx8m Sharing code about cpu speed grade > between mx7/mx8m Sharing code about get boot device between mx7/mx8m > Sharding code about mmc env between mx7/mx8m > > Introduce wait_mask_set/clr_timeout to avoid deadloop in clock pll > configuration > > Correct authorship of fix building warning on fec arm64, patch 27/31. > > Switch to use structure for DDR Controller. For DDR PHY registers, there are > about more than 10 thousands registers, I could not convert them with > detailed register name, and the script is generated from IC team, So I use > regs[0xxxxx] arrays here fo easily converting between IC team released script > and uboot ddr phy cod. > > Improve REAMME file to include where to download firmware and imx- > mkimage and how to build > > Add review tags on the V2 patchset. > > Hope this patchset could catch up next release :) > > V2: > > patch 02/23: convert to structure, drop is_boot_from_usb and > disconnect_from_usb > patch 04/23: conver to use structure for the clock driver, removed the > CCM_xxx macros. Add static for local functons. > Add init_usdhc_clk, init_uart_clk and etc to not enable > them all at default. > patch 05/23: Add more commit msg for the sip part. > patch 08/23: Merge the spl boot device with i.MX7 patch 12/23: Typo fix and > return error fix from Heiko for the SoC related part patch 22/23: Use a weak > function ddr_init. If patch 23/23 could not be > accepted at current stage, to make others still be could be > compiled. > > The patchset depends on > https://patchwork.ozlabs.org/patch/841934/ > https://patchwork.ozlabs.org/patch/841958/ > to be tested on real hardware. > > V1: > > patch: "power: pmic.h: include dm/ofnode.h" and > "power: pmic/regulator allow dm be omited by SPL" is previously reviewed in > mailist to not merged. If no issue, you may pick it up. > > The board support is a large patch because of the ddr related code. > If it is not good, please first review/pick-up other patches if they are ok. > > > > Peng Fan (29): > imx: add i.MX8M into Kconfig > imx: mx8m: add register definition header file > imx: mx8m: add pin header file > imx: mx8m: add clock driver > imx: add sip function > imx: boot_mode: add USB_BOOT entry > imx: cpu: update cpu file to support i.MX8M > imx: spl: implement spl_boot_device for i.MX8M > imx: add i.MX8MQ SoC Revision and is_mx8m helper > imx: add pad settings bit definition for i.MX8M > imx: cpu: move speed/temp to common cpu > imx: cpu: add cpu speed/grade for i.MX8M > imx: refactor imx_get_mac_from_fuse > imx: cleanup bootaux > imx: bootaux: support i.MX8M > imx: mx7: move get_boot_device to cpu.c > imx: cpu: support get_boot_device for i.MX8M > imx: mx7: move mmc env code to mmc_env.c > imx: mx8m: add soc related settings and files > imx: makefile: compile files for i.MX8M > misc: ocotp: add i.MX8M support > mmc: fsl_esdhc: support i.MX8M > imx: lcdif: include i.MX8M > gpio: mxc: add i.MX8M support > net: fec: do not access reserved register for i.MX8M > imx: imx8mq: add dtsi file > power: pmic/regulator allow dm be omitted by SPL > imx: mx8m: add ddr controller memory map > imx: add i.MX8MQ EVK support > > Tom Rini (1): > arm: imx: Rework i.MX specific commands to be excluded from SPL > > Ye Li (1): > net: fec: fix build warnings for 64bits support > > arch/arm/Kconfig | 14 +- > arch/arm/Makefile | 4 +- > arch/arm/dts/Makefile | 2 + > arch/arm/dts/fsl-imx8-ca53.dtsi | 92 ++ > arch/arm/dts/fsl-imx8mq-evk.dts | 424 +++++++++ > arch/arm/dts/fsl-imx8mq.dtsi | 429 +++++++++ > arch/arm/include/asm/arch-imx/cpu.h | 6 +- > arch/arm/include/asm/arch-mx6/imx-regs.h | 9 +- > arch/arm/include/asm/arch-mx7/imx-regs.h | 18 +- > arch/arm/include/asm/arch-mx8m/clock.h | 657 +++++++++++++ > arch/arm/include/asm/arch-mx8m/crm_regs.h | 10 + > arch/arm/include/asm/arch-mx8m/ddr.h | 365 ++++++++ > arch/arm/include/asm/arch-mx8m/gpio.h | 12 + > arch/arm/include/asm/arch-mx8m/imx-regs.h | 468 ++++++++++ > arch/arm/include/asm/arch-mx8m/mx8mq_pins.h | 623 +++++++++++++ > arch/arm/include/asm/arch-mx8m/sys_proto.h | 18 + > arch/arm/include/asm/mach-imx/boot_mode.h | 10 + > arch/arm/include/asm/mach-imx/iomux-v3.h | 22 +- > arch/arm/include/asm/mach-imx/regs-lcdif.h | 10 +- > arch/arm/include/asm/mach-imx/sys_proto.h | 4 + > arch/arm/mach-imx/Makefile | 23 +- > arch/arm/mach-imx/cpu.c | 130 ++- > arch/arm/mach-imx/imx_bootaux.c | 51 +- > arch/arm/mach-imx/mac.c | 61 ++ > arch/arm/mach-imx/mmc_env.c | 30 + > arch/arm/mach-imx/mx5/clock.c | 4 +- > arch/arm/mach-imx/mx6/soc.c | 72 -- > arch/arm/mach-imx/mx7/clock.c | 2 + > arch/arm/mach-imx/mx7/soc.c | 195 ---- > arch/arm/mach-imx/mx7ulp/clock.c | 2 + > arch/arm/mach-imx/mx8m/Kconfig | 22 + > arch/arm/mach-imx/mx8m/Makefile | 8 + > arch/arm/mach-imx/mx8m/clock.c | 795 ++++++++++++++++ > arch/arm/mach-imx/mx8m/clock_slice.c | 742 +++++++++++++++ > arch/arm/mach-imx/mx8m/lowlevel_init.S | 63 ++ > arch/arm/mach-imx/mx8m/soc.c | 227 +++++ > arch/arm/mach-imx/sip.c | 23 + > arch/arm/mach-imx/spl.c | 10 +- > board/freescale/mx8mq_evk/Kconfig | 12 + > board/freescale/mx8mq_evk/Makefile | 12 + > board/freescale/mx8mq_evk/README | 47 + > board/freescale/mx8mq_evk/ddr/ddr_init.c | 246 +++++ > board/freescale/mx8mq_evk/ddr/ddrphy_train.c | 1272 > ++++++++++++++++++++++++++ > board/freescale/mx8mq_evk/ddr/helper.c | 101 ++ > board/freescale/mx8mq_evk/mx8mq_evk.c | 156 ++++ > board/freescale/mx8mq_evk/spl.c | 230 +++++ > configs/mx8mq_evk_defconfig | 27 + > drivers/gpio/mxc_gpio.c | 22 +- > drivers/misc/mxc_ocotp.c | 7 + > drivers/mmc/fsl_esdhc.c | 12 +- > drivers/net/fec_mxc.c | 78 +- > drivers/power/pmic/Makefile | 2 +- > drivers/power/regulator/Makefile | 2 +- > include/configs/mx8mq_evk.h | 269 ++++++ > include/dt-bindings/clock/imx8mq-clock.h | 612 +++++++++++++ > include/dt-bindings/pinctrl/pins-imx8mq.h | 632 +++++++++++++ > include/imx_sip.h | 14 + > 57 files changed, 9047 insertions(+), 363 deletions(-) create mode 100644 > arch/arm/dts/fsl-imx8-ca53.dtsi create mode 100644 arch/arm/dts/fsl- > imx8mq-evk.dts create mode 100644 arch/arm/dts/fsl-imx8mq.dtsi create > mode 100644 arch/arm/include/asm/arch-mx8m/clock.h > create mode 100644 arch/arm/include/asm/arch-mx8m/crm_regs.h > create mode 100644 arch/arm/include/asm/arch-mx8m/ddr.h > create mode 100644 arch/arm/include/asm/arch-mx8m/gpio.h > create mode 100644 arch/arm/include/asm/arch-mx8m/imx-regs.h > create mode 100644 arch/arm/include/asm/arch-mx8m/mx8mq_pins.h > create mode 100644 arch/arm/include/asm/arch-mx8m/sys_proto.h > create mode 100644 arch/arm/mach-imx/mac.c create mode 100644 > arch/arm/mach-imx/mmc_env.c create mode 100644 arch/arm/mach- > imx/mx8m/Kconfig create mode 100644 arch/arm/mach-imx/mx8m/Makefile > create mode 100644 arch/arm/mach-imx/mx8m/clock.c create mode 100644 > arch/arm/mach-imx/mx8m/clock_slice.c > create mode 100644 arch/arm/mach-imx/mx8m/lowlevel_init.S > create mode 100644 arch/arm/mach-imx/mx8m/soc.c create mode 100644 > arch/arm/mach-imx/sip.c create mode 100644 > board/freescale/mx8mq_evk/Kconfig create mode 100644 > board/freescale/mx8mq_evk/Makefile > create mode 100644 board/freescale/mx8mq_evk/README create mode > 100644 board/freescale/mx8mq_evk/ddr/ddr_init.c > create mode 100644 board/freescale/mx8mq_evk/ddr/ddrphy_train.c > create mode 100644 board/freescale/mx8mq_evk/ddr/helper.c > create mode 100644 board/freescale/mx8mq_evk/mx8mq_evk.c > create mode 100644 board/freescale/mx8mq_evk/spl.c create mode 100644 > configs/mx8mq_evk_defconfig create mode 100644 > include/configs/mx8mq_evk.h create mode 100644 include/dt- > bindings/clock/imx8mq-clock.h > create mode 100644 include/dt-bindings/pinctrl/pins-imx8mq.h > create mode 100644 include/imx_sip.h > > -- > 2.14.1
On 18/01/2018 02:24, Peng Fan wrote: > Hi Stefano, > > Do you have any comments on this v5 patchset? I would like this patchset > could catch up 2018.03. Give me time until week-end, I cannot take a look before - thanks ! Regards, Stefano > > Thanks, > Peng. > >> -----Original Message----- >> From: Peng Fan >> Sent: Wednesday, January 10, 2018 1:20 PM >> To: sbabic@denx.de; Fabio Estevam <fabio.estevam@nxp.com> >> Cc: van.freenix@gmail.com; u-boot@lists.denx.de; Peng Fan >> <peng.fan@nxp.com> >> Subject: [PATCH V5 00/31] imx: add i.MX8M support and i.MX8MQ EVK >> >> This patchset is to add i.MX8M and i.MX8MQ-EVK support >> >> V5: >> Drop wait_mask_set/clr_timeout and switch to use readl_poll_timeout in the >> patchset. >> >> V4: >> Regenerate patchset based on Tom's master tree. >> In this patchset, https://patchwork.ozlabs.org/patch/855027/ >> "arm: imx: Rework i.MX specific commands to be excluded from SPL" from >> Tom is included to avoid merge conflicts because the i.mx8m change also has >> some modification to bootaux and arch/arm/mach-imx/Makefile. >> Because CONFIG_GPT_TIMER change, I did a small modification to apply Tom's >> patch, no function change. >> >> Include ATF link in README. >> >> V3: >> This patchset based on https://patchwork.ozlabs.org/patch/855027/ >> "arm: imx: Rework i.MX specific commands to be excluded from SPL" from >> Tom to avoid this patchset fail apply after Tom's patch merged. >> >> Previously "power: pmic/regulator allow dm be omited by SPL" broke other >> boards, in V3 patchset, only touch pfuze100 related options. >> >> Sharing code about get mac from fuse between mx7/mx8m Sharing code >> about bootaux between mx6/7/mx8m Sharing code about cpu speed grade >> between mx7/mx8m Sharing code about get boot device between mx7/mx8m >> Sharding code about mmc env between mx7/mx8m >> >> Introduce wait_mask_set/clr_timeout to avoid deadloop in clock pll >> configuration >> >> Correct authorship of fix building warning on fec arm64, patch 27/31. >> >> Switch to use structure for DDR Controller. For DDR PHY registers, there are >> about more than 10 thousands registers, I could not convert them with >> detailed register name, and the script is generated from IC team, So I use >> regs[0xxxxx] arrays here fo easily converting between IC team released script >> and uboot ddr phy cod. >> >> Improve REAMME file to include where to download firmware and imx- >> mkimage and how to build >> >> Add review tags on the V2 patchset. >> >> Hope this patchset could catch up next release :) >> >> V2: >> >> patch 02/23: convert to structure, drop is_boot_from_usb and >> disconnect_from_usb >> patch 04/23: conver to use structure for the clock driver, removed the >> CCM_xxx macros. Add static for local functons. >> Add init_usdhc_clk, init_uart_clk and etc to not enable >> them all at default. >> patch 05/23: Add more commit msg for the sip part. >> patch 08/23: Merge the spl boot device with i.MX7 patch 12/23: Typo fix and >> return error fix from Heiko for the SoC related part patch 22/23: Use a weak >> function ddr_init. If patch 23/23 could not be >> accepted at current stage, to make others still be could be >> compiled. >> >> The patchset depends on >> https://patchwork.ozlabs.org/patch/841934/ >> https://patchwork.ozlabs.org/patch/841958/ >> to be tested on real hardware. >> >> V1: >> >> patch: "power: pmic.h: include dm/ofnode.h" and >> "power: pmic/regulator allow dm be omited by SPL" is previously reviewed in >> mailist to not merged. If no issue, you may pick it up. >> >> The board support is a large patch because of the ddr related code. >> If it is not good, please first review/pick-up other patches if they are ok. >> >> >> >> Peng Fan (29): >> imx: add i.MX8M into Kconfig >> imx: mx8m: add register definition header file >> imx: mx8m: add pin header file >> imx: mx8m: add clock driver >> imx: add sip function >> imx: boot_mode: add USB_BOOT entry >> imx: cpu: update cpu file to support i.MX8M >> imx: spl: implement spl_boot_device for i.MX8M >> imx: add i.MX8MQ SoC Revision and is_mx8m helper >> imx: add pad settings bit definition for i.MX8M >> imx: cpu: move speed/temp to common cpu >> imx: cpu: add cpu speed/grade for i.MX8M >> imx: refactor imx_get_mac_from_fuse >> imx: cleanup bootaux >> imx: bootaux: support i.MX8M >> imx: mx7: move get_boot_device to cpu.c >> imx: cpu: support get_boot_device for i.MX8M >> imx: mx7: move mmc env code to mmc_env.c >> imx: mx8m: add soc related settings and files >> imx: makefile: compile files for i.MX8M >> misc: ocotp: add i.MX8M support >> mmc: fsl_esdhc: support i.MX8M >> imx: lcdif: include i.MX8M >> gpio: mxc: add i.MX8M support >> net: fec: do not access reserved register for i.MX8M >> imx: imx8mq: add dtsi file >> power: pmic/regulator allow dm be omitted by SPL >> imx: mx8m: add ddr controller memory map >> imx: add i.MX8MQ EVK support >> >> Tom Rini (1): >> arm: imx: Rework i.MX specific commands to be excluded from SPL >> >> Ye Li (1): >> net: fec: fix build warnings for 64bits support >> >> arch/arm/Kconfig | 14 +- >> arch/arm/Makefile | 4 +- >> arch/arm/dts/Makefile | 2 + >> arch/arm/dts/fsl-imx8-ca53.dtsi | 92 ++ >> arch/arm/dts/fsl-imx8mq-evk.dts | 424 +++++++++ >> arch/arm/dts/fsl-imx8mq.dtsi | 429 +++++++++ >> arch/arm/include/asm/arch-imx/cpu.h | 6 +- >> arch/arm/include/asm/arch-mx6/imx-regs.h | 9 +- >> arch/arm/include/asm/arch-mx7/imx-regs.h | 18 +- >> arch/arm/include/asm/arch-mx8m/clock.h | 657 +++++++++++++ >> arch/arm/include/asm/arch-mx8m/crm_regs.h | 10 + >> arch/arm/include/asm/arch-mx8m/ddr.h | 365 ++++++++ >> arch/arm/include/asm/arch-mx8m/gpio.h | 12 + >> arch/arm/include/asm/arch-mx8m/imx-regs.h | 468 ++++++++++ >> arch/arm/include/asm/arch-mx8m/mx8mq_pins.h | 623 +++++++++++++ >> arch/arm/include/asm/arch-mx8m/sys_proto.h | 18 + >> arch/arm/include/asm/mach-imx/boot_mode.h | 10 + >> arch/arm/include/asm/mach-imx/iomux-v3.h | 22 +- >> arch/arm/include/asm/mach-imx/regs-lcdif.h | 10 +- >> arch/arm/include/asm/mach-imx/sys_proto.h | 4 + >> arch/arm/mach-imx/Makefile | 23 +- >> arch/arm/mach-imx/cpu.c | 130 ++- >> arch/arm/mach-imx/imx_bootaux.c | 51 +- >> arch/arm/mach-imx/mac.c | 61 ++ >> arch/arm/mach-imx/mmc_env.c | 30 + >> arch/arm/mach-imx/mx5/clock.c | 4 +- >> arch/arm/mach-imx/mx6/soc.c | 72 -- >> arch/arm/mach-imx/mx7/clock.c | 2 + >> arch/arm/mach-imx/mx7/soc.c | 195 ---- >> arch/arm/mach-imx/mx7ulp/clock.c | 2 + >> arch/arm/mach-imx/mx8m/Kconfig | 22 + >> arch/arm/mach-imx/mx8m/Makefile | 8 + >> arch/arm/mach-imx/mx8m/clock.c | 795 ++++++++++++++++ >> arch/arm/mach-imx/mx8m/clock_slice.c | 742 +++++++++++++++ >> arch/arm/mach-imx/mx8m/lowlevel_init.S | 63 ++ >> arch/arm/mach-imx/mx8m/soc.c | 227 +++++ >> arch/arm/mach-imx/sip.c | 23 + >> arch/arm/mach-imx/spl.c | 10 +- >> board/freescale/mx8mq_evk/Kconfig | 12 + >> board/freescale/mx8mq_evk/Makefile | 12 + >> board/freescale/mx8mq_evk/README | 47 + >> board/freescale/mx8mq_evk/ddr/ddr_init.c | 246 +++++ >> board/freescale/mx8mq_evk/ddr/ddrphy_train.c | 1272 >> ++++++++++++++++++++++++++ >> board/freescale/mx8mq_evk/ddr/helper.c | 101 ++ >> board/freescale/mx8mq_evk/mx8mq_evk.c | 156 ++++ >> board/freescale/mx8mq_evk/spl.c | 230 +++++ >> configs/mx8mq_evk_defconfig | 27 + >> drivers/gpio/mxc_gpio.c | 22 +- >> drivers/misc/mxc_ocotp.c | 7 + >> drivers/mmc/fsl_esdhc.c | 12 +- >> drivers/net/fec_mxc.c | 78 +- >> drivers/power/pmic/Makefile | 2 +- >> drivers/power/regulator/Makefile | 2 +- >> include/configs/mx8mq_evk.h | 269 ++++++ >> include/dt-bindings/clock/imx8mq-clock.h | 612 +++++++++++++ >> include/dt-bindings/pinctrl/pins-imx8mq.h | 632 +++++++++++++ >> include/imx_sip.h | 14 + >> 57 files changed, 9047 insertions(+), 363 deletions(-) create mode 100644 >> arch/arm/dts/fsl-imx8-ca53.dtsi create mode 100644 arch/arm/dts/fsl- >> imx8mq-evk.dts create mode 100644 arch/arm/dts/fsl-imx8mq.dtsi create >> mode 100644 arch/arm/include/asm/arch-mx8m/clock.h >> create mode 100644 arch/arm/include/asm/arch-mx8m/crm_regs.h >> create mode 100644 arch/arm/include/asm/arch-mx8m/ddr.h >> create mode 100644 arch/arm/include/asm/arch-mx8m/gpio.h >> create mode 100644 arch/arm/include/asm/arch-mx8m/imx-regs.h >> create mode 100644 arch/arm/include/asm/arch-mx8m/mx8mq_pins.h >> create mode 100644 arch/arm/include/asm/arch-mx8m/sys_proto.h >> create mode 100644 arch/arm/mach-imx/mac.c create mode 100644 >> arch/arm/mach-imx/mmc_env.c create mode 100644 arch/arm/mach- >> imx/mx8m/Kconfig create mode 100644 arch/arm/mach-imx/mx8m/Makefile >> create mode 100644 arch/arm/mach-imx/mx8m/clock.c create mode 100644 >> arch/arm/mach-imx/mx8m/clock_slice.c >> create mode 100644 arch/arm/mach-imx/mx8m/lowlevel_init.S >> create mode 100644 arch/arm/mach-imx/mx8m/soc.c create mode 100644 >> arch/arm/mach-imx/sip.c create mode 100644 >> board/freescale/mx8mq_evk/Kconfig create mode 100644 >> board/freescale/mx8mq_evk/Makefile >> create mode 100644 board/freescale/mx8mq_evk/README create mode >> 100644 board/freescale/mx8mq_evk/ddr/ddr_init.c >> create mode 100644 board/freescale/mx8mq_evk/ddr/ddrphy_train.c >> create mode 100644 board/freescale/mx8mq_evk/ddr/helper.c >> create mode 100644 board/freescale/mx8mq_evk/mx8mq_evk.c >> create mode 100644 board/freescale/mx8mq_evk/spl.c create mode 100644 >> configs/mx8mq_evk_defconfig create mode 100644 >> include/configs/mx8mq_evk.h create mode 100644 include/dt- >> bindings/clock/imx8mq-clock.h >> create mode 100644 include/dt-bindings/pinctrl/pins-imx8mq.h >> create mode 100644 include/imx_sip.h >> >> -- >> 2.14.1 >
> On 18/01/2018 02:24, Peng Fan wrote: > > Hi Stefano, > > > > Do you have any comments on this v5 patchset? I would like this > > patchset could catch up 2018.03. > > Give me time until week-end, I cannot take a look before - thanks ! Sorry for the push. Thanks. Thanks, Peng. > > Regards, > Stefano > > > > > Thanks, > > Peng. > > > >> -----Original Message----- > >> From: Peng Fan > >> Sent: Wednesday, January 10, 2018 1:20 PM > >> To: sbabic@denx.de; Fabio Estevam <fabio.estevam@nxp.com> > >> Cc: van.freenix@gmail.com; u-boot@lists.denx.de; Peng Fan > >> <peng.fan@nxp.com> > >> Subject: [PATCH V5 00/31] imx: add i.MX8M support and i.MX8MQ EVK > >> > >> This patchset is to add i.MX8M and i.MX8MQ-EVK support > >> > >> V5: > >> Drop wait_mask_set/clr_timeout and switch to use readl_poll_timeout > >> in the patchset. > >> > >> V4: > >> Regenerate patchset based on Tom's master tree. > >> In this patchset, > >> https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpa > >> > tchwork.ozlabs.org%2Fpatch%2F855027%2F&data=02%7C01%7Cpeng.fan%40n > xp. > >> > com%7C626cf8e0c4cb46b6fa5608d55e5091dc%7C686ea1d3bc2b4c6fa92cd99c5c > 30 > >> > 1635%7C0%7C1%7C636518622542742993&sdata=PSuBdmBbxw7Z%2B9Maetke > qGWEsTC > >> tqSnO5IzYsvKkNGI%3D&reserved=0 > >> "arm: imx: Rework i.MX specific commands to be excluded from SPL" > >> from Tom is included to avoid merge conflicts because the i.mx8m > >> change also has some modification to bootaux and arch/arm/mach- > imx/Makefile. > >> Because CONFIG_GPT_TIMER change, I did a small modification to apply > >> Tom's patch, no function change. > >> > >> Include ATF link in README. > >> > >> V3: > >> This patchset based on > >> https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpa > >> > tchwork.ozlabs.org%2Fpatch%2F855027%2F&data=02%7C01%7Cpeng.fan%40n > xp. > >> > com%7C626cf8e0c4cb46b6fa5608d55e5091dc%7C686ea1d3bc2b4c6fa92cd99c5c > 30 > >> > 1635%7C0%7C1%7C636518622542742993&sdata=PSuBdmBbxw7Z%2B9Maetke > qGWEsTC > >> tqSnO5IzYsvKkNGI%3D&reserved=0 > >> "arm: imx: Rework i.MX specific commands to be excluded from SPL" > >> from Tom to avoid this patchset fail apply after Tom's patch merged. > >> > >> Previously "power: pmic/regulator allow dm be omited by SPL" broke > >> other boards, in V3 patchset, only touch pfuze100 related options. > >> > >> Sharing code about get mac from fuse between mx7/mx8m Sharing code > >> about bootaux between mx6/7/mx8m Sharing code about cpu speed grade > >> between mx7/mx8m Sharing code about get boot device between > mx7/mx8m > >> Sharding code about mmc env between mx7/mx8m > >> > >> Introduce wait_mask_set/clr_timeout to avoid deadloop in clock pll > >> configuration > >> > >> Correct authorship of fix building warning on fec arm64, patch 27/31. > >> > >> Switch to use structure for DDR Controller. For DDR PHY registers, > >> there are about more than 10 thousands registers, I could not convert > >> them with detailed register name, and the script is generated from IC > >> team, So I use regs[0xxxxx] arrays here fo easily converting between > >> IC team released script and uboot ddr phy cod. > >> > >> Improve REAMME file to include where to download firmware and imx- > >> mkimage and how to build > >> > >> Add review tags on the V2 patchset. > >> > >> Hope this patchset could catch up next release :) > >> > >> V2: > >> > >> patch 02/23: convert to structure, drop is_boot_from_usb and > >> disconnect_from_usb > >> patch 04/23: conver to use structure for the clock driver, removed the > >> CCM_xxx macros. Add static for local functons. > >> Add init_usdhc_clk, init_uart_clk and etc to not enable > >> them all at default. > >> patch 05/23: Add more commit msg for the sip part. > >> patch 08/23: Merge the spl boot device with i.MX7 patch 12/23: Typo > >> fix and return error fix from Heiko for the SoC related part patch > >> 22/23: Use a weak function ddr_init. If patch 23/23 could not be > >> accepted at current stage, to make others still be could be > >> compiled. > >> > >> The patchset depends on > >> https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpa > >> > tchwork.ozlabs.org%2Fpatch%2F841934%2F&data=02%7C01%7Cpeng.fan%40n > xp. > >> > com%7C626cf8e0c4cb46b6fa5608d55e5091dc%7C686ea1d3bc2b4c6fa92cd99c5c > 30 > >> > 1635%7C0%7C1%7C636518622542742993&sdata=DLNROQVpNnwy3wU0Ix25uU > QWJmk%2 > >> BEx%2BPTESrr%2Fc4330%3D&reserved=0 > >> https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpa > >> > tchwork.ozlabs.org%2Fpatch%2F841958%2F&data=02%7C01%7Cpeng.fan%40n > xp. > >> > com%7C626cf8e0c4cb46b6fa5608d55e5091dc%7C686ea1d3bc2b4c6fa92cd99c5c > 30 > >> > 1635%7C0%7C1%7C636518622542742993&sdata=wpdsOEit3lIJ2dkc8FGh2fcY%2 > FhZ > >> vAR%2FVtC19U2fp4QE%3D&reserved=0 > >> to be tested on real hardware. > >> > >> V1: > >> > >> patch: "power: pmic.h: include dm/ofnode.h" and > >> "power: pmic/regulator allow dm be omited by SPL" is previously > >> reviewed in mailist to not merged. If no issue, you may pick it up. > >> > >> The board support is a large patch because of the ddr related code. > >> If it is not good, please first review/pick-up other patches if they are ok. > >> > >> > >> > >> Peng Fan (29): > >> imx: add i.MX8M into Kconfig > >> imx: mx8m: add register definition header file > >> imx: mx8m: add pin header file > >> imx: mx8m: add clock driver > >> imx: add sip function > >> imx: boot_mode: add USB_BOOT entry > >> imx: cpu: update cpu file to support i.MX8M > >> imx: spl: implement spl_boot_device for i.MX8M > >> imx: add i.MX8MQ SoC Revision and is_mx8m helper > >> imx: add pad settings bit definition for i.MX8M > >> imx: cpu: move speed/temp to common cpu > >> imx: cpu: add cpu speed/grade for i.MX8M > >> imx: refactor imx_get_mac_from_fuse > >> imx: cleanup bootaux > >> imx: bootaux: support i.MX8M > >> imx: mx7: move get_boot_device to cpu.c > >> imx: cpu: support get_boot_device for i.MX8M > >> imx: mx7: move mmc env code to mmc_env.c > >> imx: mx8m: add soc related settings and files > >> imx: makefile: compile files for i.MX8M > >> misc: ocotp: add i.MX8M support > >> mmc: fsl_esdhc: support i.MX8M > >> imx: lcdif: include i.MX8M > >> gpio: mxc: add i.MX8M support > >> net: fec: do not access reserved register for i.MX8M > >> imx: imx8mq: add dtsi file > >> power: pmic/regulator allow dm be omitted by SPL > >> imx: mx8m: add ddr controller memory map > >> imx: add i.MX8MQ EVK support > >> > >> Tom Rini (1): > >> arm: imx: Rework i.MX specific commands to be excluded from SPL > >> > >> Ye Li (1): > >> net: fec: fix build warnings for 64bits support > >> > >> arch/arm/Kconfig | 14 +- > >> arch/arm/Makefile | 4 +- > >> arch/arm/dts/Makefile | 2 + > >> arch/arm/dts/fsl-imx8-ca53.dtsi | 92 ++ > >> arch/arm/dts/fsl-imx8mq-evk.dts | 424 +++++++++ > >> arch/arm/dts/fsl-imx8mq.dtsi | 429 +++++++++ > >> arch/arm/include/asm/arch-imx/cpu.h | 6 +- > >> arch/arm/include/asm/arch-mx6/imx-regs.h | 9 +- > >> arch/arm/include/asm/arch-mx7/imx-regs.h | 18 +- > >> arch/arm/include/asm/arch-mx8m/clock.h | 657 +++++++++++++ > >> arch/arm/include/asm/arch-mx8m/crm_regs.h | 10 + > >> arch/arm/include/asm/arch-mx8m/ddr.h | 365 ++++++++ > >> arch/arm/include/asm/arch-mx8m/gpio.h | 12 + > >> arch/arm/include/asm/arch-mx8m/imx-regs.h | 468 ++++++++++ > >> arch/arm/include/asm/arch-mx8m/mx8mq_pins.h | 623 +++++++++++++ > >> arch/arm/include/asm/arch-mx8m/sys_proto.h | 18 + > >> arch/arm/include/asm/mach-imx/boot_mode.h | 10 + > >> arch/arm/include/asm/mach-imx/iomux-v3.h | 22 +- > >> arch/arm/include/asm/mach-imx/regs-lcdif.h | 10 +- > >> arch/arm/include/asm/mach-imx/sys_proto.h | 4 + > >> arch/arm/mach-imx/Makefile | 23 +- > >> arch/arm/mach-imx/cpu.c | 130 ++- > >> arch/arm/mach-imx/imx_bootaux.c | 51 +- > >> arch/arm/mach-imx/mac.c | 61 ++ > >> arch/arm/mach-imx/mmc_env.c | 30 + > >> arch/arm/mach-imx/mx5/clock.c | 4 +- > >> arch/arm/mach-imx/mx6/soc.c | 72 -- > >> arch/arm/mach-imx/mx7/clock.c | 2 + > >> arch/arm/mach-imx/mx7/soc.c | 195 ---- > >> arch/arm/mach-imx/mx7ulp/clock.c | 2 + > >> arch/arm/mach-imx/mx8m/Kconfig | 22 + > >> arch/arm/mach-imx/mx8m/Makefile | 8 + > >> arch/arm/mach-imx/mx8m/clock.c | 795 ++++++++++++++++ > >> arch/arm/mach-imx/mx8m/clock_slice.c | 742 +++++++++++++++ > >> arch/arm/mach-imx/mx8m/lowlevel_init.S | 63 ++ > >> arch/arm/mach-imx/mx8m/soc.c | 227 +++++ > >> arch/arm/mach-imx/sip.c | 23 + > >> arch/arm/mach-imx/spl.c | 10 +- > >> board/freescale/mx8mq_evk/Kconfig | 12 + > >> board/freescale/mx8mq_evk/Makefile | 12 + > >> board/freescale/mx8mq_evk/README | 47 + > >> board/freescale/mx8mq_evk/ddr/ddr_init.c | 246 +++++ > >> board/freescale/mx8mq_evk/ddr/ddrphy_train.c | 1272 > >> ++++++++++++++++++++++++++ > >> board/freescale/mx8mq_evk/ddr/helper.c | 101 ++ > >> board/freescale/mx8mq_evk/mx8mq_evk.c | 156 ++++ > >> board/freescale/mx8mq_evk/spl.c | 230 +++++ > >> configs/mx8mq_evk_defconfig | 27 + > >> drivers/gpio/mxc_gpio.c | 22 +- > >> drivers/misc/mxc_ocotp.c | 7 + > >> drivers/mmc/fsl_esdhc.c | 12 +- > >> drivers/net/fec_mxc.c | 78 +- > >> drivers/power/pmic/Makefile | 2 +- > >> drivers/power/regulator/Makefile | 2 +- > >> include/configs/mx8mq_evk.h | 269 ++++++ > >> include/dt-bindings/clock/imx8mq-clock.h | 612 +++++++++++++ > >> include/dt-bindings/pinctrl/pins-imx8mq.h | 632 +++++++++++++ > >> include/imx_sip.h | 14 + > >> 57 files changed, 9047 insertions(+), 363 deletions(-) create mode > >> 100644 arch/arm/dts/fsl-imx8-ca53.dtsi create mode 100644 > >> arch/arm/dts/fsl- imx8mq-evk.dts create mode 100644 > >> arch/arm/dts/fsl-imx8mq.dtsi create mode 100644 > >> arch/arm/include/asm/arch-mx8m/clock.h > >> create mode 100644 arch/arm/include/asm/arch-mx8m/crm_regs.h > >> create mode 100644 arch/arm/include/asm/arch-mx8m/ddr.h > >> create mode 100644 arch/arm/include/asm/arch-mx8m/gpio.h > >> create mode 100644 arch/arm/include/asm/arch-mx8m/imx-regs.h > >> create mode 100644 arch/arm/include/asm/arch-mx8m/mx8mq_pins.h > >> create mode 100644 arch/arm/include/asm/arch-mx8m/sys_proto.h > >> create mode 100644 arch/arm/mach-imx/mac.c create mode 100644 > >> arch/arm/mach-imx/mmc_env.c create mode 100644 arch/arm/mach- > >> imx/mx8m/Kconfig create mode 100644 arch/arm/mach- > imx/mx8m/Makefile > >> create mode 100644 arch/arm/mach-imx/mx8m/clock.c create mode > 100644 > >> arch/arm/mach-imx/mx8m/clock_slice.c > >> create mode 100644 arch/arm/mach-imx/mx8m/lowlevel_init.S > >> create mode 100644 arch/arm/mach-imx/mx8m/soc.c create mode 100644 > >> arch/arm/mach-imx/sip.c create mode 100644 > >> board/freescale/mx8mq_evk/Kconfig create mode 100644 > >> board/freescale/mx8mq_evk/Makefile > >> create mode 100644 board/freescale/mx8mq_evk/README create mode > >> 100644 board/freescale/mx8mq_evk/ddr/ddr_init.c > >> create mode 100644 board/freescale/mx8mq_evk/ddr/ddrphy_train.c > >> create mode 100644 board/freescale/mx8mq_evk/ddr/helper.c > >> create mode 100644 board/freescale/mx8mq_evk/mx8mq_evk.c > >> create mode 100644 board/freescale/mx8mq_evk/spl.c create mode > >> 100644 configs/mx8mq_evk_defconfig create mode 100644 > >> include/configs/mx8mq_evk.h create mode 100644 include/dt- > >> bindings/clock/imx8mq-clock.h create mode 100644 > >> include/dt-bindings/pinctrl/pins-imx8mq.h > >> create mode 100644 include/imx_sip.h > >> > >> -- > >> 2.14.1 > > > > > -- > ============================================================ > ========= > DENX Software Engineering GmbH, Managing Director: Wolfgang Denk > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany > Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic@denx.de > ============================================================ > =========
2018-01-17 23:13 GMT-02:00 Peng Fan <peng.fan@nxp.com>: > Could you share the info that with timeout value to 0 and uboot debug enabled? > > Did you try nxp internal uboot on your board? What's the behavior? > > Actually I do not want to bother debugging for A0. > > Regards, > Peng. I talked to Peng offline, and we will work on improving the README file. Thanks, Diego
Hi Peng, 2018-01-10 3:20 GMT-02:00 Peng Fan <peng.fan@nxp.com>: > This patchset is to add i.MX8M and i.MX8MQ-EVK support > > V5: > Drop wait_mask_set/clr_timeout and switch to use readl_poll_timeout in > the patchset. > > V4: > Regenerate patchset based on Tom's master tree. > In this patchset, https://patchwork.ozlabs.org/patch/855027/ > "arm: imx: Rework i.MX specific commands to be excluded from SPL" from > Tom is included to avoid merge conflicts because the i.mx8m change > also has some modification to bootaux and arch/arm/mach-imx/Makefile. > Because CONFIG_GPT_TIMER change, I did a small modification to apply > Tom's patch, no function change. > > Include ATF link in README. > > V3: > This patchset based on https://patchwork.ozlabs.org/patch/855027/ > "arm: imx: Rework i.MX specific commands to be excluded from SPL" from > Tom to avoid this patchset fail apply after Tom's patch merged. > > Previously "power: pmic/regulator allow dm be omited by SPL" broke other > boards, in V3 patchset, only touch pfuze100 related options. > > Sharing code about get mac from fuse between mx7/mx8m > Sharing code about bootaux between mx6/7/mx8m > Sharing code about cpu speed grade between mx7/mx8m > Sharing code about get boot device between mx7/mx8m > Sharding code about mmc env between mx7/mx8m > > Introduce wait_mask_set/clr_timeout to avoid deadloop in clock pll configuration > > Correct authorship of fix building warning on fec arm64, patch 27/31. > > Switch to use structure for DDR Controller. For DDR PHY registers, > there are about more than 10 thousands registers, I could not convert > them with detailed register name, and the script is generated from IC team, > So I use regs[0xxxxx] arrays here fo easily converting between IC team > released script and uboot ddr phy cod. > > Improve REAMME file to include where to download firmware and imx-mkimage > and how to build > > Add review tags on the V2 patchset. > > Hope this patchset could catch up next release :) > > V2: > > patch 02/23: convert to structure, drop is_boot_from_usb and > disconnect_from_usb > patch 04/23: conver to use structure for the clock driver, removed the > CCM_xxx macros. Add static for local functons. > Add init_usdhc_clk, init_uart_clk and etc to not enable > them all at default. > patch 05/23: Add more commit msg for the sip part. > patch 08/23: Merge the spl boot device with i.MX7 > patch 12/23: Typo fix and return error fix from Heiko for the SoC related part > patch 22/23: Use a weak function ddr_init. If patch 23/23 could not be > accepted at current stage, to make others still be could be > compiled. > > The patchset depends on > https://patchwork.ozlabs.org/patch/841934/ > https://patchwork.ozlabs.org/patch/841958/ > to be tested on real hardware. > > V1: > > patch: "power: pmic.h: include dm/ofnode.h" and > "power: pmic/regulator allow dm be omited by SPL" is previously reviewed > in mailist to not merged. If no issue, you may pick it up. > > The board support is a large patch because of the ddr related code. > If it is not good, please first review/pick-up other patches if they > are ok. > > > > Peng Fan (29): > imx: add i.MX8M into Kconfig > imx: mx8m: add register definition header file > imx: mx8m: add pin header file > imx: mx8m: add clock driver > imx: add sip function > imx: boot_mode: add USB_BOOT entry > imx: cpu: update cpu file to support i.MX8M > imx: spl: implement spl_boot_device for i.MX8M > imx: add i.MX8MQ SoC Revision and is_mx8m helper > imx: add pad settings bit definition for i.MX8M > imx: cpu: move speed/temp to common cpu > imx: cpu: add cpu speed/grade for i.MX8M > imx: refactor imx_get_mac_from_fuse > imx: cleanup bootaux > imx: bootaux: support i.MX8M > imx: mx7: move get_boot_device to cpu.c > imx: cpu: support get_boot_device for i.MX8M > imx: mx7: move mmc env code to mmc_env.c > imx: mx8m: add soc related settings and files > imx: makefile: compile files for i.MX8M > misc: ocotp: add i.MX8M support > mmc: fsl_esdhc: support i.MX8M > imx: lcdif: include i.MX8M > gpio: mxc: add i.MX8M support > net: fec: do not access reserved register for i.MX8M > imx: imx8mq: add dtsi file > power: pmic/regulator allow dm be omitted by SPL > imx: mx8m: add ddr controller memory map > imx: add i.MX8MQ EVK support > > Tom Rini (1): > arm: imx: Rework i.MX specific commands to be excluded from SPL > > Ye Li (1): > net: fec: fix build warnings for 64bits support > I was able to run your patchset on my board. For the whole series: Tested-by: Diego Dorta <diego.dorta@nxp.com> Thanks, Diego
On Mon, Jan 22, 2018 at 2:04 PM Diego Dorta <diegohdorta@gmail.com> wrote: > > Hi Peng, > > 2018-01-10 3:20 GMT-02:00 Peng Fan <peng.fan@nxp.com>: > > This patchset is to add i.MX8M and i.MX8MQ-EVK support > > > > V5: > > Drop wait_mask_set/clr_timeout and switch to use readl_poll_timeout in > > the patchset. > > > > V4: > > Regenerate patchset based on Tom's master tree. > > In this patchset, https://patchwork.ozlabs.org/patch/855027/ > > "arm: imx: Rework i.MX specific commands to be excluded from SPL" from > > Tom is included to avoid merge conflicts because the i.mx8m change > > also has some modification to bootaux and arch/arm/mach-imx/Makefile. > > Because CONFIG_GPT_TIMER change, I did a small modification to apply > > Tom's patch, no function change. > > > > Include ATF link in README. > > > > V3: > > This patchset based on https://patchwork.ozlabs.org/patch/855027/ > > "arm: imx: Rework i.MX specific commands to be excluded from SPL" from > > Tom to avoid this patchset fail apply after Tom's patch merged. > > > > Previously "power: pmic/regulator allow dm be omited by SPL" broke other > > boards, in V3 patchset, only touch pfuze100 related options. > > > > Sharing code about get mac from fuse between mx7/mx8m > > Sharing code about bootaux between mx6/7/mx8m > > Sharing code about cpu speed grade between mx7/mx8m > > Sharing code about get boot device between mx7/mx8m > > Sharding code about mmc env between mx7/mx8m > > > > Introduce wait_mask_set/clr_timeout to avoid deadloop in clock pll configuration > > > > Correct authorship of fix building warning on fec arm64, patch 27/31. > > > > Switch to use structure for DDR Controller. For DDR PHY registers, > > there are about more than 10 thousands registers, I could not convert > > them with detailed register name, and the script is generated from IC team, > > So I use regs[0xxxxx] arrays here fo easily converting between IC team > > released script and uboot ddr phy cod. > > > > Improve REAMME file to include where to download firmware and imx-mkimage > > and how to build > > > > Add review tags on the V2 patchset. > > > > Hope this patchset could catch up next release :) > > > > V2: > > > > patch 02/23: convert to structure, drop is_boot_from_usb and > > disconnect_from_usb > > patch 04/23: conver to use structure for the clock driver, removed the > > CCM_xxx macros. Add static for local functons. > > Add init_usdhc_clk, init_uart_clk and etc to not enable > > them all at default. > > patch 05/23: Add more commit msg for the sip part. > > patch 08/23: Merge the spl boot device with i.MX7 > > patch 12/23: Typo fix and return error fix from Heiko for the SoC related part > > patch 22/23: Use a weak function ddr_init. If patch 23/23 could not be > > accepted at current stage, to make others still be could be > > compiled. > > > > The patchset depends on > > https://patchwork.ozlabs.org/patch/841934/ > > https://patchwork.ozlabs.org/patch/841958/ > > to be tested on real hardware. > > > > V1: > > > > patch: "power: pmic.h: include dm/ofnode.h" and > > "power: pmic/regulator allow dm be omited by SPL" is previously reviewed > > in mailist to not merged. If no issue, you may pick it up. > > > > The board support is a large patch because of the ddr related code. > > If it is not good, please first review/pick-up other patches if they > > are ok. > > > > > > > > Peng Fan (29): > > imx: add i.MX8M into Kconfig > > imx: mx8m: add register definition header file > > imx: mx8m: add pin header file > > imx: mx8m: add clock driver > > imx: add sip function > > imx: boot_mode: add USB_BOOT entry > > imx: cpu: update cpu file to support i.MX8M > > imx: spl: implement spl_boot_device for i.MX8M > > imx: add i.MX8MQ SoC Revision and is_mx8m helper > > imx: add pad settings bit definition for i.MX8M > > imx: cpu: move speed/temp to common cpu > > imx: cpu: add cpu speed/grade for i.MX8M > > imx: refactor imx_get_mac_from_fuse > > imx: cleanup bootaux > > imx: bootaux: support i.MX8M > > imx: mx7: move get_boot_device to cpu.c > > imx: cpu: support get_boot_device for i.MX8M > > imx: mx7: move mmc env code to mmc_env.c > > imx: mx8m: add soc related settings and files > > imx: makefile: compile files for i.MX8M > > misc: ocotp: add i.MX8M support > > mmc: fsl_esdhc: support i.MX8M > > imx: lcdif: include i.MX8M > > gpio: mxc: add i.MX8M support > > net: fec: do not access reserved register for i.MX8M > > imx: imx8mq: add dtsi file > > power: pmic/regulator allow dm be omitted by SPL > > imx: mx8m: add ddr controller memory map > > imx: add i.MX8MQ EVK support > > > > Tom Rini (1): > > arm: imx: Rework i.MX specific commands to be excluded from SPL > > > > Ye Li (1): > > net: fec: fix build warnings for 64bits support > > > > I was able to run your patchset on my board. > > For the whole series: > > Tested-by: Diego Dorta <diego.dorta@nxp.com> > > Thanks, > Diego > _______________________________________________ > U-Boot mailing list > U-Boot@lists.denx.de > https://lists.denx.de/listinfo/u-boot Peng, Will you be releasing the script you are using to convert that code generated by the ddr training tool into this format? I would like to test your patchset on our new SOMs and that would be very useful. Thanks, Jon
Hi Peng, On Fri, Aug 31, 2018 at 3:27 AM, Jon Nettleton <jon@solid-run.com> wrote: > Peng, > > Will you be releasing the script you are using to convert that code > generated by the ddr training tool into this format? I would like to > test your patchset on our new SOMs and that would be very useful. Any comments about the DDR init script? Looks like we are stuck in this issue for a long time. Any progress? Thanks
On Thu, Sep 6, 2018 at 3:37 PM Fabio Estevam <festevam@gmail.com> wrote: > > Hi Peng, > > On Fri, Aug 31, 2018 at 3:27 AM, Jon Nettleton <jon@solid-run.com> wrote: > > > Peng, > > > > Will you be releasing the script you are using to convert that code > > generated by the ddr training tool into this format? I would like to > > test your patchset on our new SOMs and that would be very useful. > > Any comments about the DDR init script? Looks like we are stuck in > this issue for a long time. > I have been chewing on this over the past week, and I am starting to think that u-boot is not necessarily the right place for the DDR initialization for this platform. We require ATF in order to load the lpddr4 firmware regardless, so why not do the DDR training and configuration there? This would also abstract out the proprietary memory bits so the code doesn't need to be re-duplicated in the various bootloaders. In theory it should also simplify the MX8 image scripts since SPL would not be a requirement. Thoughts?
Hi Jon, > -----Original Message----- > From: Jon Nettleton [mailto:jon@solid-run.com] > Sent: 2018年9月7日 14:03 > To: Fabio Estevam <festevam@gmail.com> > Cc: Peng Fan <peng.fan@nxp.com>; Diego Dorta <diegohdorta@gmail.com>; > Fabio Estevam <fabio.estevam@nxp.com>; U-Boot Mailing List > <u-boot@lists.denx.de> > Subject: Re: [U-Boot] [PATCH V5 00/31] imx: add i.MX8M support and i.MX8MQ > EVK > > On Thu, Sep 6, 2018 at 3:37 PM Fabio Estevam <festevam@gmail.com> wrote: > > > > Hi Peng, > > > > On Fri, Aug 31, 2018 at 3:27 AM, Jon Nettleton <jon@solid-run.com> wrote: > > > > > Peng, > > > > > > Will you be releasing the script you are using to convert that code > > > generated by the ddr training tool into this format? I would like > > > to test your patchset on our new SOMs and that would be very useful. > > > > Any comments about the DDR init script? Looks like we are stuck in > > this issue for a long time. > > > > I have been chewing on this over the past week, and I am starting to think that > u-boot is not necessarily the right place for the DDR initialization for this > platform. We require ATF in order to load the > lpddr4 firmware regardless, so why not do the DDR training and configuration > there? This would also abstract out the proprietary memory bits so the code > doesn't need to be re-duplicated in the various bootloaders. In theory it should > also simplify the MX8 image scripts since SPL would not be a requirement. On i.MX8M, SPL is used to initialize DDR and load ATF/TEE/U-Boot to memory and kick ATF. Two option: 1. Move DDR code out of SPL and make it a standalone image, then pad it the SPL. The drawback is need a new repo holding ddr code. 2. Restructure the DDR code the make it generic enough. One engineer in NXP is looking into restructure code, but priority is low. Regards, Peng. > > Thoughts?
This patchset is to add i.MX8M and i.MX8MQ-EVK support V5: Drop wait_mask_set/clr_timeout and switch to use readl_poll_timeout in the patchset. V4: Regenerate patchset based on Tom's master tree. In this patchset, https://patchwork.ozlabs.org/patch/855027/ "arm: imx: Rework i.MX specific commands to be excluded from SPL" from Tom is included to avoid merge conflicts because the i.mx8m change also has some modification to bootaux and arch/arm/mach-imx/Makefile. Because CONFIG_GPT_TIMER change, I did a small modification to apply Tom's patch, no function change. Include ATF link in README. V3: This patchset based on https://patchwork.ozlabs.org/patch/855027/ "arm: imx: Rework i.MX specific commands to be excluded from SPL" from Tom to avoid this patchset fail apply after Tom's patch merged. Previously "power: pmic/regulator allow dm be omited by SPL" broke other boards, in V3 patchset, only touch pfuze100 related options. Sharing code about get mac from fuse between mx7/mx8m Sharing code about bootaux between mx6/7/mx8m Sharing code about cpu speed grade between mx7/mx8m Sharing code about get boot device between mx7/mx8m Sharding code about mmc env between mx7/mx8m Introduce wait_mask_set/clr_timeout to avoid deadloop in clock pll configuration Correct authorship of fix building warning on fec arm64, patch 27/31. Switch to use structure for DDR Controller. For DDR PHY registers, there are about more than 10 thousands registers, I could not convert them with detailed register name, and the script is generated from IC team, So I use regs[0xxxxx] arrays here fo easily converting between IC team released script and uboot ddr phy cod. Improve REAMME file to include where to download firmware and imx-mkimage and how to build Add review tags on the V2 patchset. Hope this patchset could catch up next release :) V2: patch 02/23: convert to structure, drop is_boot_from_usb and disconnect_from_usb patch 04/23: conver to use structure for the clock driver, removed the CCM_xxx macros. Add static for local functons. Add init_usdhc_clk, init_uart_clk and etc to not enable them all at default. patch 05/23: Add more commit msg for the sip part. patch 08/23: Merge the spl boot device with i.MX7 patch 12/23: Typo fix and return error fix from Heiko for the SoC related part patch 22/23: Use a weak function ddr_init. If patch 23/23 could not be accepted at current stage, to make others still be could be compiled. The patchset depends on https://patchwork.ozlabs.org/patch/841934/ https://patchwork.ozlabs.org/patch/841958/ to be tested on real hardware. V1: patch: "power: pmic.h: include dm/ofnode.h" and "power: pmic/regulator allow dm be omited by SPL" is previously reviewed in mailist to not merged. If no issue, you may pick it up. The board support is a large patch because of the ddr related code. If it is not good, please first review/pick-up other patches if they are ok. Peng Fan (29): imx: add i.MX8M into Kconfig imx: mx8m: add register definition header file imx: mx8m: add pin header file imx: mx8m: add clock driver imx: add sip function imx: boot_mode: add USB_BOOT entry imx: cpu: update cpu file to support i.MX8M imx: spl: implement spl_boot_device for i.MX8M imx: add i.MX8MQ SoC Revision and is_mx8m helper imx: add pad settings bit definition for i.MX8M imx: cpu: move speed/temp to common cpu imx: cpu: add cpu speed/grade for i.MX8M imx: refactor imx_get_mac_from_fuse imx: cleanup bootaux imx: bootaux: support i.MX8M imx: mx7: move get_boot_device to cpu.c imx: cpu: support get_boot_device for i.MX8M imx: mx7: move mmc env code to mmc_env.c imx: mx8m: add soc related settings and files imx: makefile: compile files for i.MX8M misc: ocotp: add i.MX8M support mmc: fsl_esdhc: support i.MX8M imx: lcdif: include i.MX8M gpio: mxc: add i.MX8M support net: fec: do not access reserved register for i.MX8M imx: imx8mq: add dtsi file power: pmic/regulator allow dm be omitted by SPL imx: mx8m: add ddr controller memory map imx: add i.MX8MQ EVK support Tom Rini (1): arm: imx: Rework i.MX specific commands to be excluded from SPL Ye Li (1): net: fec: fix build warnings for 64bits support arch/arm/Kconfig | 14 +- arch/arm/Makefile | 4 +- arch/arm/dts/Makefile | 2 + arch/arm/dts/fsl-imx8-ca53.dtsi | 92 ++ arch/arm/dts/fsl-imx8mq-evk.dts | 424 +++++++++ arch/arm/dts/fsl-imx8mq.dtsi | 429 +++++++++ arch/arm/include/asm/arch-imx/cpu.h | 6 +- arch/arm/include/asm/arch-mx6/imx-regs.h | 9 +- arch/arm/include/asm/arch-mx7/imx-regs.h | 18 +- arch/arm/include/asm/arch-mx8m/clock.h | 657 +++++++++++++ arch/arm/include/asm/arch-mx8m/crm_regs.h | 10 + arch/arm/include/asm/arch-mx8m/ddr.h | 365 ++++++++ arch/arm/include/asm/arch-mx8m/gpio.h | 12 + arch/arm/include/asm/arch-mx8m/imx-regs.h | 468 ++++++++++ arch/arm/include/asm/arch-mx8m/mx8mq_pins.h | 623 +++++++++++++ arch/arm/include/asm/arch-mx8m/sys_proto.h | 18 + arch/arm/include/asm/mach-imx/boot_mode.h | 10 + arch/arm/include/asm/mach-imx/iomux-v3.h | 22 +- arch/arm/include/asm/mach-imx/regs-lcdif.h | 10 +- arch/arm/include/asm/mach-imx/sys_proto.h | 4 + arch/arm/mach-imx/Makefile | 23 +- arch/arm/mach-imx/cpu.c | 130 ++- arch/arm/mach-imx/imx_bootaux.c | 51 +- arch/arm/mach-imx/mac.c | 61 ++ arch/arm/mach-imx/mmc_env.c | 30 + arch/arm/mach-imx/mx5/clock.c | 4 +- arch/arm/mach-imx/mx6/soc.c | 72 -- arch/arm/mach-imx/mx7/clock.c | 2 + arch/arm/mach-imx/mx7/soc.c | 195 ---- arch/arm/mach-imx/mx7ulp/clock.c | 2 + arch/arm/mach-imx/mx8m/Kconfig | 22 + arch/arm/mach-imx/mx8m/Makefile | 8 + arch/arm/mach-imx/mx8m/clock.c | 795 ++++++++++++++++ arch/arm/mach-imx/mx8m/clock_slice.c | 742 +++++++++++++++ arch/arm/mach-imx/mx8m/lowlevel_init.S | 63 ++ arch/arm/mach-imx/mx8m/soc.c | 227 +++++ arch/arm/mach-imx/sip.c | 23 + arch/arm/mach-imx/spl.c | 10 +- board/freescale/mx8mq_evk/Kconfig | 12 + board/freescale/mx8mq_evk/Makefile | 12 + board/freescale/mx8mq_evk/README | 47 + board/freescale/mx8mq_evk/ddr/ddr_init.c | 246 +++++ board/freescale/mx8mq_evk/ddr/ddrphy_train.c | 1272 ++++++++++++++++++++++++++ board/freescale/mx8mq_evk/ddr/helper.c | 101 ++ board/freescale/mx8mq_evk/mx8mq_evk.c | 156 ++++ board/freescale/mx8mq_evk/spl.c | 230 +++++ configs/mx8mq_evk_defconfig | 27 + drivers/gpio/mxc_gpio.c | 22 +- drivers/misc/mxc_ocotp.c | 7 + drivers/mmc/fsl_esdhc.c | 12 +- drivers/net/fec_mxc.c | 78 +- drivers/power/pmic/Makefile | 2 +- drivers/power/regulator/Makefile | 2 +- include/configs/mx8mq_evk.h | 269 ++++++ include/dt-bindings/clock/imx8mq-clock.h | 612 +++++++++++++ include/dt-bindings/pinctrl/pins-imx8mq.h | 632 +++++++++++++ include/imx_sip.h | 14 + 57 files changed, 9047 insertions(+), 363 deletions(-) create mode 100644 arch/arm/dts/fsl-imx8-ca53.dtsi create mode 100644 arch/arm/dts/fsl-imx8mq-evk.dts create mode 100644 arch/arm/dts/fsl-imx8mq.dtsi create mode 100644 arch/arm/include/asm/arch-mx8m/clock.h create mode 100644 arch/arm/include/asm/arch-mx8m/crm_regs.h create mode 100644 arch/arm/include/asm/arch-mx8m/ddr.h create mode 100644 arch/arm/include/asm/arch-mx8m/gpio.h create mode 100644 arch/arm/include/asm/arch-mx8m/imx-regs.h create mode 100644 arch/arm/include/asm/arch-mx8m/mx8mq_pins.h create mode 100644 arch/arm/include/asm/arch-mx8m/sys_proto.h create mode 100644 arch/arm/mach-imx/mac.c create mode 100644 arch/arm/mach-imx/mmc_env.c create mode 100644 arch/arm/mach-imx/mx8m/Kconfig create mode 100644 arch/arm/mach-imx/mx8m/Makefile create mode 100644 arch/arm/mach-imx/mx8m/clock.c create mode 100644 arch/arm/mach-imx/mx8m/clock_slice.c create mode 100644 arch/arm/mach-imx/mx8m/lowlevel_init.S create mode 100644 arch/arm/mach-imx/mx8m/soc.c create mode 100644 arch/arm/mach-imx/sip.c create mode 100644 board/freescale/mx8mq_evk/Kconfig create mode 100644 board/freescale/mx8mq_evk/Makefile create mode 100644 board/freescale/mx8mq_evk/README create mode 100644 board/freescale/mx8mq_evk/ddr/ddr_init.c create mode 100644 board/freescale/mx8mq_evk/ddr/ddrphy_train.c create mode 100644 board/freescale/mx8mq_evk/ddr/helper.c create mode 100644 board/freescale/mx8mq_evk/mx8mq_evk.c create mode 100644 board/freescale/mx8mq_evk/spl.c create mode 100644 configs/mx8mq_evk_defconfig create mode 100644 include/configs/mx8mq_evk.h create mode 100644 include/dt-bindings/clock/imx8mq-clock.h create mode 100644 include/dt-bindings/pinctrl/pins-imx8mq.h create mode 100644 include/imx_sip.h