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GET /api/patches/1585745/?format=api
{ "id": 1585745, "url": "http://patchwork.ozlabs.org/api/patches/1585745/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20220128153009.2467560-12-peter.maydell@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20220128153009.2467560-12-peter.maydell@linaro.org>", "list_archive_url": null, "date": "2022-01-28T15:29:48", "name": "[PULL,11/32] hw/arm/xlnx-versal: Connect the OSPI flash memory controller model", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "9c84f66b31aab6b748dddf299f611ff3d72274c8", "submitter": { "id": 5111, "url": "http://patchwork.ozlabs.org/api/people/5111/?format=api", "name": "Peter Maydell", "email": "peter.maydell@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20220128153009.2467560-12-peter.maydell@linaro.org/mbox/", "series": [ { "id": 283405, "url": "http://patchwork.ozlabs.org/api/series/283405/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=283405", "date": "2022-01-28T15:29:53", "name": "[PULL,01/32] Update copyright dates to 2022", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/283405/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1585745/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1585745/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "bilbo.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=gGi+tPmA;\n\tdkim-atps=neutral", "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=<UNKNOWN>)" ], "Received": [ "from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby bilbo.ozlabs.org (Postfix) with ESMTPS id 4JlhwX2bBpz9t3b\n\tfor <incoming@patchwork.ozlabs.org>; Sat, 29 Jan 2022 02:59:24 +1100 (AEDT)", "from localhost ([::1]:42606 helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1nDTek-0004EE-4z\n\tfor incoming@patchwork.ozlabs.org; Fri, 28 Jan 2022 10:59:22 -0500", "from eggs.gnu.org ([209.51.188.92]:57910)\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <peter.maydell@linaro.org>)\n id 1nDTDJ-0002DY-N6\n for qemu-devel@nongnu.org; Fri, 28 Jan 2022 10:31:03 -0500", "from [2a00:1450:4864:20::429] (port=39613\n helo=mail-wr1-x429.google.com)\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from <peter.maydell@linaro.org>)\n id 1nDTDF-0006PY-1m\n for qemu-devel@nongnu.org; Fri, 28 Jan 2022 10:30:59 -0500", "by mail-wr1-x429.google.com with SMTP id s9so11560413wrb.6\n for <qemu-devel@nongnu.org>; Fri, 28 Jan 2022 07:30:28 -0800 (PST)", "from orth.archaic.org.uk (orth.archaic.org.uk. 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:references:mime-version:content-transfer-encoding;\n bh=lput9ZyfBONy+UwUh17f5j4R/MQZh8iGWIehnxeMxGQ=;\n b=BfkVT7RsiEvgOfYBC3M20P6nd0RB3d82fV86q0h9Kf910G4tzDr9AVtwFebaEhufJv\n qBCBv3thMScKkoEBQQVHahZmpkOpxZFFG/YU7L2NFFDV15LagGPYNbAIHTO/k6+CIH1w\n y+v76w73MhhXF6So319ATgD2y5y4ngX2iOmfl0tuYdFOCxZBGP8vb3Ejo4oqLAeUpbar\n gtN2bKONANfdwIgXkw+WlnI74hIJWl4fWkIO3ZDx6T2yyazISTZhFQPWey1Lu13UtKxt\n pycs1vtNlkvjUzJUlcSFE/2m2LUw6khisAxBVY5kjVwDjs5qbuKteh2ihjtuAtROgaR4\n tQSw==", "X-Gm-Message-State": "AOAM531Ik+N30/dkyvIbQ/w4pACtcjDpcRWIj64ZltRn7z+8Y2gY1zE1\n H3/ZvAMUUyDSwVNIM9BUO7JFSQJrreQZOA==", "X-Google-Smtp-Source": "\n ABdhPJwqfKJPX2Udzzl+4KenxmiqWI1GhTFsxY9UsyBNSuq53mQif1ZxyLYaG2YsH2/3TC/IpYrfAQ==", "X-Received": "by 2002:a5d:698f:: with SMTP id g15mr7401342wru.273.1643383827641;\n Fri, 28 Jan 2022 07:30:27 -0800 (PST)", "From": "Peter Maydell <peter.maydell@linaro.org>", "To": "qemu-devel@nongnu.org", "Subject": "[PULL 11/32] hw/arm/xlnx-versal: Connect the OSPI flash memory\n controller model", "Date": "Fri, 28 Jan 2022 15:29:48 +0000", "Message-Id": "<20220128153009.2467560-12-peter.maydell@linaro.org>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20220128153009.2467560-1-peter.maydell@linaro.org>", "References": "<20220128153009.2467560-1-peter.maydell@linaro.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-Host-Lookup-Failed": "Reverse DNS lookup failed for 2a00:1450:4864:20::429\n (failed)", "Received-SPF": "pass client-ip=2a00:1450:4864:20::429;\n envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x429.google.com", "X-Spam_score_int": "-12", "X-Spam_score": "-1.3", "X-Spam_bar": "-", "X-Spam_report": "(-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793,\n SPF_HELO_NONE=0.001, SPF_PASS=-0.001,\n T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "From: Francisco Iglesias <francisco.iglesias@xilinx.com>\n\nConnect the OSPI flash memory controller model (including the source and\ndestination DMA).\n\nSigned-off-by: Francisco Iglesias <francisco.iglesias@xilinx.com>\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\nMessage-id: 20220121161141.14389-8-francisco.iglesias@xilinx.com\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>\n---\n include/hw/arm/xlnx-versal.h | 20 ++++++++\n hw/arm/xlnx-versal.c | 93 ++++++++++++++++++++++++++++++++++++\n 2 files changed, 113 insertions(+)", "diff": "diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h\nindex 811df73350b..1b5ad4de802 100644\n--- a/include/hw/arm/xlnx-versal.h\n+++ b/include/hw/arm/xlnx-versal.h\n@@ -26,6 +26,8 @@\n #include \"hw/misc/xlnx-versal-xramc.h\"\n #include \"hw/nvram/xlnx-bbram.h\"\n #include \"hw/nvram/xlnx-versal-efuse.h\"\n+#include \"hw/ssi/xlnx-versal-ospi.h\"\n+#include \"hw/dma/xlnx_csu_dma.h\"\n #include \"hw/misc/xlnx-versal-pmc-iou-slcr.h\"\n \n #define TYPE_XLNX_VERSAL \"xlnx-versal\"\n@@ -80,6 +82,14 @@ struct Versal {\n struct {\n SDHCIState sd[XLNX_VERSAL_NR_SDS];\n XlnxVersalPmcIouSlcr slcr;\n+\n+ struct {\n+ XlnxVersalOspi ospi;\n+ XlnxCSUDMA dma_src;\n+ XlnxCSUDMA dma_dst;\n+ MemoryRegion linear_mr;\n+ qemu_or_irq irq_orgate;\n+ } ospi;\n } iou;\n \n XlnxZynqMPRTC rtc;\n@@ -116,6 +126,7 @@ struct Versal {\n #define VERSAL_ADMA_IRQ_0 60\n #define VERSAL_XRAM_IRQ_0 79\n #define VERSAL_PMC_APB_IRQ 121\n+#define VERSAL_OSPI_IRQ 124\n #define VERSAL_SD0_IRQ_0 126\n #define VERSAL_EFUSE_IRQ 139\n #define VERSAL_RTC_ALARM_IRQ 142\n@@ -184,6 +195,15 @@ struct Versal {\n #define MM_PMC_PMC_IOU_SLCR 0xf1060000\n #define MM_PMC_PMC_IOU_SLCR_SIZE 0x10000\n \n+#define MM_PMC_OSPI 0xf1010000\n+#define MM_PMC_OSPI_SIZE 0x10000\n+\n+#define MM_PMC_OSPI_DAC 0xc0000000\n+#define MM_PMC_OSPI_DAC_SIZE 0x20000000\n+\n+#define MM_PMC_OSPI_DMA_DST 0xf1011800\n+#define MM_PMC_OSPI_DMA_SRC 0xf1011000\n+\n #define MM_PMC_SD0 0xf1040000U\n #define MM_PMC_SD0_SIZE 0x10000\n #define MM_PMC_BBRAM_CTRL 0xf11f0000\ndiff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c\nindex c8c0c102c74..ab58bebfd2e 100644\n--- a/hw/arm/xlnx-versal.c\n+++ b/hw/arm/xlnx-versal.c\n@@ -28,6 +28,7 @@\n #define GEM_REVISION 0x40070106\n \n #define VERSAL_NUM_PMC_APB_IRQS 3\n+#define NUM_OSPI_IRQ_LINES 3\n \n static void versal_create_apu_cpus(Versal *s)\n {\n@@ -412,6 +413,97 @@ static void versal_create_pmc_iou_slcr(Versal *s, qemu_irq *pic)\n qdev_get_gpio_in(DEVICE(&s->pmc.apb_irq_orgate), 2));\n }\n \n+static void versal_create_ospi(Versal *s, qemu_irq *pic)\n+{\n+ SysBusDevice *sbd;\n+ MemoryRegion *mr_dac;\n+ qemu_irq ospi_mux_sel;\n+ DeviceState *orgate;\n+\n+ memory_region_init(&s->pmc.iou.ospi.linear_mr, OBJECT(s),\n+ \"versal-ospi-linear-mr\" , MM_PMC_OSPI_DAC_SIZE);\n+\n+ object_initialize_child(OBJECT(s), \"versal-ospi\", &s->pmc.iou.ospi.ospi,\n+ TYPE_XILINX_VERSAL_OSPI);\n+\n+ mr_dac = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->pmc.iou.ospi.ospi), 1);\n+ memory_region_add_subregion(&s->pmc.iou.ospi.linear_mr, 0x0, mr_dac);\n+\n+ /* Create the OSPI destination DMA */\n+ object_initialize_child(OBJECT(s), \"versal-ospi-dma-dst\",\n+ &s->pmc.iou.ospi.dma_dst,\n+ TYPE_XLNX_CSU_DMA);\n+\n+ object_property_set_link(OBJECT(&s->pmc.iou.ospi.dma_dst),\n+ \"dma\", OBJECT(get_system_memory()),\n+ &error_abort);\n+\n+ sbd = SYS_BUS_DEVICE(&s->pmc.iou.ospi.dma_dst);\n+ sysbus_realize(sbd, &error_fatal);\n+\n+ memory_region_add_subregion(&s->mr_ps, MM_PMC_OSPI_DMA_DST,\n+ sysbus_mmio_get_region(sbd, 0));\n+\n+ /* Create the OSPI source DMA */\n+ object_initialize_child(OBJECT(s), \"versal-ospi-dma-src\",\n+ &s->pmc.iou.ospi.dma_src,\n+ TYPE_XLNX_CSU_DMA);\n+\n+ object_property_set_bool(OBJECT(&s->pmc.iou.ospi.dma_src), \"is-dst\",\n+ false, &error_abort);\n+\n+ object_property_set_link(OBJECT(&s->pmc.iou.ospi.dma_src),\n+ \"dma\", OBJECT(mr_dac), &error_abort);\n+\n+ object_property_set_link(OBJECT(&s->pmc.iou.ospi.dma_src),\n+ \"stream-connected-dma\",\n+ OBJECT(&s->pmc.iou.ospi.dma_dst),\n+ &error_abort);\n+\n+ sbd = SYS_BUS_DEVICE(&s->pmc.iou.ospi.dma_src);\n+ sysbus_realize(sbd, &error_fatal);\n+\n+ memory_region_add_subregion(&s->mr_ps, MM_PMC_OSPI_DMA_SRC,\n+ sysbus_mmio_get_region(sbd, 0));\n+\n+ /* Realize the OSPI */\n+ object_property_set_link(OBJECT(&s->pmc.iou.ospi.ospi), \"dma-src\",\n+ OBJECT(&s->pmc.iou.ospi.dma_src), &error_abort);\n+\n+ sbd = SYS_BUS_DEVICE(&s->pmc.iou.ospi.ospi);\n+ sysbus_realize(sbd, &error_fatal);\n+\n+ memory_region_add_subregion(&s->mr_ps, MM_PMC_OSPI,\n+ sysbus_mmio_get_region(sbd, 0));\n+\n+ memory_region_add_subregion(&s->mr_ps, MM_PMC_OSPI_DAC,\n+ &s->pmc.iou.ospi.linear_mr);\n+\n+ /* ospi_mux_sel */\n+ ospi_mux_sel = qdev_get_gpio_in_named(DEVICE(&s->pmc.iou.ospi.ospi),\n+ \"ospi-mux-sel\", 0);\n+ qdev_connect_gpio_out_named(DEVICE(&s->pmc.iou.slcr), \"ospi-mux-sel\", 0,\n+ ospi_mux_sel);\n+\n+ /* OSPI irq */\n+ object_initialize_child(OBJECT(s), \"ospi-irq-orgate\",\n+ &s->pmc.iou.ospi.irq_orgate, TYPE_OR_IRQ);\n+ object_property_set_int(OBJECT(&s->pmc.iou.ospi.irq_orgate),\n+ \"num-lines\", NUM_OSPI_IRQ_LINES, &error_fatal);\n+\n+ orgate = DEVICE(&s->pmc.iou.ospi.irq_orgate);\n+ qdev_realize(orgate, NULL, &error_fatal);\n+\n+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->pmc.iou.ospi.ospi), 0,\n+ qdev_get_gpio_in(orgate, 0));\n+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->pmc.iou.ospi.dma_src), 0,\n+ qdev_get_gpio_in(orgate, 1));\n+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->pmc.iou.ospi.dma_dst), 0,\n+ qdev_get_gpio_in(orgate, 2));\n+\n+ qdev_connect_gpio_out(orgate, 0, pic[VERSAL_OSPI_IRQ]);\n+}\n+\n /* This takes the board allocated linear DDR memory and creates aliases\n * for each split DDR range/aperture on the Versal address map.\n */\n@@ -552,6 +644,7 @@ static void versal_realize(DeviceState *dev, Error **errp)\n versal_create_bbram(s, pic);\n versal_create_efuse(s, pic);\n versal_create_pmc_iou_slcr(s, pic);\n+ versal_create_ospi(s, pic);\n versal_map_ddr(s);\n versal_unimp(s);\n \n", "prefixes": [ "PULL", "11/32" ] }