diff mbox series

[2/2,SRU,F/J] drm/amd/display: fix stale info in link encoder assignment

Message ID 20220503151035.78544-3-koba.ko@canonical.com
State New
Headers show
Series Fix REG_WAIT timeout for Yellow Carp | expand

Commit Message

Koba Ko May 3, 2022, 3:10 p.m. UTC 
From: Roy Chan <roy.chan@amd.com>

BugLink: https://bugs.launchpad.net/bugs/1971417

[Why]
The link encoder assignment leaves the old stream data when it was
unassigned. When the clear encoder assignment is called, it based on the
old stale data to access the de-allocated stream.

[How]
There should be no need to explicitly clean up the link encoder
assignment if the unassign loop does the work properly, the loop should
base on the current state to clean up the assignment.

Also, the unassignment should better clean up the values in the
assignement slots as well.

Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Roy Chan <roy.chan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit e43098f6abb033142810e695c1b3d9cf61e19849)
Signed-off-by: Koba Ko <koba.ko@canonical.com>
---
 debian.oem/changelog                          |  2 +-
 .../drm/amd/display/dc/core/dc_link_enc_cfg.c | 25 +++++++++++++++----
 2 files changed, 21 insertions(+), 6 deletions(-)
diff mbox series

Patch

diff --git a/debian.oem/changelog b/debian.oem/changelog
index 604e2a8136607..62a069da1ca35 100644
--- a/debian.oem/changelog
+++ b/debian.oem/changelog
@@ -1,4 +1,4 @@ 
-linux-oem-5.14 (5.14.0-1033.36) focal; urgency=medium
+linux-oem-5.14 (5.14.0-1033lpv1970872.36) focal; urgency=medium
 
   * focal/linux-oem-5.14: 5.14.0-1033.36 -proposed tracker (LP: #1967397)
 
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c
index 4dce25c39b756..eb162043ea5b9 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c
@@ -119,7 +119,10 @@  static void remove_link_enc_assignment(
 				 */
 				if (get_stream_using_link_enc(state, eng_id) == NULL)
 					state->res_ctx.link_enc_cfg_ctx.link_enc_avail[eng_idx] = eng_id;
+
 				stream->link_enc = NULL;
+				state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i].eng_id = ENGINE_ID_UNKNOWN;
+				state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i].stream = NULL;
 				break;
 			}
 		}
@@ -224,18 +227,30 @@  static struct link_encoder *get_link_enc_used_by_link(
 	return link_enc;
 }
 
-void link_enc_cfg_init(
-		struct dc *dc,
-		struct dc_state *state)
+/* Clear all link encoder assignments. */
+static void clear_enc_assignments(struct dc *dc, struct dc_state *state)
 {
 	int i;
 
+	for (i = 0; i < MAX_PIPES; i++) {
+		state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i].valid = false;
+		state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i].eng_id = ENGINE_ID_UNKNOWN;
+		state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i].stream = NULL;
+	}
+
 	for (i = 0; i < dc->res_pool->res_cap->num_dig_link_enc; i++) {
 		if (dc->res_pool->link_encoders[i])
 			state->res_ctx.link_enc_cfg_ctx.link_enc_avail[i] = (enum engine_id) i;
 		else
 			state->res_ctx.link_enc_cfg_ctx.link_enc_avail[i] = ENGINE_ID_UNKNOWN;
 	}
+}
+
+void link_enc_cfg_init(
+		struct dc *dc,
+		struct dc_state *state)
+{
+	clear_enc_assignments(dc, state);
 
 	state->res_ctx.link_enc_cfg_ctx.mode = LINK_ENC_CFG_STEADY;
 }
@@ -253,8 +268,8 @@  void link_enc_cfg_link_encs_assign(
 	ASSERT(state->stream_count == stream_count);
 
 	/* Release DIG link encoder resources before running assignment algorithm. */
-	for (i = 0; i < stream_count; i++)
-		dc->res_pool->funcs->link_enc_unassign(state, streams[i]);
+	for (i = 0; i < dc->current_state->stream_count; i++)
+		dc->res_pool->funcs->link_enc_unassign(state, dc->current_state->streams[i]);
 
 	for (i = 0; i < MAX_PIPES; i++)
 		ASSERT(state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i].valid == false);