| Message ID | 20220411092408.493754-2-vicamo.yang@canonical.com |
|---|---|
| State | New |
| Headers | show |
| Series | [1/1,SRU,Jammy] UBUNTU: SAUCE: vmd: fixup bridge ASPM by driver name instead | expand |
On 11.04.22 11:24, You-Sheng Yang wrote: > BugLink: https://bugs.launchpad.net/bugs/1942160 > > Additional VMD bridge IDs needed for new Alder Lake platforms, but > actually there is no a complete list for them. Here we match bridge > devices if they're directly attached to a VMD controller instead. > > Signed-off-by: You-Sheng Yang <vicamo.yang@canonical.com> This is changing some code added by us as SAUCE, so I guess not really upstream material. Acked-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com> Thanks > --- > drivers/pci/quirks.c | 32 +++++++++++++++++++++++--------- > 1 file changed, 23 insertions(+), 9 deletions(-) > > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c > index bf3af7d81bdc2..73e346d990b16 100644 > --- a/drivers/pci/quirks.c > +++ b/drivers/pci/quirks.c > @@ -5820,23 +5820,36 @@ DECLARE_PCI_FIXUP_CLASS_HEADER(0x1ac1, 0x089a, > PCI_CLASS_NOT_DEFINED, 8, apex_pci_fixup_class); > > /* > - * Device [8086:9a09], [8086:a0b0] and [8086:a0bc] > * BIOS may not be able to access config space of devices under VMD domain, so > * it relies on software to enable ASPM for links under VMD. > */ > -static const struct pci_device_id vmd_bridge_tbl[] = { > - { PCI_VDEVICE(INTEL, 0x9a09) }, > - { PCI_VDEVICE(INTEL, 0xa0b0) }, > - { PCI_VDEVICE(INTEL, 0xa0bc) }, > - { } > -}; > +static bool pci_fixup_is_vmd_bridge(struct pci_dev *pdev) > +{ > + struct pci_bus *bus = pdev->bus; > + struct device *dev; > + struct pci_driver *pdrv; > + > + if (!pci_is_root_bus(bus)) > + return false; > + > + dev = bus->bridge->parent; > + if (dev == NULL) > + return false; > + > + pdrv = pci_dev_driver(to_pci_dev(dev)); > + if (pdrv == NULL || strcmp("vmd", pdrv->name)) > + return false; > + > + return true; > +} > > static void pci_fixup_enable_aspm(struct pci_dev *pdev) > { > - if (!pci_match_id(vmd_bridge_tbl, pdev)) > + if (!pci_fixup_is_vmd_bridge(pdev)) > return; > > pdev->dev_flags |= PCI_DEV_FLAGS_ENABLE_ASPM; > + pci_info(pdev, "enable ASPM for pci bridge behind vmd"); > } > DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, > PCI_CLASS_BRIDGE_PCI, 8, pci_fixup_enable_aspm); > @@ -5851,7 +5864,7 @@ static void pci_fixup_enable_vmd_nvme_ltr(struct pci_dev *pdev) > if (!parent) > return; > > - if (!pci_match_id(vmd_bridge_tbl, parent)) > + if (!pci_fixup_is_vmd_bridge(parent)) > return; > > pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_LTR); > @@ -5869,6 +5882,7 @@ static void pci_fixup_enable_vmd_nvme_ltr(struct pci_dev *pdev) > /* 3145728ns, i.e. 0x300000ns */ > pci_write_config_word(pdev, pos + PCI_LTR_MAX_SNOOP_LAT, 0x1003); > pci_write_config_word(pdev, pos + PCI_LTR_MAX_NOSNOOP_LAT, 0x1003); > + pci_info(pdev, "enable LTR for nvme behind vmd"); > } > DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_ANY_ID, PCI_ANY_ID, > PCI_CLASS_STORAGE_EXPRESS, 0, pci_fixup_enable_vmd_nvme_ltr);
On 11.04.22 11:24, You-Sheng Yang wrote: > BugLink: https://bugs.launchpad.net/bugs/1942160 > > Additional VMD bridge IDs needed for new Alder Lake platforms, but > actually there is no a complete list for them. Here we match bridge > devices if they're directly attached to a VMD controller instead. > > Signed-off-by: You-Sheng Yang <vicamo.yang@canonical.com> Acked-by: Stefan Bader <stefan.bader@canonical.com> > --- > drivers/pci/quirks.c | 32 +++++++++++++++++++++++--------- > 1 file changed, 23 insertions(+), 9 deletions(-) > > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c > index bf3af7d81bdc2..73e346d990b16 100644 > --- a/drivers/pci/quirks.c > +++ b/drivers/pci/quirks.c > @@ -5820,23 +5820,36 @@ DECLARE_PCI_FIXUP_CLASS_HEADER(0x1ac1, 0x089a, > PCI_CLASS_NOT_DEFINED, 8, apex_pci_fixup_class); > > /* > - * Device [8086:9a09], [8086:a0b0] and [8086:a0bc] > * BIOS may not be able to access config space of devices under VMD domain, so > * it relies on software to enable ASPM for links under VMD. > */ > -static const struct pci_device_id vmd_bridge_tbl[] = { > - { PCI_VDEVICE(INTEL, 0x9a09) }, > - { PCI_VDEVICE(INTEL, 0xa0b0) }, > - { PCI_VDEVICE(INTEL, 0xa0bc) }, > - { } > -}; > +static bool pci_fixup_is_vmd_bridge(struct pci_dev *pdev) > +{ > + struct pci_bus *bus = pdev->bus; > + struct device *dev; > + struct pci_driver *pdrv; > + > + if (!pci_is_root_bus(bus)) > + return false; > + > + dev = bus->bridge->parent; > + if (dev == NULL) > + return false; > + > + pdrv = pci_dev_driver(to_pci_dev(dev)); > + if (pdrv == NULL || strcmp("vmd", pdrv->name)) > + return false; > + > + return true; > +} > > static void pci_fixup_enable_aspm(struct pci_dev *pdev) > { > - if (!pci_match_id(vmd_bridge_tbl, pdev)) > + if (!pci_fixup_is_vmd_bridge(pdev)) > return; > > pdev->dev_flags |= PCI_DEV_FLAGS_ENABLE_ASPM; > + pci_info(pdev, "enable ASPM for pci bridge behind vmd"); > } > DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, > PCI_CLASS_BRIDGE_PCI, 8, pci_fixup_enable_aspm); > @@ -5851,7 +5864,7 @@ static void pci_fixup_enable_vmd_nvme_ltr(struct pci_dev *pdev) > if (!parent) > return; > > - if (!pci_match_id(vmd_bridge_tbl, parent)) > + if (!pci_fixup_is_vmd_bridge(parent)) > return; > > pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_LTR); > @@ -5869,6 +5882,7 @@ static void pci_fixup_enable_vmd_nvme_ltr(struct pci_dev *pdev) > /* 3145728ns, i.e. 0x300000ns */ > pci_write_config_word(pdev, pos + PCI_LTR_MAX_SNOOP_LAT, 0x1003); > pci_write_config_word(pdev, pos + PCI_LTR_MAX_NOSNOOP_LAT, 0x1003); > + pci_info(pdev, "enable LTR for nvme behind vmd"); > } > DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_ANY_ID, PCI_ANY_ID, > PCI_CLASS_STORAGE_EXPRESS, 0, pci_fixup_enable_vmd_nvme_ltr);
On Tue, Apr 26, 2022 at 3:21 PM Kleber Souza <kleber.souza@canonical.com> wrote: > > On 11.04.22 11:24, You-Sheng Yang wrote: > > BugLink: https://bugs.launchpad.net/bugs/1942160 > > > > Additional VMD bridge IDs needed for new Alder Lake platforms, but > > actually there is no a complete list for them. Here we match bridge > > devices if they're directly attached to a VMD controller instead. > > > > Signed-off-by: You-Sheng Yang <vicamo.yang@canonical.com> > > This is changing some code added by us as SAUCE, so I guess not really > upstream material. Yes, this is our hack before Intel ever comes out a fix that addresses the same problem. There is one changeset https://lore.kernel.org/linux-pci/b3caabef-f91e-ff4d-dfe2-8aa0869fadb6@linux.dev/ proposed by Intel recently, but we've verified that is not sufficient for us to obsolete this hack yet. We'll see if it's getting mature in v5.18 or maybe v5.19. > Acked-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com> > > Thanks > > > --- > > drivers/pci/quirks.c | 32 +++++++++++++++++++++++--------- > > 1 file changed, 23 insertions(+), 9 deletions(-) > > > > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c > > index bf3af7d81bdc2..73e346d990b16 100644 > > --- a/drivers/pci/quirks.c > > +++ b/drivers/pci/quirks.c > > @@ -5820,23 +5820,36 @@ DECLARE_PCI_FIXUP_CLASS_HEADER(0x1ac1, 0x089a, > > PCI_CLASS_NOT_DEFINED, 8, apex_pci_fixup_class); > > > > /* > > - * Device [8086:9a09], [8086:a0b0] and [8086:a0bc] > > * BIOS may not be able to access config space of devices under VMD domain, so > > * it relies on software to enable ASPM for links under VMD. > > */ > > -static const struct pci_device_id vmd_bridge_tbl[] = { > > - { PCI_VDEVICE(INTEL, 0x9a09) }, > > - { PCI_VDEVICE(INTEL, 0xa0b0) }, > > - { PCI_VDEVICE(INTEL, 0xa0bc) }, > > - { } > > -}; > > +static bool pci_fixup_is_vmd_bridge(struct pci_dev *pdev) > > +{ > > + struct pci_bus *bus = pdev->bus; > > + struct device *dev; > > + struct pci_driver *pdrv; > > + > > + if (!pci_is_root_bus(bus)) > > + return false; > > + > > + dev = bus->bridge->parent; > > + if (dev == NULL) > > + return false; > > + > > + pdrv = pci_dev_driver(to_pci_dev(dev)); > > + if (pdrv == NULL || strcmp("vmd", pdrv->name)) > > + return false; > > + > > + return true; > > +} > > > > static void pci_fixup_enable_aspm(struct pci_dev *pdev) > > { > > - if (!pci_match_id(vmd_bridge_tbl, pdev)) > > + if (!pci_fixup_is_vmd_bridge(pdev)) > > return; > > > > pdev->dev_flags |= PCI_DEV_FLAGS_ENABLE_ASPM; > > + pci_info(pdev, "enable ASPM for pci bridge behind vmd"); > > } > > DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, > > PCI_CLASS_BRIDGE_PCI, 8, pci_fixup_enable_aspm); > > @@ -5851,7 +5864,7 @@ static void pci_fixup_enable_vmd_nvme_ltr(struct pci_dev *pdev) > > if (!parent) > > return; > > > > - if (!pci_match_id(vmd_bridge_tbl, parent)) > > + if (!pci_fixup_is_vmd_bridge(parent)) > > return; > > > > pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_LTR); > > @@ -5869,6 +5882,7 @@ static void pci_fixup_enable_vmd_nvme_ltr(struct pci_dev *pdev) > > /* 3145728ns, i.e. 0x300000ns */ > > pci_write_config_word(pdev, pos + PCI_LTR_MAX_SNOOP_LAT, 0x1003); > > pci_write_config_word(pdev, pos + PCI_LTR_MAX_NOSNOOP_LAT, 0x1003); > > + pci_info(pdev, "enable LTR for nvme behind vmd"); > > } > > DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_ANY_ID, PCI_ANY_ID, > > PCI_CLASS_STORAGE_EXPRESS, 0, pci_fixup_enable_vmd_nvme_ltr); >
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index bf3af7d81bdc2..73e346d990b16 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -5820,23 +5820,36 @@ DECLARE_PCI_FIXUP_CLASS_HEADER(0x1ac1, 0x089a, PCI_CLASS_NOT_DEFINED, 8, apex_pci_fixup_class); /* - * Device [8086:9a09], [8086:a0b0] and [8086:a0bc] * BIOS may not be able to access config space of devices under VMD domain, so * it relies on software to enable ASPM for links under VMD. */ -static const struct pci_device_id vmd_bridge_tbl[] = { - { PCI_VDEVICE(INTEL, 0x9a09) }, - { PCI_VDEVICE(INTEL, 0xa0b0) }, - { PCI_VDEVICE(INTEL, 0xa0bc) }, - { } -}; +static bool pci_fixup_is_vmd_bridge(struct pci_dev *pdev) +{ + struct pci_bus *bus = pdev->bus; + struct device *dev; + struct pci_driver *pdrv; + + if (!pci_is_root_bus(bus)) + return false; + + dev = bus->bridge->parent; + if (dev == NULL) + return false; + + pdrv = pci_dev_driver(to_pci_dev(dev)); + if (pdrv == NULL || strcmp("vmd", pdrv->name)) + return false; + + return true; +} static void pci_fixup_enable_aspm(struct pci_dev *pdev) { - if (!pci_match_id(vmd_bridge_tbl, pdev)) + if (!pci_fixup_is_vmd_bridge(pdev)) return; pdev->dev_flags |= PCI_DEV_FLAGS_ENABLE_ASPM; + pci_info(pdev, "enable ASPM for pci bridge behind vmd"); } DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, PCI_CLASS_BRIDGE_PCI, 8, pci_fixup_enable_aspm); @@ -5851,7 +5864,7 @@ static void pci_fixup_enable_vmd_nvme_ltr(struct pci_dev *pdev) if (!parent) return; - if (!pci_match_id(vmd_bridge_tbl, parent)) + if (!pci_fixup_is_vmd_bridge(parent)) return; pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_LTR); @@ -5869,6 +5882,7 @@ static void pci_fixup_enable_vmd_nvme_ltr(struct pci_dev *pdev) /* 3145728ns, i.e. 0x300000ns */ pci_write_config_word(pdev, pos + PCI_LTR_MAX_SNOOP_LAT, 0x1003); pci_write_config_word(pdev, pos + PCI_LTR_MAX_NOSNOOP_LAT, 0x1003); + pci_info(pdev, "enable LTR for nvme behind vmd"); } DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_EXPRESS, 0, pci_fixup_enable_vmd_nvme_ltr);
BugLink: https://bugs.launchpad.net/bugs/1942160 Additional VMD bridge IDs needed for new Alder Lake platforms, but actually there is no a complete list for them. Here we match bridge devices if they're directly attached to a VMD controller instead. Signed-off-by: You-Sheng Yang <vicamo.yang@canonical.com> --- drivers/pci/quirks.c | 32 +++++++++++++++++++++++--------- 1 file changed, 23 insertions(+), 9 deletions(-)