| Message ID | 20170712193635.4vvfifww3lg7ywdl@xps13.dannf |
|---|---|
| State | New |
| Headers | show |
On Wed, Jul 12, 2017 at 01:36:35PM -0600, dann frazier wrote: > From: Robin Murphy <robin.murphy@arm.com> > > BugLink: https://bugs.launchpad.net/bugs/1703437 > > Revision C of IORT now allows us to identify ARM MMU-401 and the Cavium > ThunderX implementation. Wire them up so that we can probe these models > once firmware starts using the new codes in place of generic ones, and > so that the appropriate features and quirks get enabled when we do. > > For the sake of backports and mitigating sychronisation problems with > the ACPICA headers, we'll carry a backup copy of the new definitions > locally for the short term to make life simpler. > > CC: stable@vger.kernel.org # 4.10 > Acked-by: Robert Richter <rrichter@cavium.com> > Tested-by: Robert Richter <rrichter@cavium.com> > Signed-off-by: Robin Murphy <robin.murphy@arm.com> > Signed-off-by: Will Deacon <will.deacon@arm.com> > (cherry picked from commit 84c24379a783c514e5ff7c8fc8a21cf8d64fd05f) > Signed-off-by: dann frazier <dann.frazier@canonical.com> Applied to artful/master-next and unstable/master, thanks.
On 12.07.2017 21:36, dann frazier wrote: > From: Robin Murphy <robin.murphy@arm.com> > > BugLink: https://bugs.launchpad.net/bugs/1703437 > > Revision C of IORT now allows us to identify ARM MMU-401 and the Cavium > ThunderX implementation. Wire them up so that we can probe these models > once firmware starts using the new codes in place of generic ones, and > so that the appropriate features and quirks get enabled when we do. > > For the sake of backports and mitigating sychronisation problems with > the ACPICA headers, we'll carry a backup copy of the new definitions > locally for the short term to make life simpler. > > CC: stable@vger.kernel.org # 4.10 > Acked-by: Robert Richter <rrichter@cavium.com> > Tested-by: Robert Richter <rrichter@cavium.com> > Signed-off-by: Robin Murphy <robin.murphy@arm.com> > Signed-off-by: Will Deacon <will.deacon@arm.com> > (cherry picked from commit 84c24379a783c514e5ff7c8fc8a21cf8d64fd05f) > Signed-off-by: dann frazier <dann.frazier@canonical.com> Acked-by: Stefan Bader <stefan.bader@canonical.com> > --- > drivers/iommu/arm-smmu.c | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c > index e63d0e8b656c..9aee256fca84 100644 > --- a/drivers/iommu/arm-smmu.c > +++ b/drivers/iommu/arm-smmu.c > @@ -310,6 +310,14 @@ enum arm_smmu_implementation { > CAVIUM_SMMUV2, > }; > > +/* Until ACPICA headers cover IORT rev. C */ > +#ifndef ACPI_IORT_SMMU_CORELINK_MMU401 > +#define ACPI_IORT_SMMU_CORELINK_MMU401 0x4 > +#endif > +#ifndef ACPI_IORT_SMMU_CAVIUM_THUNDERX > +#define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x5 > +#endif > + > struct arm_smmu_s2cr { > struct iommu_group *group; > int count; > @@ -2011,6 +2019,10 @@ static int acpi_smmu_get_data(u32 model, struct arm_smmu_device *smmu) > smmu->version = ARM_SMMU_V1; > smmu->model = GENERIC_SMMU; > break; > + case ACPI_IORT_SMMU_CORELINK_MMU401: > + smmu->version = ARM_SMMU_V1_64K; > + smmu->model = GENERIC_SMMU; > + break; > case ACPI_IORT_SMMU_V2: > smmu->version = ARM_SMMU_V2; > smmu->model = GENERIC_SMMU; > @@ -2019,6 +2031,10 @@ static int acpi_smmu_get_data(u32 model, struct arm_smmu_device *smmu) > smmu->version = ARM_SMMU_V2; > smmu->model = ARM_MMU500; > break; > + case ACPI_IORT_SMMU_CAVIUM_THUNDERX: > + smmu->version = ARM_SMMU_V2; > + smmu->model = CAVIUM_SMMUV2; > + break; > default: > ret = -ENODEV; > } >
Applied to zesty master-next branch. Thanks. Cascardo.
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index e63d0e8b656c..9aee256fca84 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -310,6 +310,14 @@ enum arm_smmu_implementation { CAVIUM_SMMUV2, }; +/* Until ACPICA headers cover IORT rev. C */ +#ifndef ACPI_IORT_SMMU_CORELINK_MMU401 +#define ACPI_IORT_SMMU_CORELINK_MMU401 0x4 +#endif +#ifndef ACPI_IORT_SMMU_CAVIUM_THUNDERX +#define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x5 +#endif + struct arm_smmu_s2cr { struct iommu_group *group; int count; @@ -2011,6 +2019,10 @@ static int acpi_smmu_get_data(u32 model, struct arm_smmu_device *smmu) smmu->version = ARM_SMMU_V1; smmu->model = GENERIC_SMMU; break; + case ACPI_IORT_SMMU_CORELINK_MMU401: + smmu->version = ARM_SMMU_V1_64K; + smmu->model = GENERIC_SMMU; + break; case ACPI_IORT_SMMU_V2: smmu->version = ARM_SMMU_V2; smmu->model = GENERIC_SMMU; @@ -2019,6 +2031,10 @@ static int acpi_smmu_get_data(u32 model, struct arm_smmu_device *smmu) smmu->version = ARM_SMMU_V2; smmu->model = ARM_MMU500; break; + case ACPI_IORT_SMMU_CAVIUM_THUNDERX: + smmu->version = ARM_SMMU_V2; + smmu->model = CAVIUM_SMMUV2; + break; default: ret = -ENODEV; }