Message ID | 1397777393-4492-1-git-send-email-kamal@canonical.com |
---|---|
State | New |
Headers | show |
Hi, Kamal, Except the patch in your email, there is another patch: https://lkml.org/lkml/2014/2/20/546 Please add this patch as well if not done yet. Thanks. -Fenghua > -----Original Message----- > From: Kamal Mostafa [mailto:kamal@canonical.com] > Sent: Thursday, April 17, 2014 4:30 PM > To: Yu, Fenghua > Cc: H. Peter Anvin; Kamal Mostafa; kernel-team@lists.ubuntu.com > Subject: [3.8.y.z extended stable] Patch "x86, AVX-512: AVX-512 Feature > Detection" has been added to staging queue > > This is a note to let you know that I have just added a patch titled > > x86, AVX-512: AVX-512 Feature Detection > > to the linux-3.8.y-queue branch of the 3.8.y.z extended stable tree > which can be found at: > > > http://kernel.ubuntu.com/git?p=ubuntu/linux.git;a=shortlog;h=refs/heads > /linux-3.8.y-queue > > This patch is scheduled to be released in version 3.8.13.22. > > If you, or anyone else, feels it should not be added to this tree, > please > reply to this email. > > For more information about the 3.8.y.z tree, see > https://wiki.ubuntu.com/Kernel/Dev/ExtendedStable > > Thanks. > -Kamal > > ------ > > From 072af6571a063dd603521b6c947cf094b7d347a1 Mon Sep 17 00:00:00 2001 > From: Fenghua Yu <fenghua.yu@intel.com> > Date: Thu, 20 Feb 2014 13:24:50 -0800 > Subject: x86, AVX-512: AVX-512 Feature Detection > > commit 8e5780fdeef7dc490b3f0b3a62704593721fa4f3 upstream. > > AVX-512 is an extention of AVX2. Its spec can be found at: > http://download- > software.intel.com/sites/default/files/managed/71/2e/319433-017.pdf > > This patch detects AVX-512 features by CPUID. > > Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> > Link: http://lkml.kernel.org/r/1392931491-33237-1-git-send-email- > fenghua.yu@intel.com > Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> > Signed-off-by: Kamal Mostafa <kamal@canonical.com> > --- > arch/x86/include/asm/cpufeature.h | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/x86/include/asm/cpufeature.h > b/arch/x86/include/asm/cpufeature.h > index d3f0db1..0480fb9 100644 > --- a/arch/x86/include/asm/cpufeature.h > +++ b/arch/x86/include/asm/cpufeature.h > @@ -211,9 +211,13 @@ > #define X86_FEATURE_ERMS (9*32+ 9) /* Enhanced REP MOVSB/STOSB */ > #define X86_FEATURE_INVPCID (9*32+10) /* Invalidate Processor Context > ID */ > #define X86_FEATURE_RTM (9*32+11) /* Restricted > Transactional Memory */ > +#define X86_FEATURE_AVX512F (9*32+16) /* AVX-512 Foundation */ > #define X86_FEATURE_RDSEED (9*32+18) /* The RDSEED instruction */ > #define X86_FEATURE_ADX (9*32+19) /* The ADCX and ADOX > instructions */ > #define X86_FEATURE_SMAP (9*32+20) /* Supervisor Mode Access > Prevention */ > +#define X86_FEATURE_AVX512PF (9*32+26) /* AVX-512 Prefetch */ > +#define X86_FEATURE_AVX512ER (9*32+27) /* AVX-512 Exponential and > Reciprocal */ > +#define X86_FEATURE_AVX512CD (9*32+28) /* AVX-512 Conflict Detection > */ > > #if defined(__KERNEL__) && !defined(__ASSEMBLY__) > > -- > 1.9.1
On Fri, 2014-04-18 at 02:13 +0000, Yu, Fenghua wrote: > Hi, Kamal, > > Except the patch in your email, there is another patch: > https://lkml.org/lkml/2014/2/20/546 > > Please add this patch as well if not done yet. Hi Fenghua- I didn't pick up that additional patch: c2bc11f x86, AVX-512: Enable AVX-512 States Context Switch because its only (?) purpose seemed to be to modify the definition of XSTATE_LAZY, which doesn't exist in 3.8-stable[0]. Would just adding the additional XSTATE_ definitions be useful for 3.8-stable for some other reason? Thanks for reviewing this! -Kamal [0] http://kernel.ubuntu.com/git?p=ubuntu/linux.git;a=blob;f=arch/x86/include/asm/xsave.h;h=0415cdabb5a663d1684284525a3fe24b7b3cd359;hb=refs/heads/linux-3.8.y-queue > > -----Original Message----- > > From: Kamal Mostafa [mailto:kamal@canonical.com] > > Sent: Thursday, April 17, 2014 4:30 PM > > To: Yu, Fenghua > > Cc: H. Peter Anvin; Kamal Mostafa; kernel-team@lists.ubuntu.com > > Subject: [3.8.y.z extended stable] Patch "x86, AVX-512: AVX-512 Feature > > Detection" has been added to staging queue > > > > This is a note to let you know that I have just added a patch titled > > > > x86, AVX-512: AVX-512 Feature Detection > > > > to the linux-3.8.y-queue branch of the 3.8.y.z extended stable tree > > which can be found at: > > > > > > http://kernel.ubuntu.com/git?p=ubuntu/linux.git;a=shortlog;h=refs/heads > > /linux-3.8.y-queue > > > > This patch is scheduled to be released in version 3.8.13.22. > > > > If you, or anyone else, feels it should not be added to this tree, > > please > > reply to this email. > > > > For more information about the 3.8.y.z tree, see > > https://wiki.ubuntu.com/Kernel/Dev/ExtendedStable > > > > Thanks. > > -Kamal > > > > ------ > > > > From 072af6571a063dd603521b6c947cf094b7d347a1 Mon Sep 17 00:00:00 2001 > > From: Fenghua Yu <fenghua.yu@intel.com> > > Date: Thu, 20 Feb 2014 13:24:50 -0800 > > Subject: x86, AVX-512: AVX-512 Feature Detection > > > > commit 8e5780fdeef7dc490b3f0b3a62704593721fa4f3 upstream. > > > > AVX-512 is an extention of AVX2. Its spec can be found at: > > http://download- > > software.intel.com/sites/default/files/managed/71/2e/319433-017.pdf > > > > This patch detects AVX-512 features by CPUID. > > > > Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> > > Link: http://lkml.kernel.org/r/1392931491-33237-1-git-send-email- > > fenghua.yu@intel.com > > Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> > > Signed-off-by: Kamal Mostafa <kamal@canonical.com> > > --- > > arch/x86/include/asm/cpufeature.h | 4 ++++ > > 1 file changed, 4 insertions(+) > > > > diff --git a/arch/x86/include/asm/cpufeature.h > > b/arch/x86/include/asm/cpufeature.h > > index d3f0db1..0480fb9 100644 > > --- a/arch/x86/include/asm/cpufeature.h > > +++ b/arch/x86/include/asm/cpufeature.h > > @@ -211,9 +211,13 @@ > > #define X86_FEATURE_ERMS (9*32+ 9) /* Enhanced REP MOVSB/STOSB */ > > #define X86_FEATURE_INVPCID (9*32+10) /* Invalidate Processor Context > > ID */ > > #define X86_FEATURE_RTM (9*32+11) /* Restricted > > Transactional Memory */ > > +#define X86_FEATURE_AVX512F (9*32+16) /* AVX-512 Foundation */ > > #define X86_FEATURE_RDSEED (9*32+18) /* The RDSEED instruction */ > > #define X86_FEATURE_ADX (9*32+19) /* The ADCX and ADOX > > instructions */ > > #define X86_FEATURE_SMAP (9*32+20) /* Supervisor Mode Access > > Prevention */ > > +#define X86_FEATURE_AVX512PF (9*32+26) /* AVX-512 Prefetch */ > > +#define X86_FEATURE_AVX512ER (9*32+27) /* AVX-512 Exponential and > > Reciprocal */ > > +#define X86_FEATURE_AVX512CD (9*32+28) /* AVX-512 Conflict Detection > > */ > > > > #if defined(__KERNEL__) && !defined(__ASSEMBLY__) > > > > -- > > 1.9.1 >
> From: Kamal Mostafa [mailto:kamal@canonical.com] > Sent: Friday, April 18, 2014 10:44 AM > To: Yu, Fenghua > Cc: H. Peter Anvin; kernel-team@lists.ubuntu.com > Subject: Re: [3.8.y.z extended stable] Patch "x86, AVX-512: AVX-512 > Feature Detection" has been added to staging queue > > On Fri, 2014-04-18 at 02:13 +0000, Yu, Fenghua wrote: > > Hi, Kamal, > > > > Except the patch in your email, there is another patch: > > https://lkml.org/lkml/2014/2/20/546 > > > > Please add this patch as well if not done yet. > > > Hi Fenghua- > > I didn't pick up that additional patch: Actually this patch is important for AVX 512. Without this patch, AVX 512 applications can not run because their context switch will fail. > > c2bc11f x86, AVX-512: Enable AVX-512 States Context Switch > > because its only (?) purpose seemed to be to modify the definition of > XSTATE_LAZY, which doesn't exist in 3.8-stable[0]. The point is XCNTXT_MASK has XSTATE_LAZY. So the patch actually changes XCNTXT_MASK and thus enables AVX 512 context switch. For 3.8 kernel, you can directly add the three AVX-512 bits to XCNTXT_MASK: -#define XCNTXT_MASK (XSTATE_FP | XSTATE_SSE | XSTATE_YMM) +#define XCNTXT_MASK (XSTATE_FP | XSTATE_SSE | XSTATE_YMM + | XSTATE_OPMASK | XSTATE_ZMM_Hi256 | XSTATE_Hi16_ZMM) This should work to enable AVX 512 context switch. > > Would just adding the additional XSTATE_ definitions be useful for > 3.8-stable for some other reason? If you want 3.8-stable to support AVX 512 feature, then this additional patch is a must-have patch. Otherwise, it's unnecessary to add this patch. > > Thanks for reviewing this! > > -Kamal >
On Tue, 2014-04-22 at 21:01 +0000, Yu, Fenghua wrote: > > From: Kamal Mostafa [mailto:kamal@canonical.com] > > Sent: Friday, April 18, 2014 10:44 AM > > To: Yu, Fenghua > > Cc: H. Peter Anvin; kernel-team@lists.ubuntu.com > > Subject: Re: [3.8.y.z extended stable] Patch "x86, AVX-512: AVX-512 > > Feature Detection" has been added to staging queue > > > > On Fri, 2014-04-18 at 02:13 +0000, Yu, Fenghua wrote: > > > Hi, Kamal, > > > > > > Except the patch in your email, there is another patch: > > > https://lkml.org/lkml/2014/2/20/546 > > > > > > Please add this patch as well if not done yet. > > > > > > Hi Fenghua- > > > > I didn't pick up that additional patch: > > Actually this patch is important for AVX 512. Without this patch, AVX 512 applications can not run because their context switch will fail. > > > > > c2bc11f x86, AVX-512: Enable AVX-512 States Context Switch > > > > because its only (?) purpose seemed to be to modify the definition of > > XSTATE_LAZY, which doesn't exist in 3.8-stable[0]. > > The point is XCNTXT_MASK has XSTATE_LAZY. So the patch actually changes XCNTXT_MASK and thus enables AVX 512 context switch. > > For 3.8 kernel, you can directly add the three AVX-512 bits to XCNTXT_MASK: > > -#define XCNTXT_MASK (XSTATE_FP | XSTATE_SSE | XSTATE_YMM) > +#define XCNTXT_MASK (XSTATE_FP | XSTATE_SSE | XSTATE_YMM > + | XSTATE_OPMASK | XSTATE_ZMM_Hi256 | XSTATE_Hi16_ZMM) > > This should work to enable AVX 512 context switch. Very good Fenghua -- I'll apply that to XCNTXT_MASK. Thanks for your help! -Kamal
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h index d3f0db1..0480fb9 100644 --- a/arch/x86/include/asm/cpufeature.h +++ b/arch/x86/include/asm/cpufeature.h @@ -211,9 +211,13 @@ #define X86_FEATURE_ERMS (9*32+ 9) /* Enhanced REP MOVSB/STOSB */ #define X86_FEATURE_INVPCID (9*32+10) /* Invalidate Processor Context ID */ #define X86_FEATURE_RTM (9*32+11) /* Restricted Transactional Memory */ +#define X86_FEATURE_AVX512F (9*32+16) /* AVX-512 Foundation */ #define X86_FEATURE_RDSEED (9*32+18) /* The RDSEED instruction */ #define X86_FEATURE_ADX (9*32+19) /* The ADCX and ADOX instructions */ #define X86_FEATURE_SMAP (9*32+20) /* Supervisor Mode Access Prevention */ +#define X86_FEATURE_AVX512PF (9*32+26) /* AVX-512 Prefetch */ +#define X86_FEATURE_AVX512ER (9*32+27) /* AVX-512 Exponential and Reciprocal */ +#define X86_FEATURE_AVX512CD (9*32+28) /* AVX-512 Conflict Detection */ #if defined(__KERNEL__) && !defined(__ASSEMBLY__)