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[1/2,Quantal] drm/nvd0/disp: hopefully fix selection of 6/8bpc mode on DP outputs

Message ID 1348838100-3403-2-git-send-email-seth.forshee@canonical.com
State New
Headers show

Commit Message

Seth Forshee Sept. 28, 2012, 1:14 p.m. UTC 
From: Ben Skeggs <bskeggs@redhat.com>

I have a very limited number of traces available for DP on NVD9+, but,
these values produce the same as the binary driver on a confirmed 18-bit
eDP panel and a confirmed 24-bit eDP panel (Retina MBP).

It's interesting that the bitfield values also match the MODE_CTRL values
that control the same thing on nv50:nvd9.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
(cherry picked from commit a348cd5fd85dbca7260ef865c5def85929932861)
BugLink: http://bugs.launchpad.net/bugs/1058088
Signed-off-by: Seth Forshee <seth.forshee@canonical.com>
---
 drivers/gpu/drm/nouveau/nvd0_display.c |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
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Patch

diff --git a/drivers/gpu/drm/nouveau/nvd0_display.c b/drivers/gpu/drm/nouveau/nvd0_display.c
index c50b075..97c0878 100644
--- a/drivers/gpu/drm/nouveau/nvd0_display.c
+++ b/drivers/gpu/drm/nouveau/nvd0_display.c
@@ -1508,10 +1508,10 @@  nvd0_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *umode,
 	case OUTPUT_DP:
 		if (nv_connector->base.display_info.bpc == 6) {
 			nv_encoder->dp.datarate = mode->clock * 18 / 8;
-			syncs |= 0x00000140;
+			syncs |= 0x00000002 << 6;
 		} else {
 			nv_encoder->dp.datarate = mode->clock * 24 / 8;
-			syncs |= 0x00000180;
+			syncs |= 0x00000005 << 6;
 		}
 
 		if (nv_encoder->dcb->sorconf.link & 1)