| Message ID | tencent_9ED18B4F46D04FDBC8911EF72C262944A105@qq.com |
|---|---|
| State | New |
| Delegated to: | Daniel Schwierzeck |
| Headers | show |
| Series | mips: only produce jr.hb if CPU support Release 2 | expand |
diff --git a/arch/mips/include/asm/system.h b/arch/mips/include/asm/system.h index 89a2ac209f..aa6633ec9e 100644 --- a/arch/mips/include/asm/system.h +++ b/arch/mips/include/asm/system.h @@ -275,11 +275,13 @@ static inline void instruction_hazard_barrier(void) { unsigned long tmp; +#if defined(CONFIG_SUPPORTS_CPU_MIPS32_R2) || defined(CONFIG_SUPPORTS_CPU_MIPS64_R2) asm volatile( __stringify(PTR_LA) "\t%0, 1f\n" " jr.hb %0\n" "1: .insn" : "=&r"(tmp)); +#endif } #ifdef CONFIG_SYS_NONCACHED_MEMORY
The jr.hb was introduced since MIPS32/64 Release 2. If this instruction is executed on Release 1 CPU will lead to Reserved Instruction Exception, so avoid this instruction when the CPU does not support Release 2. Signed-off-by: Yangyu Chen <cyy@cyyself.name> --- arch/mips/include/asm/system.h | 2 ++ 1 file changed, 2 insertions(+)