Message ID | f357e377-9cbd-426a-b493-d26a1547205d.haifeng.li@timesintelli.com |
---|---|
State | Deferred |
Delegated to: | Tom Rini |
Headers | show |
Series | armv7: cache: support L2 cache disable | expand |
diff --git a/arch/arm/lib/cache-pl310.c b/arch/arm/lib/cache-pl310.c index bbaaaa4157..4fd6eda07a 100644 --- a/arch/arm/lib/cache-pl310.c +++ b/arch/arm/lib/cache-pl310.c @@ -13,6 +13,11 @@ struct pl310_regs *const pl310 = (struct pl310_regs *)CONFIG_SYS_PL310_BASE; +void v7_outer_cache_disable(void) +{ + writel(0, &pl310->pl310_ctrl); +} + static void pl310_cache_sync(void) { writel(0, &pl310->pl310_cache_sync);
PL310 is the L2$ controller from ARM used in many SoCs. Before jumping to linux, UBoot will call v7_outer_cache_disable in cleanup_before_linux_select to disable L2$. This patch is to support cache disable of PL310. Signed-off-by: Haifeng Li <haifeng.li@timesintelli.com> --- arch/arm/lib/cache-pl310.c | 5 +++++ 1 file changed, 5 insertions(+)