| Message ID | CACih+8XphQAvUuiP6yEGTV=vZs9rnVHVe1bm2MLCJg0pmZgg4g@mail.gmail.com |
|---|---|
| State | Accepted |
| Delegated to: | Tom Rini |
| Headers | show |
On Tue, Nov 08, 2016 at 08:34:04AM -0700, Tom Warren wrote: > Tom, > > Please pull u-boot-tegra/master into U-Boot/master. Thanks! > > All Tegra builds are OK, and Stephen's automated test system reports that > all tests pass. > > The following changes since commit 4b6035da482cccda06aeb419634f99937c9fc783: > > mx6sabresd: Make Ethernet functional again (2016-11-06 06:59:27 -0500) > > are available in the git repository at: > > git://git.denx.de/u-boot-tegra.git master > > for you to fetch changes up to a8d0526133e542ea93a741fd18833e571e817775: > > ARM: tegra186: call secure monitor for all cache-wide ops (2016-11-07 > 14:36:29 -0800) > Applied to u-boot/master, thanks!
Tom, Please pull u-boot-tegra/master into U-Boot/master. Thanks! All Tegra builds are OK, and Stephen's automated test system reports that all tests pass. The following changes since commit 4b6035da482cccda06aeb419634f99937c9fc783: mx6sabresd: Make Ethernet functional again (2016-11-06 06:59:27 -0500) are available in the git repository at: git://git.denx.de/u-boot-tegra.git master for you to fetch changes up to a8d0526133e542ea93a741fd18833e571e817775: ARM: tegra186: call secure monitor for all cache-wide ops (2016-11-07 14:36:29 -0800) ---------------------------------------------------------------- Stephen Warren (4): ARM: tegra: ensure nvtboot_boot_x0 alignment ARM: tegra: translate __asm_flush_l3_cache to assembly armv8: add hooks for all cache-wide operations ARM: tegra186: call secure monitor for all cache-wide ops arch/arm/cpu/armv8/cache.S | 18 ++++++++++-- arch/arm/cpu/armv8/cache_v8.c | 8 ++++-- arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 4 +-- arch/arm/include/asm/system.h | 4 ++- arch/arm/mach-tegra/tegra186/cache.S | 43 ++++++++++++++++++++++++++++ arch/arm/mach-tegra/tegra186/cache.c | 23 --------------- arch/arm/mach-tegra/tegra186/nvtboot_ll.S | 1 + 7 files changed, 69 insertions(+), 32 deletions(-) create mode 100644 arch/arm/mach-tegra/tegra186/cache.S delete mode 100644 arch/arm/mach-tegra/tegra186/cache.c