| Message ID | 992e4a16b52861aeeb01784730f80ff9.squirrel@vali.starlink.edu |
|---|---|
| State | Superseded |
| Delegated to: | Hans de Goede |
| Headers | show |
Hi, On Tue, May 17, 2016 at 10:38 AM, <tpearson@raptorengineering.com> wrote: A commit message would be nice. > Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> > --- > arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h > index 65c0441..76da00f 100644 > --- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h > +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h > @@ -18,6 +18,9 @@ > #define SUNXI_SRAM_D_BASE 0x00010000 /* 4 kiB */ > #define SUNXI_SRAM_B_BASE 0x00020000 /* 64 kiB (secure) */ > > +#define SUN8I_CPUXCFG_BASE 0x01700000 > +#define SUN8I_CCI400_BASE 0x01790000 Please use SUNXI_ prefix. We can potentially add A80 support later on using the same macro names. > + > #define SUNXI_SRAMC_BASE 0x01c00000 > #define SUNXI_DRAMC_BASE 0x01c01000 > #define SUNXI_DMA_BASE 0x01c02000 > @@ -168,6 +171,10 @@ > #define SUNXI_SS_BOND_ID_A31 4 > #define SUNXI_SS_BOND_ID_A31S 5 > > +#define CCI400_DVM_MESSAGE_REQ_EN 0x00000002 > +#define CCI400_SNOOP_REQ_EN 0x00000001 > +#define CCI400_SHAORD_NON_SHAREABLE 0x00000002 _SHA_ORD_ would be better as the original name is "Shareable Override Register". > + CCI-400 is a standard IP block from ARM. Please move the definitions to a separate, shared header, preferably under arch/arm/include/asm/. ChenYu > #ifndef __ASSEMBLY__ > void sunxi_board_init(void); > void sunxi_reset(void); > -- > 2.8.0.rc3 > > _______________________________________________ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot
diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h index 65c0441..76da00f 100644 --- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h @@ -18,6 +18,9 @@ #define SUNXI_SRAM_D_BASE 0x00010000 /* 4 kiB */ #define SUNXI_SRAM_B_BASE 0x00020000 /* 64 kiB (secure) */ +#define SUN8I_CPUXCFG_BASE 0x01700000 +#define SUN8I_CCI400_BASE 0x01790000 + #define SUNXI_SRAMC_BASE 0x01c00000 #define SUNXI_DRAMC_BASE 0x01c01000 #define SUNXI_DMA_BASE 0x01c02000 @@ -168,6 +171,10 @@ #define SUNXI_SS_BOND_ID_A31 4 #define SUNXI_SS_BOND_ID_A31S 5 +#define CCI400_DVM_MESSAGE_REQ_EN 0x00000002 +#define CCI400_SNOOP_REQ_EN 0x00000001 +#define CCI400_SHAORD_NON_SHAREABLE 0x00000002 + #ifndef __ASSEMBLY__ void sunxi_board_init(void); void sunxi_reset(void);
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> --- arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 7 +++++++ 1 file changed, 7 insertions(+)