Message ID | 58d69600-be2d-489f-c3bc-3110e8ca900c@gmail.com |
---|---|
State | Accepted |
Commit | e9eddb75c5bf867ac2c773138afb64b92b6100e8 |
Delegated to: | Kever Yang |
Headers | show
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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id kw23-20020a170907771700b008d8f1b238fdsm2757696ejc.149.2023.03.12.17.29.48 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 12 Mar 2023 17:29:48 -0700 (PDT) Message-ID: <58d69600-be2d-489f-c3bc-3110e8ca900c@gmail.com> Date: Mon, 13 Mar 2023 01:29:47 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.6.0 From: Johan Jonker <jbx6244@gmail.com> Subject: [PATCH v8 08/24] rockchip: timer: dw-apb-timer: use regs variable with uintptr_t size To: dario.binacchi@amarulasolutions.com, michael@amarulasolutions.com, sjg@chromium.org, philipp.tomsich@vrull.eu, kever.yang@rock-chips.com Cc: u-boot@lists.denx.de, yifeng.zhao@rock-chips.com References: <be3c5f12-9df4-0a52-4858-c44d848e9147@gmail.com> Content-Language: en-US In-Reply-To: <be3c5f12-9df4-0a52-4858-c44d848e9147@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion <u-boot.lists.denx.de> List-Unsubscribe: <https://lists.denx.de/options/u-boot>, <mailto:u-boot-request@lists.denx.de?subject=unsubscribe> List-Archive: <https://lists.denx.de/pipermail/u-boot/> List-Post: <mailto:u-boot@lists.denx.de> List-Help: <mailto:u-boot-request@lists.denx.de?subject=help> List-Subscribe: <https://lists.denx.de/listinfo/u-boot>, <mailto:u-boot-request@lists.denx.de?subject=subscribe> Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" <u-boot-bounces@lists.denx.de> X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean |
Series |
Fixes for Rockchip NFC driver part 1
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On Sun, 12 Mar 2023 at 18:29, Johan Jonker <jbx6244@gmail.com> wrote: > > The fdt_addr_t and phys_addr_t size have been decoupled. > A 32bit CPU can expect 64-bit data from the device tree parser, > so use a regs variable with uintptr_t size in the > dw-apb-timer.c file. > > Signed-off-by: Johan Jonker <jbx6244@gmail.com> > --- > > Changed V8: > use uintptr_t instead of phys_addr_t > > Changed V6: > remove cast > change title > --- > drivers/timer/dw-apb-timer.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Simon Glass <sjg@chromium.org>
diff --git a/drivers/timer/dw-apb-timer.c b/drivers/timer/dw-apb-timer.c index 10f0a9f6..b171232c 100644 --- a/drivers/timer/dw-apb-timer.c +++ b/drivers/timer/dw-apb-timer.c @@ -23,7 +23,7 @@ #define DW_APB_CTRL 0x8 struct dw_apb_timer_priv { - fdt_addr_t regs; + uintptr_t regs; struct reset_ctl_bulk resets; };
The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so use a regs variable with uintptr_t size in the dw-apb-timer.c file. Signed-off-by: Johan Jonker <jbx6244@gmail.com> --- Changed V8: use uintptr_t instead of phys_addr_t Changed V6: remove cast change title --- drivers/timer/dw-apb-timer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.20.1