diff mbox series

[v3,21/23] mmc: mtk-sd: assign plat->cfg.f_max with a correct value

Message ID 58ca12e09b5434fd152687fe53706ff0948a2304.1604907361.git.weijie.gao@mediatek.com
State Superseded
Delegated to: Daniel Schwierzeck
Headers show
Series Add support for MediaTek MT7620 SoC | expand

Commit Message

Weijie Gao (高惟杰) Nov. 9, 2020, 8:28 a.m. UTC
Currently this driver does not set the value of plat->cfg.f_max, which
results in that MMC framework will always run at the lowest frequency.

This patch sets plat->cfg.f_max to the maximum allowed frequency, which is
half of the source clock frequency.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
v3 changes: new
---
 drivers/mmc/mtk-sd.c | 2 ++
 1 file changed, 2 insertions(+)

Comments

Stefan Roese Nov. 9, 2020, 9 a.m. UTC | #1
On 09.11.20 09:28, Weijie Gao wrote:
> Currently this driver does not set the value of plat->cfg.f_max, which
> results in that MMC framework will always run at the lowest frequency.
> 
> This patch sets plat->cfg.f_max to the maximum allowed frequency, which is
> half of the source clock frequency.
> 
> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>

Reviewed-by: Stefan Roese <sr@denx.de>

Thanks,
Stefan

> ---
> v3 changes: new
> ---
>   drivers/mmc/mtk-sd.c | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/mmc/mtk-sd.c b/drivers/mmc/mtk-sd.c
> index f4ff8822f2..5e24943212 100644
> --- a/drivers/mmc/mtk-sd.c
> +++ b/drivers/mmc/mtk-sd.c
> @@ -1639,6 +1639,8 @@ static int msdc_drv_probe(struct udevice *dev)
>   	else
>   		cfg->f_min = host->src_clk_freq / (4 * 4095);
>   
> +	cfg->f_max = host->src_clk_freq / 2;
> +
>   	cfg->b_max = 1024;
>   	cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
>   
> 


Viele Grüße,
Stefan
diff mbox series

Patch

diff --git a/drivers/mmc/mtk-sd.c b/drivers/mmc/mtk-sd.c
index f4ff8822f2..5e24943212 100644
--- a/drivers/mmc/mtk-sd.c
+++ b/drivers/mmc/mtk-sd.c
@@ -1639,6 +1639,8 @@  static int msdc_drv_probe(struct udevice *dev)
 	else
 		cfg->f_min = host->src_clk_freq / (4 * 4095);
 
+	cfg->f_max = host->src_clk_freq / 2;
+
 	cfg->b_max = 1024;
 	cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;