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[U-Boot] Newbie SPL question for socfpga_sockit

Message ID 56D77646.7060804@denx.de
State Not Applicable
Delegated to: Marek Vasut
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Marek Vasut March 2, 2016, 11:24 p.m. UTC 
On 03/03/2016 12:08 AM, Dinh Nguyen wrote:
> On 03/02/2016 04:54 PM, Dinh Nguyen wrote:
>> CC: Marek Vasut
>>
>> On 03/01/2016 08:40 PM, George Broz wrote:
>>> On 17 February 2016 at 18:45, Phil Reid <preid@electromag.com.au> wrote:
>>>> G'day George
>>>>
>>>>
>>>> On 18/02/2016 5:54 AM, George Broz wrote:
>>>>>
>>>>> Hello,
>>>>>
>>>>> Sorry for the newbie question...
>>>>>
>>>>> I have an Altera/Terasic board (socfpga_sockit) that has issues
>>>>> recognizing
>>>>> USB storage devices (roughly 60% good / 40% bad):
>>>>>
>>>
>>>>> If I try a later release (e.g. v2016.01 which seems to support the Terasic
>>>>> board explicitly) the boot process stops just after loading the SPL.
>>>>>
>>>>> At this point I have only been changing the u-boot.img component, not the
>>>>> SPL (in the a2 partition of the MMC).
>>>>>
>>>>> The documentation from Altera about generating the SPL seems to require
>>>>> using Qsys/Quartus tools which I'd really like to avoid.
>>>>>
>>>>> I can produce u-boot-spl.bin / u-boot.img from
>>>>> make socfpga_sockit_defconfig; make all.
>>>>>
>>>>> My newbie question ... should be I able to use directly the u-boot-spl.bin
>>>>> generated by the build to replace the SPL on the board?
>>>>>
>>>>
>>>> I've just gone thru the process (this week) of getting uboot 2016.01 to boot
>>>> on our custom socfpga board.
>>>> There where a few issues in getting things going.
>>>> If your using the sd card to boot then the current memory layout is not per
>>>> the altera documentation.
>>>> I had to make the changes below to config to match the altera docs.
>>>> Otherwise it hangs just after the SPL.
>>>> You also need to use the -dtb image versions with 2016.01 for things to
>>>> work.
>>>> Again you may need to make sure the uboot device trees match your hardware.
>>>> Not all uboot drivers appear to be using the DT as yet.
>>>>
>>>> Note the SPL is tightly coupled to the board design and potentially the FPGA
>>>> image.
>>>> If you using bridges or routing HPS resources (eg i2c etc) to the fpga the
>>>> SPL configures the muxes.
>>>>
>>>> There's a script in uboot src at arch\arm\mach-socfpga\qts-filter.sh
>>>> That will generate the qts files for you arch.
>>>>
>>>> I haven't tried the USB stuff as yet.
>>>> There are some issues witht eh altera USB port trigger an Over Current event
>>>> on device insertation.
>>>> They've modified the linux kenerl driver to use external OV current
>>>> detection to get around the problem.
>>>> My intial workaround was to insert USB device prior to power on.
>>>> I haven't looked at the uboot USB driver yet to see what's in there.
>>>>
>>>>
>>>> --
>>>> Regards
>>>> Phil Reid
>>>>
>>>>
>>>> diff --git a/include/configs/socfpga_common.h
>>>> b/include/configs/socfpga_common.h
>>>> index a09e906..3a1b59b 100644 (file)
>>>> --- a/include/configs/socfpga_common.h
>>>> +++ b/include/configs/socfpga_common.h
>>>> @@ -357,13 +357,13 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
>>>>
>>>> /* SPL SDMMC boot support */
>>>> #ifdef CONFIG_SPL_MMC_SUPPORT
>>>> +#define CONFIG_SPL_LIBDISK_SUPPORT
>>>> #if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT)
>>>> #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 2
>>>> #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img"
>>>> -#define CONFIG_SPL_LIBDISK_SUPPORT
>>>> #else
>>>> -#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 3
>>>> -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0xa00 /* offset 2560 sect
>>>> (1M+256k) */
>>>> +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 3
>>>> +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
>>>> #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */
>>>> #endif
>>>> #endif
>>>>
>>>>
>>>
>>> Thanks, Phil!
>>>
>>> Sorry for the delayed response - got called away, but am back to this
>>> now. I patched
>>> socfpga_common.h and re-built the project. I picked up
>>> spl/u-boot-spl-dtb.sfp and
>>> u-boot-dtb.img and transferred them to the SD card with:
>>>
>>> dd if=u-boot-spl-dtb.sfp of=/dev/sdf3 bs=64k seek=0
>>> dd if=u-boot-dtb.img of=/dev/sdf3 bs=64k seek=4
>>>
>>
>> You can just do a 'make u-boot-with-spl.sfp' and burn the
>> u-boot-with-spl.sfp file straight to the a2 partition, or sdf3.
>>
>>> Tried this with both the original DT set (socfpga.dtsi, socfpga_cyclone.dtsi,
>>> socfpga_cyclone5_sockit.dts) that came with the u-boot v2016.01 download and
>>> also an Altera-patched DT set that I've used to boot into Linux numerous times.
>>>
>>> When I start up the board I get:
>>>
>>> U-Boot SPL 2016.01 (Mar 01 2016 - 17:28:14)
>>> drivers/ddr/altera/sequencer.c: Preparing to start memory calibration
>>> drivers/ddr/altera/sequencer.c: CALIBRATION FAILED
>>> drivers/ddr/altera/sequencer.c: Calibration complete
>>> SDRAM calibration failed.
>>> ### ERROR ### Please RESET the board ###
>>>
>>> I'm not a Quartus user, so I haven't done anything with the
>>> qts-filter.sh script you
>>> mentioned. Do I need to? I don't have any custom FPGA logic - it's
>>> just the Terasic
>>> board out of the box.
>>>
>>
>> I just tested U-Boot(v2016.03-rc3) and USB is not working on the devkit
>> or sockit. It's failing to detect my mass storage device.
>>
>> Debugging...
>>
> 
> Sorry, I mis-spoke for the sockit. I have to turn dcache off for USB to
> work reliably.
> 
> => dcache off
> => usb start
> starting USB...
> USB0:   Core Release: 2.93a
> scanning bus 0 for devices... 2 USB Device(s) found
> => usb tree
> USB device tree:
>   1  Hub (480 Mb/s, 0mA)
>   |   U-Boot Root Hub
>   |
>   +-2  Mass Storage (480 Mb/s, 200mA)
>        SanDisk Firebird USB Flash Drive 4C532000040115111005
> 
> => version
> 
> U-Boot 2016.03-rc3 (Mar 02 2016 - 17:00:25 -0600)

Well, that's our usual USB/QSPI cache issue that's tormenting your soul.
CCing Chin ;-)

Does the issue by any chance magically disappear if you apply this patch:

        DCACHE_WRITEALLOC = DCACHE_WRITEBACK | TTB_SECT_TEX(1),

?

Comments

Dinh Nguyen March 3, 2016, 2:48 p.m. UTC | #1 
On 03/02/2016 05:24 PM, Marek Vasut wrote:
> 
> Well, that's our usual USB/QSPI cache issue that's tormenting your soul.
> CCing Chin ;-)
> 
> Does the issue by any chance magically disappear if you apply this patch:
> 
> diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
> index 026e7ef..06802c6 100644
> --- a/arch/arm/include/asm/system.h
> +++ b/arch/arm/include/asm/system.h
> @@ -274,7 +274,7 @@ static inline void set_dacr(unsigned int val)
> 
>  /* options available for data cache on each page */
>  enum dcache_option {
> -       DCACHE_OFF = TTB_SECT_DOMAIN(0) | TTB_SECT_XN_MASK | TTB_SECT,
> +       DCACHE_OFF = TTB_SECT_S_MASK | TTB_SECT_DOMAIN(0) |
> TTB_SECT_XN_MASK | TTB_SECT,
>         DCACHE_WRITETHROUGH = DCACHE_OFF | TTB_SECT_C_MASK,
>         DCACHE_WRITEBACK = DCACHE_WRITETHROUGH | TTB_SECT_B_MASK,
>         DCACHE_WRITEALLOC = DCACHE_WRITEBACK | TTB_SECT_TEX(1),
> 

I'm away from my office today and don't have access to the sockit. I can
test this tomorrow.

But what's interesting is that I have the DE0-NANO-SOCKIT board at home,
and USB seems to be working fine with dcache on.

Dinh
Marek Vasut March 3, 2016, 2:51 p.m. UTC | #2 
On 03/03/2016 03:48 PM, Dinh Nguyen wrote:
> 
> 
> On 03/02/2016 05:24 PM, Marek Vasut wrote:
>>
>> Well, that's our usual USB/QSPI cache issue that's tormenting your soul.
>> CCing Chin ;-)
>>
>> Does the issue by any chance magically disappear if you apply this patch:
>>
>> diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
>> index 026e7ef..06802c6 100644
>> --- a/arch/arm/include/asm/system.h
>> +++ b/arch/arm/include/asm/system.h
>> @@ -274,7 +274,7 @@ static inline void set_dacr(unsigned int val)
>>
>>  /* options available for data cache on each page */
>>  enum dcache_option {
>> -       DCACHE_OFF = TTB_SECT_DOMAIN(0) | TTB_SECT_XN_MASK | TTB_SECT,
>> +       DCACHE_OFF = TTB_SECT_S_MASK | TTB_SECT_DOMAIN(0) |
>> TTB_SECT_XN_MASK | TTB_SECT,
>>         DCACHE_WRITETHROUGH = DCACHE_OFF | TTB_SECT_C_MASK,
>>         DCACHE_WRITEBACK = DCACHE_WRITETHROUGH | TTB_SECT_B_MASK,
>>         DCACHE_WRITEALLOC = DCACHE_WRITEBACK | TTB_SECT_TEX(1),
>>
> 
> I'm away from my office today and don't have access to the sockit. I can
> test this tomorrow.
> 
> But what's interesting is that I have the DE0-NANO-SOCKIT board at home,
> and USB seems to be working fine with dcache on.

Yeah, the USB issue happens only with some stick :-/
George Broz March 3, 2016, 10 p.m. UTC | #3 
On 3 March 2016 at 06:51, Marek Vasut <marex@denx.de> wrote:
> On 03/03/2016 03:48 PM, Dinh Nguyen wrote:
>>
>>
>> On 03/02/2016 05:24 PM, Marek Vasut wrote:
>>>
>>> Well, that's our usual USB/QSPI cache issue that's tormenting your soul.
>>> CCing Chin ;-)
>>>
>>> Does the issue by any chance magically disappear if you apply this patch:
>>>
>>> diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
>>> index 026e7ef..06802c6 100644
>>> --- a/arch/arm/include/asm/system.h
>>> +++ b/arch/arm/include/asm/system.h
>>> @@ -274,7 +274,7 @@ static inline void set_dacr(unsigned int val)
>>>
>>>  /* options available for data cache on each page */
>>>  enum dcache_option {
>>> -       DCACHE_OFF = TTB_SECT_DOMAIN(0) | TTB_SECT_XN_MASK | TTB_SECT,
>>> +       DCACHE_OFF = TTB_SECT_S_MASK | TTB_SECT_DOMAIN(0) |
>>> TTB_SECT_XN_MASK | TTB_SECT,
>>>         DCACHE_WRITETHROUGH = DCACHE_OFF | TTB_SECT_C_MASK,
>>>         DCACHE_WRITEBACK = DCACHE_WRITETHROUGH | TTB_SECT_B_MASK,
>>>         DCACHE_WRITEALLOC = DCACHE_WRITEBACK | TTB_SECT_TEX(1),
>>>

The 2016.01 code I'm using already includes this patch. If I try
reading a USB stick with dcache on or off
I get the same result:

=> dcache off
=> usb reset
resetting USB...
USB0:   Core Release: 2.93a
dwc_otg_core_host_init: Timeout!
dwc_otg_core_host_init: Timeout!
dwc_otg_core_host_init: Timeout!
dwc_otg_core_host_init: Timeout!
dwc_otg_core_host_init: Timeout!
dwc_otg_core_host_init: Timeout!
dwc_otg_core_host_init: Timeout!
dwc_otg_core_host_init: Timeout!
dwc_otg_core_host_init: Timeout!
dwc_otg_core_host_init: Timeout!
dwc_otg_core_host_init: Timeout!
dwc_otg_core_host_init: Timeout!
dwc_otg_core_host_init: Timeout!
dwc_otg_core_host_init: Timeout!
dwc_otg_core_host_init: Timeout!
scanning bus 0 for devices... 1 USB Device(s) found
=> usb tree
USB device tree:
  1  Hub (480 Mb/s, 0mA)
      U-Boot Root Hub


>>
>> I'm away from my office today and don't have access to the sockit. I can
>> test this tomorrow.
>>
>> But what's interesting is that I have the DE0-NANO-SOCKIT board at home,
>> and USB seems to be working fine with dcache on.
>
> Yeah, the USB issue happens only with some stick :-/

I've tried five different sticks, same result.

--George

>
>
> --
> Best regards,
> Marek Vasut
> _______________________________________________
> U-Boot mailing list
> U-Boot@lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot
Marek Vasut March 3, 2016, 10:09 p.m. UTC | #4 
On 03/03/2016 11:00 PM, George Broz wrote:
> On 3 March 2016 at 06:51, Marek Vasut <marex@denx.de> wrote:
>> On 03/03/2016 03:48 PM, Dinh Nguyen wrote:
>>>
>>>
>>> On 03/02/2016 05:24 PM, Marek Vasut wrote:
>>>>
>>>> Well, that's our usual USB/QSPI cache issue that's tormenting your soul.
>>>> CCing Chin ;-)
>>>>
>>>> Does the issue by any chance magically disappear if you apply this patch:
>>>>
>>>> diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
>>>> index 026e7ef..06802c6 100644
>>>> --- a/arch/arm/include/asm/system.h
>>>> +++ b/arch/arm/include/asm/system.h
>>>> @@ -274,7 +274,7 @@ static inline void set_dacr(unsigned int val)
>>>>
>>>>  /* options available for data cache on each page */
>>>>  enum dcache_option {
>>>> -       DCACHE_OFF = TTB_SECT_DOMAIN(0) | TTB_SECT_XN_MASK | TTB_SECT,
>>>> +       DCACHE_OFF = TTB_SECT_S_MASK | TTB_SECT_DOMAIN(0) |
>>>> TTB_SECT_XN_MASK | TTB_SECT,
>>>>         DCACHE_WRITETHROUGH = DCACHE_OFF | TTB_SECT_C_MASK,
>>>>         DCACHE_WRITEBACK = DCACHE_WRITETHROUGH | TTB_SECT_B_MASK,
>>>>         DCACHE_WRITEALLOC = DCACHE_WRITEBACK | TTB_SECT_TEX(1),
>>>>
> 
> The 2016.01 code I'm using already includes this patch. If I try
> reading a USB stick with dcache on or off
> I get the same result:
> 
> => dcache off
> => usb reset
> resetting USB...
> USB0:   Core Release: 2.93a
> dwc_otg_core_host_init: Timeout!
> dwc_otg_core_host_init: Timeout!
> dwc_otg_core_host_init: Timeout!
> dwc_otg_core_host_init: Timeout!
> dwc_otg_core_host_init: Timeout!
> dwc_otg_core_host_init: Timeout!
> dwc_otg_core_host_init: Timeout!
> dwc_otg_core_host_init: Timeout!
> dwc_otg_core_host_init: Timeout!
> dwc_otg_core_host_init: Timeout!
> dwc_otg_core_host_init: Timeout!
> dwc_otg_core_host_init: Timeout!
> dwc_otg_core_host_init: Timeout!
> dwc_otg_core_host_init: Timeout!
> dwc_otg_core_host_init: Timeout!
> scanning bus 0 for devices... 1 USB Device(s) found
> => usb tree
> USB device tree:
>   1  Hub (480 Mb/s, 0mA)
>       U-Boot Root Hub

This more likely means that either clock or reset bits are not
configured correctly OR you're using the wrong controller. Since
you're mixing old U-Boot SPL with new U-Boot, there can be some
discrepancy and I have no idea how to help you with that :(


Best regards,
Marek Vasut
George Broz March 3, 2016, 11:46 p.m. UTC | #5 
On 3 March 2016 at 15:07, Marek Vasut <marex@denx.de> wrote:

>> On 3 March 2016 at 14:42, Marek Vasut <marex@denx.de> wrote:
>>> On 03/03/2016 11:27 PM, George Broz wrote:
>>>> Hi Marek,
>>>
>>> Hi!
>>>
>>>> Yes - would love to be using the SPL from 2016.01 for the Terasic board,
>>>> but it does not seem to be working for me with the files from the repo or
>>>> with handoff files I supply & run through qts-filter.sh. This is about two
>>>> layers below where my normal expertise is, so any help getting 2016.01
>>>> (or later) SPL working (with the end goal of having working USB) would
>>>> be much appreciated!
>>>
>>> Are you using sockit ? Which revision (it's etched in the PCB from the
>>> bottom, it's not silkscreen but really part of the copper) ? I'll test
>>> it and get back to you. If I happen to forget about it, remind me ;-)
>>>
>>>> Best regards,
>>>> --George Broz
>>>>
>>>>
>>>> On 3 March 2016 at 14:09, Marek Vasut <marex@denx.de> wrote:
>>>>> On 03/03/2016 11:00 PM, George Broz wrote:
>>>>>> On 3 March 2016 at 06:51, Marek Vasut <marex@denx.de> wrote:
>>>>>>> On 03/03/2016 03:48 PM, Dinh Nguyen wrote:
>>>>>>>>
>>>>>>>>
>>>>>>>> On 03/02/2016 05:24 PM, Marek Vasut wrote:
>>>>>>>>>
>>>>>>>>> Well, that's our usual USB/QSPI cache issue that's tormenting your soul.
>>>>>>>>> CCing Chin ;-)
>>>>>>>>>
>>>>>>>>> Does the issue by any chance magically disappear if you apply this patch:
>>>>>>>>>
>>>>>>>>> diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
>>>>>>>>> index 026e7ef..06802c6 100644
>>>>>>>>> --- a/arch/arm/include/asm/system.h
>>>>>>>>> +++ b/arch/arm/include/asm/system.h
>>>>>>>>> @@ -274,7 +274,7 @@ static inline void set_dacr(unsigned int val)
>>>>>>>>>
>>>>>>>>>  /* options available for data cache on each page */
>>>>>>>>>  enum dcache_option {
>>>>>>>>> -       DCACHE_OFF = TTB_SECT_DOMAIN(0) | TTB_SECT_XN_MASK | TTB_SECT,
>>>>>>>>> +       DCACHE_OFF = TTB_SECT_S_MASK | TTB_SECT_DOMAIN(0) |
>>>>>>>>> TTB_SECT_XN_MASK | TTB_SECT,
>>>>>>>>>         DCACHE_WRITETHROUGH = DCACHE_OFF | TTB_SECT_C_MASK,
>>>>>>>>>         DCACHE_WRITEBACK = DCACHE_WRITETHROUGH | TTB_SECT_B_MASK,
>>>>>>>>>         DCACHE_WRITEALLOC = DCACHE_WRITEBACK | TTB_SECT_TEX(1),
>>>>>>>>>
>>>>>>
>>>>>> The 2016.01 code I'm using already includes this patch. If I try
>>>>>> reading a USB stick with dcache on or off
>>>>>> I get the same result:
>>>>>>
>>>>>> => dcache off
>>>>>> => usb reset
>>>>>> resetting USB...
>>>>>> USB0:   Core Release: 2.93a
>>>>>> dwc_otg_core_host_init: Timeout!
>>>>>> dwc_otg_core_host_init: Timeout!
>>>>>> dwc_otg_core_host_init: Timeout!
>>>>>> dwc_otg_core_host_init: Timeout!
>>>>>> dwc_otg_core_host_init: Timeout!
>>>>>> dwc_otg_core_host_init: Timeout!
>>>>>> dwc_otg_core_host_init: Timeout!
>>>>>> dwc_otg_core_host_init: Timeout!
>>>>>> dwc_otg_core_host_init: Timeout!
>>>>>> dwc_otg_core_host_init: Timeout!
>>>>>> dwc_otg_core_host_init: Timeout!
>>>>>> dwc_otg_core_host_init: Timeout!
>>>>>> dwc_otg_core_host_init: Timeout!
>>>>>> dwc_otg_core_host_init: Timeout!
>>>>>> dwc_otg_core_host_init: Timeout!
>>>>>> scanning bus 0 for devices... 1 USB Device(s) found
>>>>>> => usb tree
>>>>>> USB device tree:
>>>>>>   1  Hub (480 Mb/s, 0mA)
>>>>>>       U-Boot Root Hub
>>>>>
>>>>> This more likely means that either clock or reset bits are not
>>>>> configured correctly OR you're using the wrong controller. Since
>>>>> you're mixing old U-Boot SPL with new U-Boot, there can be some
>>>>> discrepancy and I have no idea how to help you with that :(
>>>>>
>>>>>
>>>>> Best regards,
>>>>> Marek Vasut
>>>
>>>
>>> --
>>> Best regards,
>>> Marek Vasut

> On 03/03/2016 11:57 PM, George Broz wrote:
>> Yes - using SocKit, revision D (etching is 10-31212180-D0).
>>
>> Thanks - any help is much appreciated!
>
> Try attached patch.
>

Thanks, Marek. The patch applied cleanly, but the end result is the same

(with DLEVEL=1 in sequencer.c) I get
U-Boot SPL 2016.01 (Mar 03 2016 - 15:28:06)
scc_mgr_initialize:281: Clearing SCC RFILE index 0
scc_mgr_initialize:281: Clearing SCC RFILE index 1
scc_mgr_initialize:281: Clearing SCC RFILE index 2
scc_mgr_initialize:281: Clearing SCC RFILE index 3
scc_mgr_initialize:281: Clearing SCC RFILE index 4
scc_mgr_initialize:281: Clearing SCC RFILE index 5
scc_mgr_initialize:281: Clearing SCC RFILE index 6
scc_mgr_initialize:281: Clearing SCC RFILE index 7
scc_mgr_initialize:281: Clearing SCC RFILE index 8
scc_mgr_initialize:281: Clearing SCC RFILE index 9
scc_mgr_initialize:281: Clearing SCC RFILE index 10
scc_mgr_initialize:281: Clearing SCC RFILE index 11
scc_mgr_initialize:281: Clearing SCC RFILE index 12
scc_mgr_initialize:281: Clearing SCC RFILE index 13
scc_mgr_initialize:281: Clearing SCC RFILE index 14
scc_mgr_initialize:281: Clearing SCC RFILE index 15

4x then hang.



>
>> Best regards,
>> --George
>>


>
> --
> Best regards,
> Marek Vasut
Dinh Nguyen March 4, 2016, 4:06 p.m. UTC | #6 
On 03/02/2016 05:24 PM, Marek Vasut wrote:
> On 03/03/2016 12:08 AM, Dinh Nguyen wrote:
>> On 03/02/2016 04:54 PM, Dinh Nguyen wrote:
>>> CC: Marek Vasut
>>>
>>> On 03/01/2016 08:40 PM, George Broz wrote:
>>>> On 17 February 2016 at 18:45, Phil Reid <preid@electromag.com.au> wrote:
>>>>> G'day George
>>>>>
>>>>>
>>>>> On 18/02/2016 5:54 AM, George Broz wrote:
>>>>>>
>>>>>> Hello,
>>>>>>
>>>>>> Sorry for the newbie question...
>>>>>>
>>>>>> I have an Altera/Terasic board (socfpga_sockit) that has issues
>>>>>> recognizing
>>>>>> USB storage devices (roughly 60% good / 40% bad):
>>>>>>
>>>>
>>>>>> If I try a later release (e.g. v2016.01 which seems to support the Terasic
>>>>>> board explicitly) the boot process stops just after loading the SPL.
>>>>>>
>>>>>> At this point I have only been changing the u-boot.img component, not the
>>>>>> SPL (in the a2 partition of the MMC).
>>>>>>
>>>>>> The documentation from Altera about generating the SPL seems to require
>>>>>> using Qsys/Quartus tools which I'd really like to avoid.
>>>>>>
>>>>>> I can produce u-boot-spl.bin / u-boot.img from
>>>>>> make socfpga_sockit_defconfig; make all.
>>>>>>
>>>>>> My newbie question ... should be I able to use directly the u-boot-spl.bin
>>>>>> generated by the build to replace the SPL on the board?
>>>>>>
>>>>>
>>>>> I've just gone thru the process (this week) of getting uboot 2016.01 to boot
>>>>> on our custom socfpga board.
>>>>> There where a few issues in getting things going.
>>>>> If your using the sd card to boot then the current memory layout is not per
>>>>> the altera documentation.
>>>>> I had to make the changes below to config to match the altera docs.
>>>>> Otherwise it hangs just after the SPL.
>>>>> You also need to use the -dtb image versions with 2016.01 for things to
>>>>> work.
>>>>> Again you may need to make sure the uboot device trees match your hardware.
>>>>> Not all uboot drivers appear to be using the DT as yet.
>>>>>
>>>>> Note the SPL is tightly coupled to the board design and potentially the FPGA
>>>>> image.
>>>>> If you using bridges or routing HPS resources (eg i2c etc) to the fpga the
>>>>> SPL configures the muxes.
>>>>>
>>>>> There's a script in uboot src at arch\arm\mach-socfpga\qts-filter.sh
>>>>> That will generate the qts files for you arch.
>>>>>
>>>>> I haven't tried the USB stuff as yet.
>>>>> There are some issues witht eh altera USB port trigger an Over Current event
>>>>> on device insertation.
>>>>> They've modified the linux kenerl driver to use external OV current
>>>>> detection to get around the problem.
>>>>> My intial workaround was to insert USB device prior to power on.
>>>>> I haven't looked at the uboot USB driver yet to see what's in there.
>>>>>
>>>>>
>>>>> --
>>>>> Regards
>>>>> Phil Reid
>>>>>
>>>>>
>>>>> diff --git a/include/configs/socfpga_common.h
>>>>> b/include/configs/socfpga_common.h
>>>>> index a09e906..3a1b59b 100644 (file)
>>>>> --- a/include/configs/socfpga_common.h
>>>>> +++ b/include/configs/socfpga_common.h
>>>>> @@ -357,13 +357,13 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
>>>>>
>>>>> /* SPL SDMMC boot support */
>>>>> #ifdef CONFIG_SPL_MMC_SUPPORT
>>>>> +#define CONFIG_SPL_LIBDISK_SUPPORT
>>>>> #if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT)
>>>>> #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 2
>>>>> #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img"
>>>>> -#define CONFIG_SPL_LIBDISK_SUPPORT
>>>>> #else
>>>>> -#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 3
>>>>> -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0xa00 /* offset 2560 sect
>>>>> (1M+256k) */
>>>>> +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 3
>>>>> +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
>>>>> #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */
>>>>> #endif
>>>>> #endif
>>>>>
>>>>>
>>>>
>>>> Thanks, Phil!
>>>>
>>>> Sorry for the delayed response - got called away, but am back to this
>>>> now. I patched
>>>> socfpga_common.h and re-built the project. I picked up
>>>> spl/u-boot-spl-dtb.sfp and
>>>> u-boot-dtb.img and transferred them to the SD card with:
>>>>
>>>> dd if=u-boot-spl-dtb.sfp of=/dev/sdf3 bs=64k seek=0
>>>> dd if=u-boot-dtb.img of=/dev/sdf3 bs=64k seek=4
>>>>
>>>
>>> You can just do a 'make u-boot-with-spl.sfp' and burn the
>>> u-boot-with-spl.sfp file straight to the a2 partition, or sdf3.
>>>
>>>> Tried this with both the original DT set (socfpga.dtsi, socfpga_cyclone.dtsi,
>>>> socfpga_cyclone5_sockit.dts) that came with the u-boot v2016.01 download and
>>>> also an Altera-patched DT set that I've used to boot into Linux numerous times.
>>>>
>>>> When I start up the board I get:
>>>>
>>>> U-Boot SPL 2016.01 (Mar 01 2016 - 17:28:14)
>>>> drivers/ddr/altera/sequencer.c: Preparing to start memory calibration
>>>> drivers/ddr/altera/sequencer.c: CALIBRATION FAILED
>>>> drivers/ddr/altera/sequencer.c: Calibration complete
>>>> SDRAM calibration failed.
>>>> ### ERROR ### Please RESET the board ###
>>>>
>>>> I'm not a Quartus user, so I haven't done anything with the
>>>> qts-filter.sh script you
>>>> mentioned. Do I need to? I don't have any custom FPGA logic - it's
>>>> just the Terasic
>>>> board out of the box.
>>>>
>>>
>>> I just tested U-Boot(v2016.03-rc3) and USB is not working on the devkit
>>> or sockit. It's failing to detect my mass storage device.
>>>
>>> Debugging...
>>>
>>
>> Sorry, I mis-spoke for the sockit. I have to turn dcache off for USB to
>> work reliably.
>>
>> => dcache off
>> => usb start
>> starting USB...
>> USB0:   Core Release: 2.93a
>> scanning bus 0 for devices... 2 USB Device(s) found
>> => usb tree
>> USB device tree:
>>   1  Hub (480 Mb/s, 0mA)
>>   |   U-Boot Root Hub
>>   |
>>   +-2  Mass Storage (480 Mb/s, 200mA)
>>        SanDisk Firebird USB Flash Drive 4C532000040115111005
>>
>> => version
>>
>> U-Boot 2016.03-rc3 (Mar 02 2016 - 17:00:25 -0600)
> 
> Well, that's our usual USB/QSPI cache issue that's tormenting your soul.
> CCing Chin ;-)
> 
> Does the issue by any chance magically disappear if you apply this patch:
> 
> diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
> index 026e7ef..06802c6 100644
> --- a/arch/arm/include/asm/system.h
> +++ b/arch/arm/include/asm/system.h
> @@ -274,7 +274,7 @@ static inline void set_dacr(unsigned int val)
> 
>  /* options available for data cache on each page */
>  enum dcache_option {
> -       DCACHE_OFF = TTB_SECT_DOMAIN(0) | TTB_SECT_XN_MASK | TTB_SECT,
> +       DCACHE_OFF = TTB_SECT_S_MASK | TTB_SECT_DOMAIN(0) |
> TTB_SECT_XN_MASK | TTB_SECT,
>         DCACHE_WRITETHROUGH = DCACHE_OFF | TTB_SECT_C_MASK,
>         DCACHE_WRITEBACK = DCACHE_WRITETHROUGH | TTB_SECT_B_MASK,
>         DCACHE_WRITEALLOC = DCACHE_WRITEBACK | TTB_SECT_TEX(1),
> 

Yes, this patch fixes USB with dcache left on.

Dinh
Dinh Nguyen March 4, 2016, 4:52 p.m. UTC | #7 
On 03/03/2016 04:09 PM, Marek Vasut wrote:
> On 03/03/2016 11:00 PM, George Broz wrote:
>> On 3 March 2016 at 06:51, Marek Vasut <marex@denx.de> wrote:
>>> On 03/03/2016 03:48 PM, Dinh Nguyen wrote:
>>>>
>>>>
>>>> On 03/02/2016 05:24 PM, Marek Vasut wrote:
>>>>>
>>>>> Well, that's our usual USB/QSPI cache issue that's tormenting your soul.
>>>>> CCing Chin ;-)
>>>>>
>>>>> Does the issue by any chance magically disappear if you apply this patch:
>>>>>
>>>>> diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
>>>>> index 026e7ef..06802c6 100644
>>>>> --- a/arch/arm/include/asm/system.h
>>>>> +++ b/arch/arm/include/asm/system.h
>>>>> @@ -274,7 +274,7 @@ static inline void set_dacr(unsigned int val)
>>>>>
>>>>>  /* options available for data cache on each page */
>>>>>  enum dcache_option {
>>>>> -       DCACHE_OFF = TTB_SECT_DOMAIN(0) | TTB_SECT_XN_MASK | TTB_SECT,
>>>>> +       DCACHE_OFF = TTB_SECT_S_MASK | TTB_SECT_DOMAIN(0) |
>>>>> TTB_SECT_XN_MASK | TTB_SECT,
>>>>>         DCACHE_WRITETHROUGH = DCACHE_OFF | TTB_SECT_C_MASK,
>>>>>         DCACHE_WRITEBACK = DCACHE_WRITETHROUGH | TTB_SECT_B_MASK,
>>>>>         DCACHE_WRITEALLOC = DCACHE_WRITEBACK | TTB_SECT_TEX(1),
>>>>>
>>
>> The 2016.01 code I'm using already includes this patch. If I try
>> reading a USB stick with dcache on or off
>> I get the same result:
>>
>> => dcache off
>> => usb reset
>> resetting USB...
>> USB0:   Core Release: 2.93a
>> dwc_otg_core_host_init: Timeout!
>> dwc_otg_core_host_init: Timeout!
>> dwc_otg_core_host_init: Timeout!
>> dwc_otg_core_host_init: Timeout!
>> dwc_otg_core_host_init: Timeout!
>> dwc_otg_core_host_init: Timeout!
>> dwc_otg_core_host_init: Timeout!
>> dwc_otg_core_host_init: Timeout!
>> dwc_otg_core_host_init: Timeout!
>> dwc_otg_core_host_init: Timeout!
>> dwc_otg_core_host_init: Timeout!
>> dwc_otg_core_host_init: Timeout!
>> dwc_otg_core_host_init: Timeout!
>> dwc_otg_core_host_init: Timeout!
>> dwc_otg_core_host_init: Timeout!
>> scanning bus 0 for devices... 1 USB Device(s) found
>> => usb tree
>> USB device tree:
>>   1  Hub (480 Mb/s, 0mA)
>>       U-Boot Root Hub
> 
> This more likely means that either clock or reset bits are not
> configured correctly OR you're using the wrong controller. Since
> you're mixing old U-Boot SPL with new U-Boot, there can be some
> discrepancy and I have no idea how to help you with that :(
> 

Can you try these steps?

1)Boot up
2)"dcache off"
3)"mw.l 0xffb40440 0x00001000 1"
4)"usb start"

On the devkit, it seems that the USB port power bit is not getting
turned on, so it's failing to detect the USB device. You can probably
ignore stop 2, if you already Marek's patch.

Dinh
Marek Vasut March 4, 2016, 7:03 p.m. UTC | #8 
On 03/04/2016 05:06 PM, Dinh Nguyen wrote:
> On 03/02/2016 05:24 PM, Marek Vasut wrote:
>> On 03/03/2016 12:08 AM, Dinh Nguyen wrote:
>>> On 03/02/2016 04:54 PM, Dinh Nguyen wrote:
>>>> CC: Marek Vasut
>>>>
>>>> On 03/01/2016 08:40 PM, George Broz wrote:
>>>>> On 17 February 2016 at 18:45, Phil Reid <preid@electromag.com.au> wrote:
>>>>>> G'day George
>>>>>>
>>>>>>
>>>>>> On 18/02/2016 5:54 AM, George Broz wrote:
>>>>>>>
>>>>>>> Hello,
>>>>>>>
>>>>>>> Sorry for the newbie question...
>>>>>>>
>>>>>>> I have an Altera/Terasic board (socfpga_sockit) that has issues
>>>>>>> recognizing
>>>>>>> USB storage devices (roughly 60% good / 40% bad):
>>>>>>>
>>>>>
>>>>>>> If I try a later release (e.g. v2016.01 which seems to support the Terasic
>>>>>>> board explicitly) the boot process stops just after loading the SPL.
>>>>>>>
>>>>>>> At this point I have only been changing the u-boot.img component, not the
>>>>>>> SPL (in the a2 partition of the MMC).
>>>>>>>
>>>>>>> The documentation from Altera about generating the SPL seems to require
>>>>>>> using Qsys/Quartus tools which I'd really like to avoid.
>>>>>>>
>>>>>>> I can produce u-boot-spl.bin / u-boot.img from
>>>>>>> make socfpga_sockit_defconfig; make all.
>>>>>>>
>>>>>>> My newbie question ... should be I able to use directly the u-boot-spl.bin
>>>>>>> generated by the build to replace the SPL on the board?
>>>>>>>
>>>>>>
>>>>>> I've just gone thru the process (this week) of getting uboot 2016.01 to boot
>>>>>> on our custom socfpga board.
>>>>>> There where a few issues in getting things going.
>>>>>> If your using the sd card to boot then the current memory layout is not per
>>>>>> the altera documentation.
>>>>>> I had to make the changes below to config to match the altera docs.
>>>>>> Otherwise it hangs just after the SPL.
>>>>>> You also need to use the -dtb image versions with 2016.01 for things to
>>>>>> work.
>>>>>> Again you may need to make sure the uboot device trees match your hardware.
>>>>>> Not all uboot drivers appear to be using the DT as yet.
>>>>>>
>>>>>> Note the SPL is tightly coupled to the board design and potentially the FPGA
>>>>>> image.
>>>>>> If you using bridges or routing HPS resources (eg i2c etc) to the fpga the
>>>>>> SPL configures the muxes.
>>>>>>
>>>>>> There's a script in uboot src at arch\arm\mach-socfpga\qts-filter.sh
>>>>>> That will generate the qts files for you arch.
>>>>>>
>>>>>> I haven't tried the USB stuff as yet.
>>>>>> There are some issues witht eh altera USB port trigger an Over Current event
>>>>>> on device insertation.
>>>>>> They've modified the linux kenerl driver to use external OV current
>>>>>> detection to get around the problem.
>>>>>> My intial workaround was to insert USB device prior to power on.
>>>>>> I haven't looked at the uboot USB driver yet to see what's in there.
>>>>>>
>>>>>>
>>>>>> --
>>>>>> Regards
>>>>>> Phil Reid
>>>>>>
>>>>>>
>>>>>> diff --git a/include/configs/socfpga_common.h
>>>>>> b/include/configs/socfpga_common.h
>>>>>> index a09e906..3a1b59b 100644 (file)
>>>>>> --- a/include/configs/socfpga_common.h
>>>>>> +++ b/include/configs/socfpga_common.h
>>>>>> @@ -357,13 +357,13 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
>>>>>>
>>>>>> /* SPL SDMMC boot support */
>>>>>> #ifdef CONFIG_SPL_MMC_SUPPORT
>>>>>> +#define CONFIG_SPL_LIBDISK_SUPPORT
>>>>>> #if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT)
>>>>>> #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 2
>>>>>> #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img"
>>>>>> -#define CONFIG_SPL_LIBDISK_SUPPORT
>>>>>> #else
>>>>>> -#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 3
>>>>>> -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0xa00 /* offset 2560 sect
>>>>>> (1M+256k) */
>>>>>> +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 3
>>>>>> +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
>>>>>> #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */
>>>>>> #endif
>>>>>> #endif
>>>>>>
>>>>>>
>>>>>
>>>>> Thanks, Phil!
>>>>>
>>>>> Sorry for the delayed response - got called away, but am back to this
>>>>> now. I patched
>>>>> socfpga_common.h and re-built the project. I picked up
>>>>> spl/u-boot-spl-dtb.sfp and
>>>>> u-boot-dtb.img and transferred them to the SD card with:
>>>>>
>>>>> dd if=u-boot-spl-dtb.sfp of=/dev/sdf3 bs=64k seek=0
>>>>> dd if=u-boot-dtb.img of=/dev/sdf3 bs=64k seek=4
>>>>>
>>>>
>>>> You can just do a 'make u-boot-with-spl.sfp' and burn the
>>>> u-boot-with-spl.sfp file straight to the a2 partition, or sdf3.
>>>>
>>>>> Tried this with both the original DT set (socfpga.dtsi, socfpga_cyclone.dtsi,
>>>>> socfpga_cyclone5_sockit.dts) that came with the u-boot v2016.01 download and
>>>>> also an Altera-patched DT set that I've used to boot into Linux numerous times.
>>>>>
>>>>> When I start up the board I get:
>>>>>
>>>>> U-Boot SPL 2016.01 (Mar 01 2016 - 17:28:14)
>>>>> drivers/ddr/altera/sequencer.c: Preparing to start memory calibration
>>>>> drivers/ddr/altera/sequencer.c: CALIBRATION FAILED
>>>>> drivers/ddr/altera/sequencer.c: Calibration complete
>>>>> SDRAM calibration failed.
>>>>> ### ERROR ### Please RESET the board ###
>>>>>
>>>>> I'm not a Quartus user, so I haven't done anything with the
>>>>> qts-filter.sh script you
>>>>> mentioned. Do I need to? I don't have any custom FPGA logic - it's
>>>>> just the Terasic
>>>>> board out of the box.
>>>>>
>>>>
>>>> I just tested U-Boot(v2016.03-rc3) and USB is not working on the devkit
>>>> or sockit. It's failing to detect my mass storage device.
>>>>
>>>> Debugging...
>>>>
>>>
>>> Sorry, I mis-spoke for the sockit. I have to turn dcache off for USB to
>>> work reliably.
>>>
>>> => dcache off
>>> => usb start
>>> starting USB...
>>> USB0:   Core Release: 2.93a
>>> scanning bus 0 for devices... 2 USB Device(s) found
>>> => usb tree
>>> USB device tree:
>>>   1  Hub (480 Mb/s, 0mA)
>>>   |   U-Boot Root Hub
>>>   |
>>>   +-2  Mass Storage (480 Mb/s, 200mA)
>>>        SanDisk Firebird USB Flash Drive 4C532000040115111005
>>>
>>> => version
>>>
>>> U-Boot 2016.03-rc3 (Mar 02 2016 - 17:00:25 -0600)
>>
>> Well, that's our usual USB/QSPI cache issue that's tormenting your soul.
>> CCing Chin ;-)
>>
>> Does the issue by any chance magically disappear if you apply this patch:
>>
>> diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
>> index 026e7ef..06802c6 100644
>> --- a/arch/arm/include/asm/system.h
>> +++ b/arch/arm/include/asm/system.h
>> @@ -274,7 +274,7 @@ static inline void set_dacr(unsigned int val)
>>
>>  /* options available for data cache on each page */
>>  enum dcache_option {
>> -       DCACHE_OFF = TTB_SECT_DOMAIN(0) | TTB_SECT_XN_MASK | TTB_SECT,
>> +       DCACHE_OFF = TTB_SECT_S_MASK | TTB_SECT_DOMAIN(0) |
>> TTB_SECT_XN_MASK | TTB_SECT,
>>         DCACHE_WRITETHROUGH = DCACHE_OFF | TTB_SECT_C_MASK,
>>         DCACHE_WRITEBACK = DCACHE_WRITETHROUGH | TTB_SECT_B_MASK,
>>         DCACHE_WRITEALLOC = DCACHE_WRITEBACK | TTB_SECT_TEX(1),
>>
> 
> Yes, this patch fixes USB with dcache left on.

Except that it doesn't fix anything, it just makes the system slower by
setting the S bit :-/ So this is not a fix :-(

Best regards,
Marek Vasut
Chin Liang See March 21, 2016, 2:05 p.m. UTC | #9 
On Fri, 2016-03-04 at 20:03 +0100, Marek Vasut wrote:
> On 03/04/2016 05:06 PM, Dinh Nguyen wrote:
> > On 03/02/2016 05:24 PM, Marek Vasut wrote:
> > > On 03/03/2016 12:08 AM, Dinh Nguyen wrote:
> > > > On 03/02/2016 04:54 PM, Dinh Nguyen wrote:
> > > > > CC: Marek Vasut
> > > > > 
> > > > > On 03/01/2016 08:40 PM, George Broz wrote:
> > > > > > On 17 February 2016 at 18:45, Phil Reid <
> > > > > > preid@electromag.com.au> wrote:
> > > > > > > G'day George
> > > > > > > 
> > > > > > > 
> > > > > > > On 18/02/2016 5:54 AM, George Broz wrote:
> > > > > > > > 
> > > > > > > > Hello,
> > > > > > > > 
> > > > > > > > Sorry for the newbie question...
> > > > > > > > 
> > > > > > > > I have an Altera/Terasic board (socfpga_sockit) that
> > > > > > > > has issues
> > > > > > > > recognizing
> > > > > > > > USB storage devices (roughly 60% good / 40% bad):
> > > > > > > > 
> > > > > > 
> > > > > > > > If I try a later release (e.g. v2016.01 which seems to
> > > > > > > > support the Terasic
> > > > > > > > board explicitly) the boot process stops just after
> > > > > > > > loading the SPL.
> > > > > > > > 
> > > > > > > > At this point I have only been changing the u-boot.img
> > > > > > > > component, not the
> > > > > > > > SPL (in the a2 partition of the MMC).
> > > > > > > > 
> > > > > > > > The documentation from Altera about generating the SPL
> > > > > > > > seems to require
> > > > > > > > using Qsys/Quartus tools which I'd really like to
> > > > > > > > avoid.
> > > > > > > > 
> > > > > > > > I can produce u-boot-spl.bin / u-boot.img from
> > > > > > > > make socfpga_sockit_defconfig; make all.
> > > > > > > > 
> > > > > > > > My newbie question ... should be I able to use directly
> > > > > > > > the u-boot-spl.bin
> > > > > > > > generated by the build to replace the SPL on the board?
> > > > > > > > 
> > > > > > > 
> > > > > > > I've just gone thru the process (this week) of getting
> > > > > > > uboot 2016.01 to boot
> > > > > > > on our custom socfpga board.
> > > > > > > There where a few issues in getting things going.
> > > > > > > If your using the sd card to boot then the current memory
> > > > > > > layout is not per
> > > > > > > the altera documentation.
> > > > > > > I had to make the changes below to config to match the
> > > > > > > altera docs.
> > > > > > > Otherwise it hangs just after the SPL.
> > > > > > > You also need to use the -dtb image versions with 2016.01
> > > > > > > for things to
> > > > > > > work.
> > > > > > > Again you may need to make sure the uboot device trees
> > > > > > > match your hardware.
> > > > > > > Not all uboot drivers appear to be using the DT as yet.
> > > > > > > 
> > > > > > > Note the SPL is tightly coupled to the board design and
> > > > > > > potentially the FPGA
> > > > > > > image.
> > > > > > > If you using bridges or routing HPS resources (eg i2c
> > > > > > > etc) to the fpga the
> > > > > > > SPL configures the muxes.
> > > > > > > 
> > > > > > > There's a script in uboot src at arch\arm\mach
> > > > > > > -socfpga\qts-filter.sh
> > > > > > > That will generate the qts files for you arch.
> > > > > > > 
> > > > > > > I haven't tried the USB stuff as yet.
> > > > > > > There are some issues witht eh altera USB port trigger an
> > > > > > > Over Current event
> > > > > > > on device insertation.
> > > > > > > They've modified the linux kenerl driver to use external
> > > > > > > OV current
> > > > > > > detection to get around the problem.
> > > > > > > My intial workaround was to insert USB device prior to
> > > > > > > power on.
> > > > > > > I haven't looked at the uboot USB driver yet to see
> > > > > > > what's in there.
> > > > > > > 
> > > > > > > 
> > > > > > > --
> > > > > > > Regards
> > > > > > > Phil Reid
> > > > > > > 
> > > > > > > 
> > > > > > > diff --git a/include/configs/socfpga_common.h
> > > > > > > b/include/configs/socfpga_common.h
> > > > > > > index a09e906..3a1b59b 100644 (file)
> > > > > > > --- a/include/configs/socfpga_common.h
> > > > > > > +++ b/include/configs/socfpga_common.h
> > > > > > > @@ -357,13 +357,13 @@ unsigned int
> > > > > > > cm_get_qspi_controller_clk_hz(void);
> > > > > > > 
> > > > > > > /* SPL SDMMC boot support */
> > > > > > > #ifdef CONFIG_SPL_MMC_SUPPORT
> > > > > > > +#define CONFIG_SPL_LIBDISK_SUPPORT
> > > > > > > #if defined(CONFIG_SPL_FAT_SUPPORT) ||
> > > > > > > defined(CONFIG_SPL_EXT_SUPPORT)
> > > > > > > #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 2
> > > > > > > #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img"
> > > > > > > -#define CONFIG_SPL_LIBDISK_SUPPORT
> > > > > > > #else
> > > > > > > -#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 3
> > > > > > > -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0xa00 /*
> > > > > > > offset 2560 sect
> > > > > > > (1M+256k) */
> > > > > > > +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 3
> > > > > > > +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
> > > > > > > #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB
> > > > > > > */
> > > > > > > #endif
> > > > > > > #endif
> > > > > > > 
> > > > > > > 
> > > > > > 
> > > > > > Thanks, Phil!
> > > > > > 
> > > > > > Sorry for the delayed response - got called away, but am
> > > > > > back to this
> > > > > > now. I patched
> > > > > > socfpga_common.h and re-built the project. I picked up
> > > > > > spl/u-boot-spl-dtb.sfp and
> > > > > > u-boot-dtb.img and transferred them to the SD card with:
> > > > > > 
> > > > > > dd if=u-boot-spl-dtb.sfp of=/dev/sdf3 bs=64k seek=0
> > > > > > dd if=u-boot-dtb.img of=/dev/sdf3 bs=64k seek=4
> > > > > > 
> > > > > 
> > > > > You can just do a 'make u-boot-with-spl.sfp' and burn the
> > > > > u-boot-with-spl.sfp file straight to the a2 partition, or
> > > > > sdf3.
> > > > > 
> > > > > > Tried this with both the original DT set (socfpga.dtsi,
> > > > > > socfpga_cyclone.dtsi,
> > > > > > socfpga_cyclone5_sockit.dts) that came with the u-boot
> > > > > > v2016.01 download and
> > > > > > also an Altera-patched DT set that I've used to boot into
> > > > > > Linux numerous times.
> > > > > > 
> > > > > > When I start up the board I get:
> > > > > > 
> > > > > > U-Boot SPL 2016.01 (Mar 01 2016 - 17:28:14)
> > > > > > drivers/ddr/altera/sequencer.c: Preparing to start memory
> > > > > > calibration
> > > > > > drivers/ddr/altera/sequencer.c: CALIBRATION FAILED
> > > > > > drivers/ddr/altera/sequencer.c: Calibration complete
> > > > > > SDRAM calibration failed.
> > > > > > ### ERROR ### Please RESET the board ###
> > > > > > 
> > > > > > I'm not a Quartus user, so I haven't done anything with the
> > > > > > qts-filter.sh script you
> > > > > > mentioned. Do I need to? I don't have any custom FPGA logic
> > > > > > - it's
> > > > > > just the Terasic
> > > > > > board out of the box.
> > > > > > 
> > > > > 
> > > > > I just tested U-Boot(v2016.03-rc3) and USB is not working on
> > > > > the devkit
> > > > > or sockit. It's failing to detect my mass storage device.
> > > > > 
> > > > > Debugging...
> > > > > 
> > > > 
> > > > Sorry, I mis-spoke for the sockit. I have to turn dcache off
> > > > for USB to
> > > > work reliably.
> > > > 
> > > > => dcache off
> > > > => usb start
> > > > starting USB...
> > > > USB0:   Core Release: 2.93a
> > > > scanning bus 0 for devices... 2 USB Device(s) found
> > > > => usb tree
> > > > USB device tree:
> > > >   1  Hub (480 Mb/s, 0mA)
> > > >   |   U-Boot Root Hub
> > > >   |
> > > >   +-2  Mass Storage (480 Mb/s, 200mA)
> > > >        SanDisk Firebird USB Flash Drive 4C532000040115111005
> > > > 
> > > > => version
> > > > 
> > > > U-Boot 2016.03-rc3 (Mar 02 2016 - 17:00:25 -0600)
> > > 
> > > Well, that's our usual USB/QSPI cache issue that's tormenting
> > > your soul.
> > > CCing Chin ;-)
> > > 
> > > Does the issue by any chance magically disappear if you apply
> > > this patch:
> > > 
> > > diff --git a/arch/arm/include/asm/system.h
> > > b/arch/arm/include/asm/system.h
> > > index 026e7ef..06802c6 100644
> > > --- a/arch/arm/include/asm/system.h
> > > +++ b/arch/arm/include/asm/system.h
> > > @@ -274,7 +274,7 @@ static inline void set_dacr(unsigned int val)
> > > 
> > >  /* options available for data cache on each page */
> > >  enum dcache_option {
> > > -       DCACHE_OFF = TTB_SECT_DOMAIN(0) | TTB_SECT_XN_MASK |
> > > TTB_SECT,
> > > +       DCACHE_OFF = TTB_SECT_S_MASK | TTB_SECT_DOMAIN(0) |
> > > TTB_SECT_XN_MASK | TTB_SECT,
> > >         DCACHE_WRITETHROUGH = DCACHE_OFF | TTB_SECT_C_MASK,
> > >         DCACHE_WRITEBACK = DCACHE_WRITETHROUGH | TTB_SECT_B_MASK,
> > >         DCACHE_WRITEALLOC = DCACHE_WRITEBACK | TTB_SECT_TEX(1),
> > > 
> > 
> > Yes, this patch fixes USB with dcache left on.
> 
> Except that it doesn't fix anything, it just makes the system slower
> by
> setting the S bit :-/ So this is not a fix :-(

Sorry for away for a while as busy with some critical issues. 

Finally relooking back on this. I notice that with SanDisk Cruzer Blade
pendrive, U-Boot 2013.01.01 can detect it while latest cannot. The
dcache disablement at latest U-Boot doesn't help.

With that, I compared a bunch of registers from clocks, sysmgr, SCTLR,
ATCLR and USB1 too. I noticed they are similar except the
usb1.globgrp.gusbcfg.ulpiextvbusdrv. The latest U-Boot is indicating
external supply (address 0xffb4000c return value 0x00101710) while
working 2013.01.01 indicating internal charge pump (return value
0x00001710)

Wonder you guys are seeing the same too? Will dig more about this. FYI,
I tried to add lot of delay within dwc2.c but doesn't help at all.

Thanks
Chin Liang



> 
> Best regards,
> Marek Vasut
Chin Liang See March 21, 2016, 3:45 p.m. UTC | #10 
On Mon, 2016-03-21 at 22:05 +0800, Chin Liang See wrote:
> On Fri, 2016-03-04 at 20:03 +0100, Marek Vasut wrote:
> > On 03/04/2016 05:06 PM, Dinh Nguyen wrote:
> > > On 03/02/2016 05:24 PM, Marek Vasut wrote:
> > > > On 03/03/2016 12:08 AM, Dinh Nguyen wrote:
> > > > > On 03/02/2016 04:54 PM, Dinh Nguyen wrote:
> > > > > > CC: Marek Vasut
> > > > > > 
> > > > > > On 03/01/2016 08:40 PM, George Broz wrote:
> > > > > > > On 17 February 2016 at 18:45, Phil Reid <
> > > > > > > preid@electromag.com.au> wrote:
> > > > > > > > G'day George
> > > > > > > > 
> > > > > > > > 
> > > > > > > > On 18/02/2016 5:54 AM, George Broz wrote:
> > > > > > > > > 
> > > > > > > > > Hello,
> > > > > > > > > 
> > > > > > > > > Sorry for the newbie question...
> > > > > > > > > 
> > > > > > > > > I have an Altera/Terasic board (socfpga_sockit) that
> > > > > > > > > has issues
> > > > > > > > > recognizing
> > > > > > > > > USB storage devices (roughly 60% good / 40% bad):
> > > > > > > > > 
> > > > > > > 
> > > > > > > > > If I try a later release (e.g. v2016.01 which seems
> > > > > > > > > to
> > > > > > > > > support the Terasic
> > > > > > > > > board explicitly) the boot process stops just after
> > > > > > > > > loading the SPL.
> > > > > > > > > 
> > > > > > > > > At this point I have only been changing the u
> > > > > > > > > -boot.img
> > > > > > > > > component, not the
> > > > > > > > > SPL (in the a2 partition of the MMC).
> > > > > > > > > 
> > > > > > > > > The documentation from Altera about generating the
> > > > > > > > > SPL
> > > > > > > > > seems to require
> > > > > > > > > using Qsys/Quartus tools which I'd really like to
> > > > > > > > > avoid.
> > > > > > > > > 
> > > > > > > > > I can produce u-boot-spl.bin / u-boot.img from
> > > > > > > > > make socfpga_sockit_defconfig; make all.
> > > > > > > > > 
> > > > > > > > > My newbie question ... should be I able to use
> > > > > > > > > directly
> > > > > > > > > the u-boot-spl.bin
> > > > > > > > > generated by the build to replace the SPL on the
> > > > > > > > > board?
> > > > > > > > > 
> > > > > > > > 
> > > > > > > > I've just gone thru the process (this week) of getting
> > > > > > > > uboot 2016.01 to boot
> > > > > > > > on our custom socfpga board.
> > > > > > > > There where a few issues in getting things going.
> > > > > > > > If your using the sd card to boot then the current
> > > > > > > > memory
> > > > > > > > layout is not per
> > > > > > > > the altera documentation.
> > > > > > > > I had to make the changes below to config to match the
> > > > > > > > altera docs.
> > > > > > > > Otherwise it hangs just after the SPL.
> > > > > > > > You also need to use the -dtb image versions with
> > > > > > > > 2016.01
> > > > > > > > for things to
> > > > > > > > work.
> > > > > > > > Again you may need to make sure the uboot device trees
> > > > > > > > match your hardware.
> > > > > > > > Not all uboot drivers appear to be using the DT as yet.
> > > > > > > > 
> > > > > > > > Note the SPL is tightly coupled to the board design and
> > > > > > > > potentially the FPGA
> > > > > > > > image.
> > > > > > > > If you using bridges or routing HPS resources (eg i2c
> > > > > > > > etc) to the fpga the
> > > > > > > > SPL configures the muxes.
> > > > > > > > 
> > > > > > > > There's a script in uboot src at arch\arm\mach
> > > > > > > > -socfpga\qts-filter.sh
> > > > > > > > That will generate the qts files for you arch.
> > > > > > > > 
> > > > > > > > I haven't tried the USB stuff as yet.
> > > > > > > > There are some issues witht eh altera USB port trigger
> > > > > > > > an
> > > > > > > > Over Current event
> > > > > > > > on device insertation.
> > > > > > > > They've modified the linux kenerl driver to use
> > > > > > > > external
> > > > > > > > OV current
> > > > > > > > detection to get around the problem.
> > > > > > > > My intial workaround was to insert USB device prior to
> > > > > > > > power on.
> > > > > > > > I haven't looked at the uboot USB driver yet to see
> > > > > > > > what's in there.
> > > > > > > > 
> > > > > > > > 
> > > > > > > > --
> > > > > > > > Regards
> > > > > > > > Phil Reid
> > > > > > > > 
> > > > > > > > 
> > > > > > > > diff --git a/include/configs/socfpga_common.h
> > > > > > > > b/include/configs/socfpga_common.h
> > > > > > > > index a09e906..3a1b59b 100644 (file)
> > > > > > > > --- a/include/configs/socfpga_common.h
> > > > > > > > +++ b/include/configs/socfpga_common.h
> > > > > > > > @@ -357,13 +357,13 @@ unsigned int
> > > > > > > > cm_get_qspi_controller_clk_hz(void);
> > > > > > > > 
> > > > > > > > /* SPL SDMMC boot support */
> > > > > > > > #ifdef CONFIG_SPL_MMC_SUPPORT
> > > > > > > > +#define CONFIG_SPL_LIBDISK_SUPPORT
> > > > > > > > #if defined(CONFIG_SPL_FAT_SUPPORT) ||
> > > > > > > > defined(CONFIG_SPL_EXT_SUPPORT)
> > > > > > > > #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 2
> > > > > > > > #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot
> > > > > > > > -dtb.img"
> > > > > > > > -#define CONFIG_SPL_LIBDISK_SUPPORT
> > > > > > > > #else
> > > > > > > > -#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 3
> > > > > > > > -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0xa00
> > > > > > > > /*
> > > > > > > > offset 2560 sect
> > > > > > > > (1M+256k) */
> > > > > > > > +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 3
> > > > > > > > +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
> > > > > > > > #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400
> > > > > > > > KB
> > > > > > > > */
> > > > > > > > #endif
> > > > > > > > #endif
> > > > > > > > 
> > > > > > > > 
> > > > > > > 
> > > > > > > Thanks, Phil!
> > > > > > > 
> > > > > > > Sorry for the delayed response - got called away, but am
> > > > > > > back to this
> > > > > > > now. I patched
> > > > > > > socfpga_common.h and re-built the project. I picked up
> > > > > > > spl/u-boot-spl-dtb.sfp and
> > > > > > > u-boot-dtb.img and transferred them to the SD card with:
> > > > > > > 
> > > > > > > dd if=u-boot-spl-dtb.sfp of=/dev/sdf3 bs=64k seek=0
> > > > > > > dd if=u-boot-dtb.img of=/dev/sdf3 bs=64k seek=4
> > > > > > > 
> > > > > > 
> > > > > > You can just do a 'make u-boot-with-spl.sfp' and burn the
> > > > > > u-boot-with-spl.sfp file straight to the a2 partition, or
> > > > > > sdf3.
> > > > > > 
> > > > > > > Tried this with both the original DT set (socfpga.dtsi,
> > > > > > > socfpga_cyclone.dtsi,
> > > > > > > socfpga_cyclone5_sockit.dts) that came with the u-boot
> > > > > > > v2016.01 download and
> > > > > > > also an Altera-patched DT set that I've used to boot into
> > > > > > > Linux numerous times.
> > > > > > > 
> > > > > > > When I start up the board I get:
> > > > > > > 
> > > > > > > U-Boot SPL 2016.01 (Mar 01 2016 - 17:28:14)
> > > > > > > drivers/ddr/altera/sequencer.c: Preparing to start memory
> > > > > > > calibration
> > > > > > > drivers/ddr/altera/sequencer.c: CALIBRATION FAILED
> > > > > > > drivers/ddr/altera/sequencer.c: Calibration complete
> > > > > > > SDRAM calibration failed.
> > > > > > > ### ERROR ### Please RESET the board ###
> > > > > > > 
> > > > > > > I'm not a Quartus user, so I haven't done anything with
> > > > > > > the
> > > > > > > qts-filter.sh script you
> > > > > > > mentioned. Do I need to? I don't have any custom FPGA
> > > > > > > logic
> > > > > > > - it's
> > > > > > > just the Terasic
> > > > > > > board out of the box.
> > > > > > > 
> > > > > > 
> > > > > > I just tested U-Boot(v2016.03-rc3) and USB is not working
> > > > > > on
> > > > > > the devkit
> > > > > > or sockit. It's failing to detect my mass storage device.
> > > > > > 
> > > > > > Debugging...
> > > > > > 
> > > > > 
> > > > > Sorry, I mis-spoke for the sockit. I have to turn dcache off
> > > > > for USB to
> > > > > work reliably.
> > > > > 
> > > > > => dcache off
> > > > > => usb start
> > > > > starting USB...
> > > > > USB0:   Core Release: 2.93a
> > > > > scanning bus 0 for devices... 2 USB Device(s) found
> > > > > => usb tree
> > > > > USB device tree:
> > > > >   1  Hub (480 Mb/s, 0mA)
> > > > >   |   U-Boot Root Hub
> > > > >   |
> > > > >   +-2  Mass Storage (480 Mb/s, 200mA)
> > > > >        SanDisk Firebird USB Flash Drive 4C532000040115111005
> > > > > 
> > > > > => version
> > > > > 
> > > > > U-Boot 2016.03-rc3 (Mar 02 2016 - 17:00:25 -0600)
> > > > 
> > > > Well, that's our usual USB/QSPI cache issue that's tormenting
> > > > your soul.
> > > > CCing Chin ;-)
> > > > 
> > > > Does the issue by any chance magically disappear if you apply
> > > > this patch:
> > > > 
> > > > diff --git a/arch/arm/include/asm/system.h
> > > > b/arch/arm/include/asm/system.h
> > > > index 026e7ef..06802c6 100644
> > > > --- a/arch/arm/include/asm/system.h
> > > > +++ b/arch/arm/include/asm/system.h
> > > > @@ -274,7 +274,7 @@ static inline void set_dacr(unsigned int
> > > > val)
> > > > 
> > > >  /* options available for data cache on each page */
> > > >  enum dcache_option {
> > > > -       DCACHE_OFF = TTB_SECT_DOMAIN(0) | TTB_SECT_XN_MASK |
> > > > TTB_SECT,
> > > > +       DCACHE_OFF = TTB_SECT_S_MASK | TTB_SECT_DOMAIN(0) |
> > > > TTB_SECT_XN_MASK | TTB_SECT,
> > > >         DCACHE_WRITETHROUGH = DCACHE_OFF | TTB_SECT_C_MASK,
> > > >         DCACHE_WRITEBACK = DCACHE_WRITETHROUGH |
> > > > TTB_SECT_B_MASK,
> > > >         DCACHE_WRITEALLOC = DCACHE_WRITEBACK | TTB_SECT_TEX(1),
> > > > 
> > > 
> > > Yes, this patch fixes USB with dcache left on.
> > 
> > Except that it doesn't fix anything, it just makes the system
> > slower
> > by
> > setting the S bit :-/ So this is not a fix :-(
> 
> Sorry for away for a while as busy with some critical issues. 
> 
> Finally relooking back on this. I notice that with SanDisk Cruzer
> Blade
> pendrive, U-Boot 2013.01.01 can detect it while latest cannot. The
> dcache disablement at latest U-Boot doesn't help.
> 
> With that, I compared a bunch of registers from clocks, sysmgr,
> SCTLR,
> ATCLR and USB1 too. I noticed they are similar except the
> usb1.globgrp.gusbcfg.ulpiextvbusdrv. The latest U-Boot is indicating
> external supply (address 0xffb4000c return value 0x00101710) while
> working 2013.01.01 indicating internal charge pump (return value
> 0x00001710)
> 
> Wonder you guys are seeing the same too? Will dig more about this.
> FYI,
> I tried to add lot of delay within dwc2.c but doesn't help at all.
> 

While modifying the USB power control of the code, I noticed the patch
made by Dinh is not there. Just realize the git clone through http from
main git doesn't work. I was able to clone but getting older version.

With getting the latest code, all my pendrive now can works with dcache
off. Its easier now as I can get consistent behaviour compared
previously. With that, dcache investigation for tomorrow then

Thanks
Chin Liang


> Thanks
> Chin Liang
> 
> 
> 
> > 
> > Best regards,
diff mbox

Patch

diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 026e7ef..06802c6 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -274,7 +274,7 @@  static inline void set_dacr(unsigned int val)

 /* options available for data cache on each page */
 enum dcache_option {
-       DCACHE_OFF = TTB_SECT_DOMAIN(0) | TTB_SECT_XN_MASK | TTB_SECT,
+       DCACHE_OFF = TTB_SECT_S_MASK | TTB_SECT_DOMAIN(0) |
TTB_SECT_XN_MASK | TTB_SECT,
        DCACHE_WRITETHROUGH = DCACHE_OFF | TTB_SECT_C_MASK,
        DCACHE_WRITEBACK = DCACHE_WRITETHROUGH | TTB_SECT_B_MASK,