| Message ID | 50bc5a360c37accd0eee1eecfd291b145a29acd0.1707911544.git.michal.simek@amd.com |
|---|---|
| State | Accepted |
| Commit | 466368e8482cfd3fe202aac461968d061da01530 |
| Delegated to: | Michal Simek |
| Headers | show
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riscv: mbv: Enhance MB-V support with also enabling SPL
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expand
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diff --git a/configs/xilinx_mbv32_defconfig b/configs/xilinx_mbv32_defconfig index 912355f42911..89fb3fbd2fbd 100644 --- a/configs/xilinx_mbv32_defconfig +++ b/configs/xilinx_mbv32_defconfig @@ -12,6 +12,7 @@ CONFIG_BOOT_SCRIPT_OFFSET=0x0 CONFIG_SYS_LOAD_ADDR=0x20200000 CONFIG_DEBUG_UART=y CONFIG_TARGET_XILINX_MBV=y +CONFIG_REMAKE_ELF=y CONFIG_FIT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_DISPLAY_CPUINFO=y diff --git a/configs/xilinx_mbv32_smode_defconfig b/configs/xilinx_mbv32_smode_defconfig index 3c911607a8d9..844afdecebf5 100644 --- a/configs/xilinx_mbv32_smode_defconfig +++ b/configs/xilinx_mbv32_smode_defconfig @@ -12,6 +12,7 @@ CONFIG_BOOT_SCRIPT_OFFSET=0x0 CONFIG_SYS_LOAD_ADDR=0x20200000 CONFIG_TARGET_XILINX_MBV=y CONFIG_RISCV_SMODE=y +CONFIG_REMAKE_ELF=y CONFIG_FIT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_DISPLAY_CPUINFO=y
Create also u-boot.elf out of u-boot ELF. It is better to align it with other Xilinx SOC where u-boot.elf also exists and tools like bootgen works only with files with .elf extension. Signed-off-by: Michal Simek <michal.simek@amd.com> --- configs/xilinx_mbv32_defconfig | 1 + configs/xilinx_mbv32_smode_defconfig | 1 + 2 files changed, 2 insertions(+)