| Message ID | 2d3f93d8c998f72b7724a8aa61855fbacc3af436.1683190404.git.christophe.leroy@csgroup.eu |
|---|---|
| State | Superseded |
| Delegated to: | Tom Rini |
| Headers | show |
| Series | Misc fixes + 8xx CPM relocation | expand |
On Thu, 2023-05-04 at 10:56 +0200, Christophe Leroy wrote: > Using SMC relocation microcode patch or USB-SOF microcode patch > will disable DPRAM memory from 0x2000 to 0x2400 and from 0x2f00 > to 0x3000. > > At the time being, init RAM is setup to use 0x2800-0x2e00, but > the stack pointer goes beyond 0x2800 and even beyond 0x2400. > > For the time being we are not going to use any microcode patch > that uses memory about 0x3000, so reorganise setup to use: > - 0x2800 - 0x2e00 for init malloc and global data and CPM buffers > - 0x3000 - 0x3c00 for init stack > > For more details about CPM dual port ram, see > commit b1d62424cb ("powerpc: mpc8xx: redistribute data in CPM dpram") > > Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> > --- > arch/powerpc/cpu/mpc8xx/start.S | 9 +++++---- > arch/powerpc/include/asm/cpm_8xx.h | 16 ++++++++-------- > include/configs/cmpc885.h | 1 + > include/configs/mcr3000.h | 1 + > 4 files changed, 15 insertions(+), 12 deletions(-) > > diff --git a/arch/powerpc/cpu/mpc8xx/start.S b/arch/powerpc/cpu/mpc8xx/start.S > index 0aa73fca12..41f12021c8 100644 > --- a/arch/powerpc/cpu/mpc8xx/start.S > +++ b/arch/powerpc/cpu/mpc8xx/start.S > @@ -141,14 +141,15 @@ in_flash: > mtspr DER, r2 > > /* set up the stack on top of internal DPRAM */ > + lis r1, CFG_SYS_INIT_SP@h > + ori r1, r1, CFG_SYS_INIT_SP@l > + stwu r0, -4(r1) > + stwu r0, -4(r1) Changing stack ptr incrementally is likely to confuse gdb which may do stack accesses if you single step over this code. It is better to setup the stack in a different reg and the just assign r1 when done. Jocke
Le 04/05/2023 à 12:07, Joakim Tjernlund a écrit : > On Thu, 2023-05-04 at 10:56 +0200, Christophe Leroy wrote: >> Using SMC relocation microcode patch or USB-SOF microcode patch >> will disable DPRAM memory from 0x2000 to 0x2400 and from 0x2f00 >> to 0x3000. >> >> At the time being, init RAM is setup to use 0x2800-0x2e00, but >> the stack pointer goes beyond 0x2800 and even beyond 0x2400. >> >> For the time being we are not going to use any microcode patch >> that uses memory about 0x3000, so reorganise setup to use: >> - 0x2800 - 0x2e00 for init malloc and global data and CPM buffers >> - 0x3000 - 0x3c00 for init stack >> >> For more details about CPM dual port ram, see >> commit b1d62424cb ("powerpc: mpc8xx: redistribute data in CPM dpram") >> >> Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> >> --- >> arch/powerpc/cpu/mpc8xx/start.S | 9 +++++---- >> arch/powerpc/include/asm/cpm_8xx.h | 16 ++++++++-------- >> include/configs/cmpc885.h | 1 + >> include/configs/mcr3000.h | 1 + >> 4 files changed, 15 insertions(+), 12 deletions(-) >> >> diff --git a/arch/powerpc/cpu/mpc8xx/start.S b/arch/powerpc/cpu/mpc8xx/start.S >> index 0aa73fca12..41f12021c8 100644 >> --- a/arch/powerpc/cpu/mpc8xx/start.S >> +++ b/arch/powerpc/cpu/mpc8xx/start.S >> @@ -141,14 +141,15 @@ in_flash: >> mtspr DER, r2 >> >> /* set up the stack on top of internal DPRAM */ >> + lis r1, CFG_SYS_INIT_SP@h >> + ori r1, r1, CFG_SYS_INIT_SP@l >> + stwu r0, -4(r1) >> + stwu r0, -4(r1) > > Changing stack ptr incrementally is likely to confuse gdb which may do stack accesses if you single step > over this code. It is better to setup the stack in a different reg and the just assign r1 when done. > Ok, I can change that. But we are at the very begining and r1 is undefined until now so it shouldn't matter. Christophe
On Thu, 2023-05-04 at 10:17 +0000, Christophe Leroy wrote: > > Le 04/05/2023 à 12:07, Joakim Tjernlund a écrit : > > On Thu, 2023-05-04 at 10:56 +0200, Christophe Leroy wrote: > > > Using SMC relocation microcode patch or USB-SOF microcode patch > > > will disable DPRAM memory from 0x2000 to 0x2400 and from 0x2f00 > > > to 0x3000. > > > > > > At the time being, init RAM is setup to use 0x2800-0x2e00, but > > > the stack pointer goes beyond 0x2800 and even beyond 0x2400. > > > > > > For the time being we are not going to use any microcode patch > > > that uses memory about 0x3000, so reorganise setup to use: > > > - 0x2800 - 0x2e00 for init malloc and global data and CPM buffers > > > - 0x3000 - 0x3c00 for init stack > > > > > > For more details about CPM dual port ram, see > > > commit b1d62424cb ("powerpc: mpc8xx: redistribute data in CPM dpram") > > > > > > Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> > > > --- > > > arch/powerpc/cpu/mpc8xx/start.S | 9 +++++---- > > > arch/powerpc/include/asm/cpm_8xx.h | 16 ++++++++-------- > > > include/configs/cmpc885.h | 1 + > > > include/configs/mcr3000.h | 1 + > > > 4 files changed, 15 insertions(+), 12 deletions(-) > > > > > > diff --git a/arch/powerpc/cpu/mpc8xx/start.S b/arch/powerpc/cpu/mpc8xx/start.S > > > index 0aa73fca12..41f12021c8 100644 > > > --- a/arch/powerpc/cpu/mpc8xx/start.S > > > +++ b/arch/powerpc/cpu/mpc8xx/start.S > > > @@ -141,14 +141,15 @@ in_flash: > > > mtspr DER, r2 > > > > > > /* set up the stack on top of internal DPRAM */ > > > + lis r1, CFG_SYS_INIT_SP@h > > > + ori r1, r1, CFG_SYS_INIT_SP@l > > > + stwu r0, -4(r1) > > > + stwu r0, -4(r1) > > > > Changing stack ptr incrementally is likely to confuse gdb which may do stack accesses if you single step > > over this code. It is better to setup the stack in a different reg and the just assign r1 when done. > > > > Ok, I can change that. But we are at the very begining and r1 is > undefined until now so it shouldn't matter. Yes, but gdb will see r1 change and will try to parse stack when it changes. This only matters when single stepping code in question. I am unlikely to debug 8xx these days, just wanted to mention my past experience. Jocke
diff --git a/arch/powerpc/cpu/mpc8xx/start.S b/arch/powerpc/cpu/mpc8xx/start.S index 0aa73fca12..41f12021c8 100644 --- a/arch/powerpc/cpu/mpc8xx/start.S +++ b/arch/powerpc/cpu/mpc8xx/start.S @@ -141,14 +141,15 @@ in_flash: mtspr DER, r2 /* set up the stack on top of internal DPRAM */ + lis r1, CFG_SYS_INIT_SP@h + ori r1, r1, CFG_SYS_INIT_SP@l + stwu r0, -4(r1) + stwu r0, -4(r1) + lis r3, (CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_SIZE)@h ori r3, r3, (CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_SIZE)@l - stw r0, -4(r3) - stw r0, -8(r3) - addi r1, r3, -8 bl board_init_f_alloc_reserve - addi r1, r3, -8 /* Zeroise the CPM dpram */ lis r4, CONFIG_SYS_IMMR@h diff --git a/arch/powerpc/include/asm/cpm_8xx.h b/arch/powerpc/include/asm/cpm_8xx.h index 09c24efd91..77ffcce5a6 100644 --- a/arch/powerpc/include/asm/cpm_8xx.h +++ b/arch/powerpc/include/asm/cpm_8xx.h @@ -51,14 +51,14 @@ /* * DPRAM defines and allocation functions */ -#define CPM_SERIAL_BASE 0x1800 -#define CPM_I2C_BASE 0x1820 -#define CPM_SPI_BASE 0x1840 -#define CPM_FEC_BASE 0x1860 -#define CPM_SERIAL2_BASE 0x18e0 -#define CPM_SCC_BASE 0x1900 -#define CPM_POST_BASE 0x1980 -#define CPM_WLKBD_BASE 0x1a00 +#define CPM_SERIAL_BASE 0x0800 +#define CPM_I2C_BASE 0x0820 +#define CPM_SPI_BASE 0x0840 +#define CPM_FEC_BASE 0x0860 +#define CPM_SERIAL2_BASE 0x08E0 +#define CPM_SCC_BASE 0x0900 +#define CPM_POST_BASE 0x0980 +#define CPM_WLKBD_BASE 0x0a00 #define BD_IIC_START ((uint) 0x0400) /* <- please use CPM_I2C_BASE !! */ diff --git a/include/configs/cmpc885.h b/include/configs/cmpc885.h index b76230e9a4..545365e112 100644 --- a/include/configs/cmpc885.h +++ b/include/configs/cmpc885.h @@ -9,6 +9,7 @@ /* Definitions for initial stack pointer and data area (in DPRAM) */ #define CFG_SYS_INIT_RAM_ADDR (CONFIG_SYS_IMMR + 0x2800) #define CFG_SYS_INIT_RAM_SIZE (0x2e00 - 0x2800) +#define CFG_SYS_INIT_SP (CONFIG_SYS_IMMR + 0x3c00) /* RAM configuration (note that CFG_SYS_SDRAM_BASE must be zero) */ #define CFG_SYS_SDRAM_BASE 0x00000000 diff --git a/include/configs/mcr3000.h b/include/configs/mcr3000.h index 6b16b050ff..a07761fdbb 100644 --- a/include/configs/mcr3000.h +++ b/include/configs/mcr3000.h @@ -14,6 +14,7 @@ /* Definitions for initial stack pointer and data area (in DPRAM) */ #define CFG_SYS_INIT_RAM_ADDR (CONFIG_SYS_IMMR + 0x2800) #define CFG_SYS_INIT_RAM_SIZE (0x2e00 - 0x2800) +#define CFG_SYS_INIT_SP (CONFIG_SYS_IMMR + 0x3c00) /* RAM configuration (note that CFG_SYS_SDRAM_BASE must be zero) */ #define CFG_SYS_SDRAM_BASE 0x00000000
Using SMC relocation microcode patch or USB-SOF microcode patch will disable DPRAM memory from 0x2000 to 0x2400 and from 0x2f00 to 0x3000. At the time being, init RAM is setup to use 0x2800-0x2e00, but the stack pointer goes beyond 0x2800 and even beyond 0x2400. For the time being we are not going to use any microcode patch that uses memory about 0x3000, so reorganise setup to use: - 0x2800 - 0x2e00 for init malloc and global data and CPM buffers - 0x3000 - 0x3c00 for init stack For more details about CPM dual port ram, see commit b1d62424cb ("powerpc: mpc8xx: redistribute data in CPM dpram") Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> --- arch/powerpc/cpu/mpc8xx/start.S | 9 +++++---- arch/powerpc/include/asm/cpm_8xx.h | 16 ++++++++-------- include/configs/cmpc885.h | 1 + include/configs/mcr3000.h | 1 + 4 files changed, 15 insertions(+), 12 deletions(-)