Message ID | 2859fce38421e55bad2edec362705e3b5ecf7eb6.1622448001.git.michal.simek@xilinx.com |
---|---|
State | Accepted |
Commit | d9be8b4f2fab89234779921601d5bf9b9e719af0 |
Delegated to: | Michal Simek |
Headers | show
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Mon, 31 May 2021 01:00:10 -0700 (PDT) From: Michal Simek <michal.simek@xilinx.com> To: u-boot@lists.denx.de, git@xilinx.com Cc: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>, Michal Simek <monstr@monstr.eu>, Stefano Stabellini <stefano.stabellini@xilinx.com> Subject: [PATCH 2/7] arm64: zynqmp: Disable CCI by default Date: Mon, 31 May 2021 10:00:01 +0200 Message-Id: <2859fce38421e55bad2edec362705e3b5ecf7eb6.1622448001.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <cover.1622448001.git.michal.simek@xilinx.com> References: <cover.1622448001.git.michal.simek@xilinx.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion <u-boot.lists.denx.de> List-Unsubscribe: <https://lists.denx.de/options/u-boot>, <mailto:u-boot-request@lists.denx.de?subject=unsubscribe> List-Archive: <https://lists.denx.de/pipermail/u-boot/> List-Post: <mailto:u-boot@lists.denx.de> List-Help: <mailto:u-boot-request@lists.denx.de?subject=help> List-Subscribe: <https://lists.denx.de/listinfo/u-boot>, <mailto:u-boot-request@lists.denx.de?subject=subscribe> Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" <u-boot-bounces@lists.denx.de> X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean |
Series |
arm64: zynqmp: DT syncup
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diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 84d9770225aa..db4099b7516b 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -246,6 +246,7 @@ cci: cci@fd6e0000 { compatible = "arm,cci-400"; + status = "disabled"; reg = <0x0 0xfd6e0000 0x0 0x9000>; ranges = <0x0 0x0 0xfd6e0000 0x10000>; #address-cells = <1>;
There is no reason to have CCI no enabled by default. Enable it when your system configuration requires it. In Xilinx configuration flow this is work for Device Tree Generator which reads information from HW Design configuration. Signed-off-by: Michal Simek <michal.simek@xilinx.com> --- arch/arm/dts/zynqmp.dtsi | 1 + 1 file changed, 1 insertion(+)