| Message ID | 20240408181429.3676856-6-jonas@kwiboo.se |
|---|---|
| State | Accepted |
| Delegated to: | Kever Yang |
| Headers | show |
| Series | rockchip: rk3308: Sync DT with linux v6.8 and update defconfigs | expand |
Hi Jonas, On 4/8/24 20:14, Jonas Karlman wrote: > The RK3308 SoC contain a crypto engine block that can generate random > numbers. > > Add rng node to soc u-boot.dtsi and enable Kconfig options to take > advantage of the random generator. > > Signed-off-by: Jonas Karlman <jonas@kwiboo.se> > --- > v2: No change > --- > arch/arm/dts/rk3308-u-boot.dtsi | 5 +++++ > arch/arm/mach-rockchip/Kconfig | 2 ++ > 2 files changed, 7 insertions(+) > > diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi > index 436f66d1b87d..fa31c838d34d 100644 > --- a/arch/arm/dts/rk3308-u-boot.dtsi > +++ b/arch/arm/dts/rk3308-u-boot.dtsi > @@ -26,6 +26,11 @@ > reg = <0x07 0x10>; > }; > }; > + > + rng: rng@ff2f0000 { > + compatible = "rockchip,cryptov2-rng"; > + reg = <0x0 0xff2f0000 0x0 0x4000>; Downstream says something different: https://github.com/rockchip-linux/kernel/blob/develop-5.10/arch/arm64/boot/dts/rockchip/rk3308.dtsi#L1007-L1020 I couldn't quickly find the TRM for the RK3308 so cannot check myself :/ Also seems to be missing clocks and resets? Cheers, Quentin
Hi Quentin, On 2024-04-09 17:45, Quentin Schulz wrote: > Hi Jonas, > > On 4/8/24 20:14, Jonas Karlman wrote: >> The RK3308 SoC contain a crypto engine block that can generate random >> numbers. >> >> Add rng node to soc u-boot.dtsi and enable Kconfig options to take >> advantage of the random generator. >> >> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> >> --- >> v2: No change >> --- >> arch/arm/dts/rk3308-u-boot.dtsi | 5 +++++ >> arch/arm/mach-rockchip/Kconfig | 2 ++ >> 2 files changed, 7 insertions(+) >> >> diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi >> index 436f66d1b87d..fa31c838d34d 100644 >> --- a/arch/arm/dts/rk3308-u-boot.dtsi >> +++ b/arch/arm/dts/rk3308-u-boot.dtsi >> @@ -26,6 +26,11 @@ >> reg = <0x07 0x10>; >> }; >> }; >> + >> + rng: rng@ff2f0000 { >> + compatible = "rockchip,cryptov2-rng"; >> + reg = <0x0 0xff2f0000 0x0 0x4000>; > > Downstream says something different: > > https://github.com/rockchip-linux/kernel/blob/develop-5.10/arch/arm64/boot/dts/rockchip/rk3308.dtsi#L1007-L1020 > > I couldn't quickly find the TRM for the RK3308 so cannot check myself :/ RK3308TRM Part1 mention following under address mapping: ff2f0000 CRYPTO 64K And RK3308TRM Part2 mention following under crypto regs: CRYPTO_CLK_CTL 0x0000 W 0x00000001 Clock Control Register [...] CRYPTO_RNG_CTL 0x0400 W 0x0000000c RNG Control Register [...] CRYPTO_SRAM_ADDR 0x1000 W 0x00000000 SRAM Base Address And the U-Boot driver: /* start of CRYPTO V2 register define */ #define CRYPTO_V2_RNG_CTL 0x0400 So 0xff2f0000 should be correct for the crypto block on RK3308. And the rng cmd also gives me proper random numbers on my Rock Pi S board. > > Also seems to be missing clocks and resets? Yeah, this is just a minimal node to get the rng driver in U-Boot working and like most other clocks they are enabled and running at an acceptable rate by default. Regards, Jonas > > Cheers, > Quentin
Hello Quentin, On 2024-04-09 17:45, Quentin Schulz wrote: > Hi Jonas, > > On 4/8/24 20:14, Jonas Karlman wrote: >> The RK3308 SoC contain a crypto engine block that can generate random >> numbers. >> >> Add rng node to soc u-boot.dtsi and enable Kconfig options to take >> advantage of the random generator. >> >> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> >> --- >> v2: No change >> --- >> arch/arm/dts/rk3308-u-boot.dtsi | 5 +++++ >> arch/arm/mach-rockchip/Kconfig | 2 ++ >> 2 files changed, 7 insertions(+) >> >> diff --git a/arch/arm/dts/rk3308-u-boot.dtsi >> b/arch/arm/dts/rk3308-u-boot.dtsi >> index 436f66d1b87d..fa31c838d34d 100644 >> --- a/arch/arm/dts/rk3308-u-boot.dtsi >> +++ b/arch/arm/dts/rk3308-u-boot.dtsi >> @@ -26,6 +26,11 @@ >> reg = <0x07 0x10>; >> }; >> }; >> + >> + rng: rng@ff2f0000 { >> + compatible = "rockchip,cryptov2-rng"; >> + reg = <0x0 0xff2f0000 0x0 0x4000>; > > Downstream says something different: > > https://github.com/rockchip-linux/kernel/blob/develop-5.10/arch/arm64/boot/dts/rockchip/rk3308.dtsi#L1007-L1020 > > I couldn't quickly find the TRM for the RK3308 so cannot check myself > :/ The RK3308 TRM can be found on the link below. BTW, there's also a rather interesting PDF file that describes a node shrink of the RK3308, the so-called S-version chip. https://dl.radxa.com/rockpis/docs/hw/datasheets/ > Also seems to be missing clocks and resets?
Hi Jonas, On 4/9/24 18:21, Jonas Karlman wrote: > Hi Quentin, > > On 2024-04-09 17:45, Quentin Schulz wrote: >> Hi Jonas, >> >> On 4/8/24 20:14, Jonas Karlman wrote: >>> The RK3308 SoC contain a crypto engine block that can generate random >>> numbers. >>> >>> Add rng node to soc u-boot.dtsi and enable Kconfig options to take >>> advantage of the random generator. >>> >>> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> >>> --- >>> v2: No change >>> --- >>> arch/arm/dts/rk3308-u-boot.dtsi | 5 +++++ >>> arch/arm/mach-rockchip/Kconfig | 2 ++ >>> 2 files changed, 7 insertions(+) >>> >>> diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi >>> index 436f66d1b87d..fa31c838d34d 100644 >>> --- a/arch/arm/dts/rk3308-u-boot.dtsi >>> +++ b/arch/arm/dts/rk3308-u-boot.dtsi >>> @@ -26,6 +26,11 @@ >>> reg = <0x07 0x10>; >>> }; >>> }; >>> + >>> + rng: rng@ff2f0000 { >>> + compatible = "rockchip,cryptov2-rng"; >>> + reg = <0x0 0xff2f0000 0x0 0x4000>; >> >> Downstream says something different: >> >> https://github.com/rockchip-linux/kernel/blob/develop-5.10/arch/arm64/boot/dts/rockchip/rk3308.dtsi#L1007-L1020 >> >> I couldn't quickly find the TRM for the RK3308 so cannot check myself :/ > > RK3308TRM Part1 mention following under address mapping: > > ff2f0000 CRYPTO 64K > > And RK3308TRM Part2 mention following under crypto regs: > > CRYPTO_CLK_CTL 0x0000 W 0x00000001 Clock Control Register > [...] > CRYPTO_RNG_CTL 0x0400 W 0x0000000c RNG Control Register > [...] > CRYPTO_SRAM_ADDR 0x1000 W 0x00000000 SRAM Base Address > > And the U-Boot driver: > > /* start of CRYPTO V2 register define */ > #define CRYPTO_V2_RNG_CTL 0x0400 > > So 0xff2f0000 should be correct for the crypto block on RK3308. And the > rng cmd also gives me proper random numbers on my Rock Pi S board. > Could verify with the TRM Dragan shared, thanks. >> >> Also seems to be missing clocks and resets? > > Yeah, this is just a minimal node to get the rng driver in U-Boot > working and like most other clocks they are enabled and running at an > acceptable rate by default. > Considering that the clocks and resets all seem to be crypto block specific and that the kernel doesn't seem to be doing runtime PM on Rockchip clocks, I guess this is good enough for now? Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Thanks, Quentin
On 2024/4/9 02:14, Jonas Karlman wrote: > The RK3308 SoC contain a crypto engine block that can generate random > numbers. > > Add rng node to soc u-boot.dtsi and enable Kconfig options to take > advantage of the random generator. > > Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Thanks, - Kever > --- > v2: No change > --- > arch/arm/dts/rk3308-u-boot.dtsi | 5 +++++ > arch/arm/mach-rockchip/Kconfig | 2 ++ > 2 files changed, 7 insertions(+) > > diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi > index 436f66d1b87d..fa31c838d34d 100644 > --- a/arch/arm/dts/rk3308-u-boot.dtsi > +++ b/arch/arm/dts/rk3308-u-boot.dtsi > @@ -26,6 +26,11 @@ > reg = <0x07 0x10>; > }; > }; > + > + rng: rng@ff2f0000 { > + compatible = "rockchip,cryptov2-rng"; > + reg = <0x0 0xff2f0000 0x0 0x4000>; > + }; > }; > > &cru { > diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig > index 6e07a70bf4ae..fa5917236a43 100644 > --- a/arch/arm/mach-rockchip/Kconfig > +++ b/arch/arm/mach-rockchip/Kconfig > @@ -162,9 +162,11 @@ config ROCKCHIP_RK3308 > select SPL_LOAD_FIT > imply ARMV8_CRYPTO > imply ARMV8_SET_SMPEN > + imply DM_RNG > imply LEGACY_IMAGE_FORMAT > imply MISC > imply MISC_INIT_R > + imply RNG_ROCKCHIP > imply ROCKCHIP_COMMON_BOARD > imply ROCKCHIP_OTP > imply SPL_CLK
diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi index 436f66d1b87d..fa31c838d34d 100644 --- a/arch/arm/dts/rk3308-u-boot.dtsi +++ b/arch/arm/dts/rk3308-u-boot.dtsi @@ -26,6 +26,11 @@ reg = <0x07 0x10>; }; }; + + rng: rng@ff2f0000 { + compatible = "rockchip,cryptov2-rng"; + reg = <0x0 0xff2f0000 0x0 0x4000>; + }; }; &cru { diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 6e07a70bf4ae..fa5917236a43 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -162,9 +162,11 @@ config ROCKCHIP_RK3308 select SPL_LOAD_FIT imply ARMV8_CRYPTO imply ARMV8_SET_SMPEN + imply DM_RNG imply LEGACY_IMAGE_FORMAT imply MISC imply MISC_INIT_R + imply RNG_ROCKCHIP imply ROCKCHIP_COMMON_BOARD imply ROCKCHIP_OTP imply SPL_CLK
The RK3308 SoC contain a crypto engine block that can generate random numbers. Add rng node to soc u-boot.dtsi and enable Kconfig options to take advantage of the random generator. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> --- v2: No change --- arch/arm/dts/rk3308-u-boot.dtsi | 5 +++++ arch/arm/mach-rockchip/Kconfig | 2 ++ 2 files changed, 7 insertions(+)