| Message ID | 20240311111027.44577-4-sumit.garg@linaro.org |
|---|---|
| State | Superseded |
| Delegated to: | Caleb Connolly |
| Headers | show |
| Series | Add SE HMBSC board support | expand |
On 11/03/2024 11:10, Sumit Garg wrote: > SE HMIBSC board debug console requires RS232 flow control, so enable > corresponding support if RS232 gpios are present. > > Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> > --- > drivers/serial/serial_msm.c | 13 ++++++++----- > 1 file changed, 8 insertions(+), 5 deletions(-) > > diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c > index eaf024a55b0..7b2a3fdb2c1 100644 > --- a/drivers/serial/serial_msm.c > +++ b/drivers/serial/serial_msm.c > @@ -53,10 +53,11 @@ > #define UARTDM_TF 0x100 /* UART Transmit FIFO register */ > #define UARTDM_RF 0x140 /* UART Receive FIFO register */ > > -#define UART_DM_CLK_RX_TX_BIT_RATE 0xCC > -#define MSM_BOOT_UART_DM_8_N_1_MODE 0x34 > -#define MSM_BOOT_UART_DM_CMD_RESET_RX 0x10 > -#define MSM_BOOT_UART_DM_CMD_RESET_TX 0x20 > +#define UART_DM_CLK_RX_TX_BIT_RATE 0xCC > +#define MSM_BOOT_UART_DM_8_N_1_MODE 0x34 > +#define MSM_BOOT_UART_DM_CMD_RESET_RX 0x10 > +#define MSM_BOOT_UART_DM_CMD_RESET_TX 0x20 > +#define MSM_UART_MR1_RX_RDY_CTL BIT(7) > > DECLARE_GLOBAL_DATA_PTR; > > @@ -182,7 +183,9 @@ static void uart_dm_init(struct msm_serial_data *priv) > mdelay(5); > > writel(priv->clk_bit_rate, priv->base + UARTDM_CSR); > - writel(0x0, priv->base + UARTDM_MR1); > + > + /* Enable RS232 flow control to support RS232 db9 connector */ > + writel(MSM_UART_MR1_RX_RDY_CTL, priv->base + UARTDM_MR1); > writel(MSM_BOOT_UART_DM_8_N_1_MODE, priv->base + UARTDM_MR2); > writel(MSM_BOOT_UART_DM_CMD_RESET_RX, priv->base + UARTDM_CR); > writel(MSM_BOOT_UART_DM_CMD_RESET_TX, priv->base + UARTDM_CR);
diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c index eaf024a55b0..7b2a3fdb2c1 100644 --- a/drivers/serial/serial_msm.c +++ b/drivers/serial/serial_msm.c @@ -53,10 +53,11 @@ #define UARTDM_TF 0x100 /* UART Transmit FIFO register */ #define UARTDM_RF 0x140 /* UART Receive FIFO register */ -#define UART_DM_CLK_RX_TX_BIT_RATE 0xCC -#define MSM_BOOT_UART_DM_8_N_1_MODE 0x34 -#define MSM_BOOT_UART_DM_CMD_RESET_RX 0x10 -#define MSM_BOOT_UART_DM_CMD_RESET_TX 0x20 +#define UART_DM_CLK_RX_TX_BIT_RATE 0xCC +#define MSM_BOOT_UART_DM_8_N_1_MODE 0x34 +#define MSM_BOOT_UART_DM_CMD_RESET_RX 0x10 +#define MSM_BOOT_UART_DM_CMD_RESET_TX 0x20 +#define MSM_UART_MR1_RX_RDY_CTL BIT(7) DECLARE_GLOBAL_DATA_PTR; @@ -182,7 +183,9 @@ static void uart_dm_init(struct msm_serial_data *priv) mdelay(5); writel(priv->clk_bit_rate, priv->base + UARTDM_CSR); - writel(0x0, priv->base + UARTDM_MR1); + + /* Enable RS232 flow control to support RS232 db9 connector */ + writel(MSM_UART_MR1_RX_RDY_CTL, priv->base + UARTDM_MR1); writel(MSM_BOOT_UART_DM_8_N_1_MODE, priv->base + UARTDM_MR2); writel(MSM_BOOT_UART_DM_CMD_RESET_RX, priv->base + UARTDM_CR); writel(MSM_BOOT_UART_DM_CMD_RESET_TX, priv->base + UARTDM_CR);
SE HMIBSC board debug console requires RS232 flow control, so enable corresponding support if RS232 gpios are present. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> --- drivers/serial/serial_msm.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-)