| Message ID | 20240306-pcl-070-patches-v3-2-cb39c3487bc3@phytec.de |
|---|---|
| State | Accepted |
| Commit | 76832300a9c8b4a61cb7a49e0b9779e931abbc37 |
| Delegated to: | Fabio Estevam |
| Headers | show |
| Series | board: phytec_imx8mp: Use 2GHz RAM timings for PCL-070 from pcb_rev 1 | expand |
diff --git a/board/phytec/phycore_imx8mp/spl.c b/board/phytec/phycore_imx8mp/spl.c index d38f6368fe36..df158024654e 100644 --- a/board/phytec/phycore_imx8mp/spl.c +++ b/board/phytec/phycore_imx8mp/spl.c @@ -46,8 +46,10 @@ void spl_dram_init(void) if (!ret) phytec_print_som_info(NULL); - ret = phytec_get_rev(NULL); - if (ret >= 3 && ret != PHYTEC_EEPROM_INVAL) { + u8 rev = phytec_get_rev(NULL); + u8 somtype = phytec_get_som_type(NULL); + + if (rev != PHYTEC_EEPROM_INVAL && (rev >= 3 || (somtype == SOM_TYPE_PCL && rev >= 1))) { dram_timing.ddrc_cfg[3].val = 0x1323; dram_timing.ddrc_cfg[4].val = 0x1e84800; dram_timing.ddrc_cfg[5].val = 0x7a0118;
We need to differ between PCL-070 and PCM-070. PCL-070 supports 2GHz RAM timings from pcb rev 1 or newer. PCM-070 supports 2GHz RAM timings from pcb rev 3 or newer. Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de> --- board/phytec/phycore_imx8mp/spl.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)