| Message ID | 20240212043227.151246-1-tejas.arvind.bhumkar@amd.com |
|---|---|
| State | New |
| Delegated to: | Dario Binacchi |
| Headers | show
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mtd: spi-nor: Add NO_CHIP_ERASE flag
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diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 38a287487e..bfbdf7570b 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -329,7 +329,7 @@ const struct flash_info spi_nor_ids[] = { { INFO("mt35xu512aba", 0x2c5b1a, 0, 128 * 1024, 512, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES | SPI_NOR_OCTAL_DTR_READ) }, #endif /* CONFIG_SPI_FLASH_MT35XU */ { INFO6("mt35xu01g", 0x2c5b1b, 0x104100, 128 * 1024, 1024, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) }, - { INFO("mt35xu02g", 0x2c5b1c, 0, 128 * 1024, 2048, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) }, + { INFO("mt35xu02g", 0x2c5b1c, 0, 128 * 1024, 2048, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES | NO_CHIP_ERASE) }, #endif #ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */ /* Spansion/Cypress -- single (large) sector size only, at least
Since the opcode SPINOR_OP_CHIP_ERASE (0xc7) is not supported for the mt35xu02g flash, the NO_CHIP_ERASE flag has been added to enable sector erase functionality instead. Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com> --- drivers/mtd/spi/spi-nor-ids.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)