| Message ID | 20240121114909.2909574-1-bigunclemax@gmail.com |
|---|---|
| State | New |
| Delegated to: | Andre Przywara |
| Headers | show |
| Series | [v1] sunxi: R528: add UART1 support | expand |
On Sun, 21 Jan 2024 14:49:08 +0300 Maksim Kiselev <bigunclemax@gmail.com> wrote: > Add PG6-PG7 pins configuration for the SPL to allow use UART1 > on boards with the Allwinner R528/T113 family. That looks alright. Not super happy to take yet another combination, but well. Also see below. > Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> > --- > > I tested this patch on LC-PI-T113 board. > This board can be found on eBay or Aliexpress, and looks like > that it is widespread enough to send this patch to the upstream :) ... it would be even better to have a DT and defconfig then, right? Then we would have a user for this code part then. Any chance you could send something to that effect? Are there any BSP code drops, or a schematic or some other documentation? I couldn't find something on a quick search. Cheers, Andre > arch/arm/mach-sunxi/board.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c > index 11a4941822..9dedcd45f5 100644 > --- a/arch/arm/mach-sunxi/board.c > +++ b/arch/arm/mach-sunxi/board.c > @@ -159,6 +159,10 @@ static int gpio_init(void) > sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1); > sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG_UART1); > sunxi_gpio_set_pull(SUNXI_GPG(4), SUNXI_GPIO_PULL_UP); > +#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN8I_R528) > + sunxi_gpio_set_cfgpin(SUNXI_GPG(6), 2); > + sunxi_gpio_set_cfgpin(SUNXI_GPG(7), 2); > + sunxi_gpio_set_pull(SUNXI_GPG(7), SUNXI_GPIO_PULL_UP); > #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I_H3) > sunxi_gpio_set_cfgpin(SUNXI_GPA(0), SUN8I_H3_GPA_UART2); > sunxi_gpio_set_cfgpin(SUNXI_GPA(1), SUN8I_H3_GPA_UART2);
пт, 26 янв. 2024 г. в 20:11, Andre Przywara <andre.przywara@arm.com>: > > On Sun, 21 Jan 2024 14:49:08 +0300 > Maksim Kiselev <bigunclemax@gmail.com> wrote: > > > Add PG6-PG7 pins configuration for the SPL to allow use UART1 > > on boards with the Allwinner R528/T113 family. > > That looks alright. Not super happy to take yet another combination, but > well. Also see below. > > > Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com> > > Reviewed-by: Andre Przywara <andre.przywara@arm.com> > > > --- > > > > I tested this patch on LC-PI-T113 board. > > This board can be found on eBay or Aliexpress, and looks like > > that it is widespread enough to send this patch to the upstream :) > > ... it would be even better to have a DT and defconfig then, right? > Then we would have a user for this code part then. Any chance you could > send something to that effect? Well, I can try to do this. > Are there any BSP code drops, or a schematic or some other documentation? > I couldn't find something on a quick search. The google drive link https://drive.google.com/drive/folders/1lrqDsxtGl8WvU7o547lT9IkHwGyAHXFU is the only “official” documentation that I found. It contains a board scheme, some datasheets and a useless fw image :) > Cheers, > Andre > > > > arch/arm/mach-sunxi/board.c | 4 ++++ > > 1 file changed, 4 insertions(+) > > > > diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c > > index 11a4941822..9dedcd45f5 100644 > > --- a/arch/arm/mach-sunxi/board.c > > +++ b/arch/arm/mach-sunxi/board.c > > @@ -159,6 +159,10 @@ static int gpio_init(void) > > sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1); > > sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG_UART1); > > sunxi_gpio_set_pull(SUNXI_GPG(4), SUNXI_GPIO_PULL_UP); > > +#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN8I_R528) > > + sunxi_gpio_set_cfgpin(SUNXI_GPG(6), 2); > > + sunxi_gpio_set_cfgpin(SUNXI_GPG(7), 2); > > + sunxi_gpio_set_pull(SUNXI_GPG(7), SUNXI_GPIO_PULL_UP); > > #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I_H3) > > sunxi_gpio_set_cfgpin(SUNXI_GPA(0), SUN8I_H3_GPA_UART2); > > sunxi_gpio_set_cfgpin(SUNXI_GPA(1), SUN8I_H3_GPA_UART2); > Best wishes, Maksim
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index 11a4941822..9dedcd45f5 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -159,6 +159,10 @@ static int gpio_init(void) sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1); sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG_UART1); sunxi_gpio_set_pull(SUNXI_GPG(4), SUNXI_GPIO_PULL_UP); +#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN8I_R528) + sunxi_gpio_set_cfgpin(SUNXI_GPG(6), 2); + sunxi_gpio_set_cfgpin(SUNXI_GPG(7), 2); + sunxi_gpio_set_pull(SUNXI_GPG(7), SUNXI_GPIO_PULL_UP); #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I_H3) sunxi_gpio_set_cfgpin(SUNXI_GPA(0), SUN8I_H3_GPA_UART2); sunxi_gpio_set_cfgpin(SUNXI_GPA(1), SUN8I_H3_GPA_UART2);
Add PG6-PG7 pins configuration for the SPL to allow use UART1 on boards with the Allwinner R528/T113 family. Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com> --- I tested this patch on LC-PI-T113 board. This board can be found on eBay or Aliexpress, and looks like that it is widespread enough to send this patch to the upstream :) arch/arm/mach-sunxi/board.c | 4 ++++ 1 file changed, 4 insertions(+)