diff mbox series

[v2,RESEND] pci: Enable dm_pci_map_bar() for 64-bit BARs

Message ID 20231217005209.2789651-1-moritzf@google.com
State Changes Requested
Delegated to: Tom Rini
Headers show
Series [v2,RESEND] pci: Enable dm_pci_map_bar() for 64-bit BARs | expand

Commit Message

Moritz Fischer Dec. 17, 2023, 12:52 a.m. UTC 
Allow dm_pci_map_bar() usage on systems with CONFIG_SYS_PCI_64BIT.

Reviewed-by: Philip Oberfichtner <pro@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Moritz Fischer <moritzf@google.com>
---
 drivers/pci/pci-uclass.c | 11 +++++++++++
 include/pci.h            |  4 ++--
 2 files changed, 13 insertions(+), 2 deletions(-)

Comments

Tom Rini Dec. 21, 2023, 5:53 p.m. UTC | #1 
On Sun, Dec 17, 2023 at 12:52:09AM +0000, Moritz Fischer wrote:

> Allow dm_pci_map_bar() usage on systems with CONFIG_SYS_PCI_64BIT.
> 
> Reviewed-by: Philip Oberfichtner <pro@denx.de>
> Reviewed-by: Simon Glass <sjg@chromium.org>
> Signed-off-by: Moritz Fischer <moritzf@google.com>

This causes a failure to build on qemu_arm and a number of other
platforms, thanks.
Moritz Fischer Dec. 21, 2023, 9:15 p.m. UTC | #2 
Tom,

On Thu, Dec 21, 2023 at 9:53 AM Tom Rini <trini@konsulko.com> wrote:
>
> On Sun, Dec 17, 2023 at 12:52:09AM +0000, Moritz Fischer wrote:
>
> > Allow dm_pci_map_bar() usage on systems with CONFIG_SYS_PCI_64BIT.
> >
> > Reviewed-by: Philip Oberfichtner <pro@denx.de>
> > Reviewed-by: Simon Glass <sjg@chromium.org>
> > Signed-off-by: Moritz Fischer <moritzf@google.com>
>
> This causes a failure to build on qemu_arm and a number of other
> platforms, thanks.

Argh, yes, I got got by the IS_ENABLED(). Switching it to #if
defined(CONFIG_SYS_PCI_64BIT) makes it work.

Sorry, let me resend this.

- Moritz
diff mbox series

Patch

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index e0d01f6a85..82308c7477 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -1611,6 +1611,17 @@  void *dm_pci_map_bar(struct udevice *dev, int bar, size_t offset, size_t len,
 	dm_pci_read_config32(udev, bar, &bar_response);
 	pci_bus_addr = (pci_addr_t)(bar_response & ~0xf);
 
+	/*
+	 * This assumes that dm_pciauto_setup_device() will allocate
+	 * a 64-bit address if CONFIG_SYS_PCI_64BIT is enabled and
+	 * the device advertises that it supports it.
+	 */
+	if (IS_ENABLED(CONFIG_SYS_PCI_64BIT) &&
+	    (bar_response & PCI_BASE_ADDRESS_MEM_TYPE_64)) {
+		dm_pci_read_config32(udev, bar + 4, &bar_response);
+		pci_bus_addr |= (pci_addr_t)bar_response << 32;
+	}
+
 	if (~((pci_addr_t)0) - pci_bus_addr < offset)
 		return NULL;
 
diff --git a/include/pci.h b/include/pci.h
index 2f5eb30b83..0d1ac7b015 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -1350,8 +1350,8 @@  pci_addr_t dm_pci_phys_to_bus(struct udevice *dev, phys_addr_t addr, size_t len,
  *
  * Looks up a base address register and finds the physical memory address
  * that corresponds to it.
- * Can be used for 32b BARs 0-5 on type 0 functions and for 32b BARs 0-1 on
- * type 1 functions.
+ * Can be used for 32b/64b BARs 0-5 on type 0 functions and for 32b BARs 0-1
+ * on type 1 functions.
  * Can also be used on type 0 functions that support Enhanced Allocation for
  * 32b/64b BARs.  Note that duplicate BEI entries are not supported.
  *