| Message ID | 20231130112405.92196-1-avkrasnov@salutedevices.com |
|---|---|
| State | Superseded |
| Delegated to: | Dario Binacchi |
| Headers | show |
| Series | [v1] mtd: rawnand: macronix: OTP access for MX30LFxG18AC | expand |
cc: Miquel Raynal On 30.11.2023 14:24, Arseniy Krasnov wrote: > Support for OTP area access on MX30LFxG18AC chip series. > > Signed-off-by: Arseniy Krasnov <avkrasnov@salutedevices.com> > --- > drivers/mtd/nand/raw/nand_macronix.c | 170 +++++++++++++++++++++++++++ > 1 file changed, 170 insertions(+) > > diff --git a/drivers/mtd/nand/raw/nand_macronix.c b/drivers/mtd/nand/raw/nand_macronix.c > index dc972e5909..4c6ddd9233 100644 > --- a/drivers/mtd/nand/raw/nand_macronix.c > +++ b/drivers/mtd/nand/raw/nand_macronix.c > @@ -16,13 +16,183 @@ > * GNU General Public License for more details. > */ > > +#include <dm/device_compat.h> > #include <linux/mtd/rawnand.h> > > +#define ONFI_FEATURE_ADDR_30LFXG18AC_OTP 0x90 > +#define MACRONIX_30LFXG18AC_OTP_START_PAGE 2 > +#define MACRONIX_30LFXG18AC_OTP_PAGES 30 > +#define MACRONIX_30LFXG18AC_OTP_PAGE_SIZE 2112 > +#define MACRONIX_30LFXG18AC_OTP_SIZE_BYTES \ > + (MACRONIX_30LFXG18AC_OTP_PAGES * \ > + MACRONIX_30LFXG18AC_OTP_PAGE_SIZE) > + > +#define MACRONIX_30LFXG18AC_OTP_EN BIT(0) > + > +static int macronix_30lfxg18ac_get_otp_info(struct mtd_info *mtd, size_t len, > + size_t *retlen, > + struct otp_info *buf) > +{ > + if (len < sizeof(*buf)) > + return -EINVAL; > + > + /* Always report that OTP is unlocked. Reason is that this > + * type of flash chip doesn't provide way to check that OTP > + * is locked or not: subfeature parameter is implemented as > + * volatile register. Technically OTP region could be locked > + * and become readonly, but as there is no way to check it, > + * don't allow to lock it ('_lock_user_prot_reg' callback > + * always returns -EOPNOTSUPP) and thus we report that OTP > + * is unlocked. > + */ > + buf->locked = 0; > + buf->start = 0; > + buf->length = MACRONIX_30LFXG18AC_OTP_SIZE_BYTES; > + > + *retlen = sizeof(*buf); > + > + return 0; > +} > + > +static int macronix_30lfxg18ac_otp_enable(struct nand_chip *nand) > +{ > + u8 feature_buf[ONFI_SUBFEATURE_PARAM_LEN] = { 0 }; > + struct mtd_info *mtd; > + > + mtd = nand_to_mtd(nand); > + feature_buf[0] = MACRONIX_30LFXG18AC_OTP_EN; > + > + return nand->onfi_set_features(mtd, nand, ONFI_FEATURE_ADDR_30LFXG18AC_OTP, feature_buf); > +} > + > +static int macronix_30lfxg18ac_otp_disable(struct nand_chip *nand) > +{ > + u8 feature_buf[ONFI_SUBFEATURE_PARAM_LEN] = { 0 }; > + struct mtd_info *mtd; > + > + mtd = nand_to_mtd(nand); > + return nand->onfi_set_features(mtd, nand, ONFI_FEATURE_ADDR_30LFXG18AC_OTP, feature_buf); > +} > + > +static int __macronix_30lfxg18ac_rw_otp(struct mtd_info *mtd, > + loff_t offs_in_flash, > + size_t len, size_t *retlen, > + u_char *buf, bool write) > +{ > + struct nand_chip *nand; > + size_t bytes_handled; > + off_t offs_in_page; > + u64 page; > + int ret; > + > + nand = mtd_to_nand(mtd); > + nand->select_chip(mtd, 0); > + > + ret = macronix_30lfxg18ac_otp_enable(nand); > + if (ret) > + goto out_otp; > + > + page = offs_in_flash; > + /* 'page' will be result of division. */ > + offs_in_page = do_div(page, MACRONIX_30LFXG18AC_OTP_PAGE_SIZE); > + bytes_handled = 0; > + > + while (bytes_handled < len && > + page < MACRONIX_30LFXG18AC_OTP_PAGES) { > + size_t bytes_to_handle; > + u64 phys_page = page + MACRONIX_30LFXG18AC_OTP_START_PAGE; > + > + bytes_to_handle = min_t(size_t, len - bytes_handled, > + MACRONIX_30LFXG18AC_OTP_PAGE_SIZE - > + offs_in_page); > + > + if (write) > + ret = nand_prog_page_op(nand, phys_page, offs_in_page, > + &buf[bytes_handled], bytes_to_handle); > + else > + ret = nand_read_page_op(nand, phys_page, offs_in_page, > + &buf[bytes_handled], bytes_to_handle); > + if (ret) > + goto out_otp; > + > + bytes_handled += bytes_to_handle; > + offs_in_page = 0; > + page++; > + } > + > + *retlen = bytes_handled; > + > +out_otp: > + if (ret) > + dev_err(mtd->dev, "failed to perform OTP IO: %i\n", ret); > + > + ret = macronix_30lfxg18ac_otp_disable(nand); > + if (ret) > + dev_err(mtd->dev, "failed to leave OTP mode after %s\n", > + write ? "write" : "read"); > + > + nand->select_chip(mtd, -1); > + > + return ret; > +} > + > +static int macronix_30lfxg18ac_write_otp(struct mtd_info *mtd, loff_t to, > + size_t len, size_t *rlen, > + u_char *buf) > +{ > + return __macronix_30lfxg18ac_rw_otp(mtd, to, len, rlen, (u_char *)buf, > + true); > +} > + > +static int macronix_30lfxg18ac_read_otp(struct mtd_info *mtd, loff_t from, > + size_t len, size_t *rlen, > + u_char *buf) > +{ > + return __macronix_30lfxg18ac_rw_otp(mtd, from, len, rlen, buf, false); > +} > + > +static int macronix_30lfxg18ac_lock_otp(struct mtd_info *mtd, loff_t from, > + size_t len) > +{ > + /* See comment in 'macronix_30lfxg18ac_get_otp_info()'. */ > + return -EOPNOTSUPP; > +} > + > +static void macronix_nand_setup_otp(struct nand_chip *chip) > +{ > + static const char * const supported_otp_models[] = { > + "MX30LF1G18AC", > + "MX30LF2G18AC", > + "MX30LF4G18AC", > + }; > + int i; > + > + if (!chip->onfi_version || > + !(le16_to_cpu(chip->onfi_params.opt_cmd) > + & ONFI_OPT_CMD_SET_GET_FEATURES)) > + return; > + > + for (i = 0; i < ARRAY_SIZE(supported_otp_models); i++) { > + if (!strcmp(chip->onfi_params.model, supported_otp_models[i])) { > + struct mtd_info *mtd; > + > + mtd = nand_to_mtd(chip); > + mtd->_get_user_prot_info = macronix_30lfxg18ac_get_otp_info; > + mtd->_read_user_prot_reg = macronix_30lfxg18ac_read_otp; > + mtd->_write_user_prot_reg = macronix_30lfxg18ac_write_otp; > + mtd->_lock_user_prot_reg = macronix_30lfxg18ac_lock_otp; > + return; > + } > + } > +} > + > static int macronix_nand_init(struct nand_chip *chip) > { > if (nand_is_slc(chip)) > chip->bbt_options |= NAND_BBT_SCAN2NDPAGE; > > + macronix_nand_setup_otp(chip); > + > return 0; > } >
cc: Jaime Liao On 04.12.2023 22:23, Arseniy Krasnov wrote: > cc: Miquel Raynal > > On 30.11.2023 14:24, Arseniy Krasnov wrote: >> Support for OTP area access on MX30LFxG18AC chip series. >> >> Signed-off-by: Arseniy Krasnov <avkrasnov@salutedevices.com> >> --- >> drivers/mtd/nand/raw/nand_macronix.c | 170 +++++++++++++++++++++++++++ >> 1 file changed, 170 insertions(+) >> >> diff --git a/drivers/mtd/nand/raw/nand_macronix.c b/drivers/mtd/nand/raw/nand_macronix.c >> index dc972e5909..4c6ddd9233 100644 >> --- a/drivers/mtd/nand/raw/nand_macronix.c >> +++ b/drivers/mtd/nand/raw/nand_macronix.c >> @@ -16,13 +16,183 @@ >> * GNU General Public License for more details. >> */ >> >> +#include <dm/device_compat.h> >> #include <linux/mtd/rawnand.h> >> >> +#define ONFI_FEATURE_ADDR_30LFXG18AC_OTP 0x90 >> +#define MACRONIX_30LFXG18AC_OTP_START_PAGE 2 >> +#define MACRONIX_30LFXG18AC_OTP_PAGES 30 >> +#define MACRONIX_30LFXG18AC_OTP_PAGE_SIZE 2112 >> +#define MACRONIX_30LFXG18AC_OTP_SIZE_BYTES \ >> + (MACRONIX_30LFXG18AC_OTP_PAGES * \ >> + MACRONIX_30LFXG18AC_OTP_PAGE_SIZE) >> + >> +#define MACRONIX_30LFXG18AC_OTP_EN BIT(0) >> + >> +static int macronix_30lfxg18ac_get_otp_info(struct mtd_info *mtd, size_t len, >> + size_t *retlen, >> + struct otp_info *buf) >> +{ >> + if (len < sizeof(*buf)) >> + return -EINVAL; >> + >> + /* Always report that OTP is unlocked. Reason is that this >> + * type of flash chip doesn't provide way to check that OTP >> + * is locked or not: subfeature parameter is implemented as >> + * volatile register. Technically OTP region could be locked >> + * and become readonly, but as there is no way to check it, >> + * don't allow to lock it ('_lock_user_prot_reg' callback >> + * always returns -EOPNOTSUPP) and thus we report that OTP >> + * is unlocked. >> + */ >> + buf->locked = 0; >> + buf->start = 0; >> + buf->length = MACRONIX_30LFXG18AC_OTP_SIZE_BYTES; >> + >> + *retlen = sizeof(*buf); >> + >> + return 0; >> +} >> + >> +static int macronix_30lfxg18ac_otp_enable(struct nand_chip *nand) >> +{ >> + u8 feature_buf[ONFI_SUBFEATURE_PARAM_LEN] = { 0 }; >> + struct mtd_info *mtd; >> + >> + mtd = nand_to_mtd(nand); >> + feature_buf[0] = MACRONIX_30LFXG18AC_OTP_EN; >> + >> + return nand->onfi_set_features(mtd, nand, ONFI_FEATURE_ADDR_30LFXG18AC_OTP, feature_buf); >> +} >> + >> +static int macronix_30lfxg18ac_otp_disable(struct nand_chip *nand) >> +{ >> + u8 feature_buf[ONFI_SUBFEATURE_PARAM_LEN] = { 0 }; >> + struct mtd_info *mtd; >> + >> + mtd = nand_to_mtd(nand); >> + return nand->onfi_set_features(mtd, nand, ONFI_FEATURE_ADDR_30LFXG18AC_OTP, feature_buf); >> +} >> + >> +static int __macronix_30lfxg18ac_rw_otp(struct mtd_info *mtd, >> + loff_t offs_in_flash, >> + size_t len, size_t *retlen, >> + u_char *buf, bool write) >> +{ >> + struct nand_chip *nand; >> + size_t bytes_handled; >> + off_t offs_in_page; >> + u64 page; >> + int ret; >> + >> + nand = mtd_to_nand(mtd); >> + nand->select_chip(mtd, 0); >> + >> + ret = macronix_30lfxg18ac_otp_enable(nand); >> + if (ret) >> + goto out_otp; >> + >> + page = offs_in_flash; >> + /* 'page' will be result of division. */ >> + offs_in_page = do_div(page, MACRONIX_30LFXG18AC_OTP_PAGE_SIZE); >> + bytes_handled = 0; >> + >> + while (bytes_handled < len && >> + page < MACRONIX_30LFXG18AC_OTP_PAGES) { >> + size_t bytes_to_handle; >> + u64 phys_page = page + MACRONIX_30LFXG18AC_OTP_START_PAGE; >> + >> + bytes_to_handle = min_t(size_t, len - bytes_handled, >> + MACRONIX_30LFXG18AC_OTP_PAGE_SIZE - >> + offs_in_page); >> + >> + if (write) >> + ret = nand_prog_page_op(nand, phys_page, offs_in_page, >> + &buf[bytes_handled], bytes_to_handle); >> + else >> + ret = nand_read_page_op(nand, phys_page, offs_in_page, >> + &buf[bytes_handled], bytes_to_handle); >> + if (ret) >> + goto out_otp; >> + >> + bytes_handled += bytes_to_handle; >> + offs_in_page = 0; >> + page++; >> + } >> + >> + *retlen = bytes_handled; >> + >> +out_otp: >> + if (ret) >> + dev_err(mtd->dev, "failed to perform OTP IO: %i\n", ret); >> + >> + ret = macronix_30lfxg18ac_otp_disable(nand); >> + if (ret) >> + dev_err(mtd->dev, "failed to leave OTP mode after %s\n", >> + write ? "write" : "read"); >> + >> + nand->select_chip(mtd, -1); >> + >> + return ret; >> +} >> + >> +static int macronix_30lfxg18ac_write_otp(struct mtd_info *mtd, loff_t to, >> + size_t len, size_t *rlen, >> + u_char *buf) >> +{ >> + return __macronix_30lfxg18ac_rw_otp(mtd, to, len, rlen, (u_char *)buf, >> + true); >> +} >> + >> +static int macronix_30lfxg18ac_read_otp(struct mtd_info *mtd, loff_t from, >> + size_t len, size_t *rlen, >> + u_char *buf) >> +{ >> + return __macronix_30lfxg18ac_rw_otp(mtd, from, len, rlen, buf, false); >> +} >> + >> +static int macronix_30lfxg18ac_lock_otp(struct mtd_info *mtd, loff_t from, >> + size_t len) >> +{ >> + /* See comment in 'macronix_30lfxg18ac_get_otp_info()'. */ >> + return -EOPNOTSUPP; >> +} >> + >> +static void macronix_nand_setup_otp(struct nand_chip *chip) >> +{ >> + static const char * const supported_otp_models[] = { >> + "MX30LF1G18AC", >> + "MX30LF2G18AC", >> + "MX30LF4G18AC", >> + }; >> + int i; >> + >> + if (!chip->onfi_version || >> + !(le16_to_cpu(chip->onfi_params.opt_cmd) >> + & ONFI_OPT_CMD_SET_GET_FEATURES)) >> + return; >> + >> + for (i = 0; i < ARRAY_SIZE(supported_otp_models); i++) { >> + if (!strcmp(chip->onfi_params.model, supported_otp_models[i])) { >> + struct mtd_info *mtd; >> + >> + mtd = nand_to_mtd(chip); >> + mtd->_get_user_prot_info = macronix_30lfxg18ac_get_otp_info; >> + mtd->_read_user_prot_reg = macronix_30lfxg18ac_read_otp; >> + mtd->_write_user_prot_reg = macronix_30lfxg18ac_write_otp; >> + mtd->_lock_user_prot_reg = macronix_30lfxg18ac_lock_otp; >> + return; >> + } >> + } >> +} >> + >> static int macronix_nand_init(struct nand_chip *chip) >> { >> if (nand_is_slc(chip)) >> chip->bbt_options |= NAND_BBT_SCAN2NDPAGE; >> >> + macronix_nand_setup_otp(chip); >> + >> return 0; >> } >>
Sorry, pls ping Thanks, Arseniy On 18.12.2023 14:54, Arseniy Krasnov wrote: > cc: Jaime Liao > > On 04.12.2023 22:23, Arseniy Krasnov wrote: >> cc: Miquel Raynal >> >> On 30.11.2023 14:24, Arseniy Krasnov wrote: >>> Support for OTP area access on MX30LFxG18AC chip series. >>> >>> Signed-off-by: Arseniy Krasnov <avkrasnov@salutedevices.com> >>> --- >>> drivers/mtd/nand/raw/nand_macronix.c | 170 +++++++++++++++++++++++++++ >>> 1 file changed, 170 insertions(+) >>> >>> diff --git a/drivers/mtd/nand/raw/nand_macronix.c b/drivers/mtd/nand/raw/nand_macronix.c >>> index dc972e5909..4c6ddd9233 100644 >>> --- a/drivers/mtd/nand/raw/nand_macronix.c >>> +++ b/drivers/mtd/nand/raw/nand_macronix.c >>> @@ -16,13 +16,183 @@ >>> * GNU General Public License for more details. >>> */ >>> >>> +#include <dm/device_compat.h> >>> #include <linux/mtd/rawnand.h> >>> >>> +#define ONFI_FEATURE_ADDR_30LFXG18AC_OTP 0x90 >>> +#define MACRONIX_30LFXG18AC_OTP_START_PAGE 2 >>> +#define MACRONIX_30LFXG18AC_OTP_PAGES 30 >>> +#define MACRONIX_30LFXG18AC_OTP_PAGE_SIZE 2112 >>> +#define MACRONIX_30LFXG18AC_OTP_SIZE_BYTES \ >>> + (MACRONIX_30LFXG18AC_OTP_PAGES * \ >>> + MACRONIX_30LFXG18AC_OTP_PAGE_SIZE) >>> + >>> +#define MACRONIX_30LFXG18AC_OTP_EN BIT(0) >>> + >>> +static int macronix_30lfxg18ac_get_otp_info(struct mtd_info *mtd, size_t len, >>> + size_t *retlen, >>> + struct otp_info *buf) >>> +{ >>> + if (len < sizeof(*buf)) >>> + return -EINVAL; >>> + >>> + /* Always report that OTP is unlocked. Reason is that this >>> + * type of flash chip doesn't provide way to check that OTP >>> + * is locked or not: subfeature parameter is implemented as >>> + * volatile register. Technically OTP region could be locked >>> + * and become readonly, but as there is no way to check it, >>> + * don't allow to lock it ('_lock_user_prot_reg' callback >>> + * always returns -EOPNOTSUPP) and thus we report that OTP >>> + * is unlocked. >>> + */ >>> + buf->locked = 0; >>> + buf->start = 0; >>> + buf->length = MACRONIX_30LFXG18AC_OTP_SIZE_BYTES; >>> + >>> + *retlen = sizeof(*buf); >>> + >>> + return 0; >>> +} >>> + >>> +static int macronix_30lfxg18ac_otp_enable(struct nand_chip *nand) >>> +{ >>> + u8 feature_buf[ONFI_SUBFEATURE_PARAM_LEN] = { 0 }; >>> + struct mtd_info *mtd; >>> + >>> + mtd = nand_to_mtd(nand); >>> + feature_buf[0] = MACRONIX_30LFXG18AC_OTP_EN; >>> + >>> + return nand->onfi_set_features(mtd, nand, ONFI_FEATURE_ADDR_30LFXG18AC_OTP, feature_buf); >>> +} >>> + >>> +static int macronix_30lfxg18ac_otp_disable(struct nand_chip *nand) >>> +{ >>> + u8 feature_buf[ONFI_SUBFEATURE_PARAM_LEN] = { 0 }; >>> + struct mtd_info *mtd; >>> + >>> + mtd = nand_to_mtd(nand); >>> + return nand->onfi_set_features(mtd, nand, ONFI_FEATURE_ADDR_30LFXG18AC_OTP, feature_buf); >>> +} >>> + >>> +static int __macronix_30lfxg18ac_rw_otp(struct mtd_info *mtd, >>> + loff_t offs_in_flash, >>> + size_t len, size_t *retlen, >>> + u_char *buf, bool write) >>> +{ >>> + struct nand_chip *nand; >>> + size_t bytes_handled; >>> + off_t offs_in_page; >>> + u64 page; >>> + int ret; >>> + >>> + nand = mtd_to_nand(mtd); >>> + nand->select_chip(mtd, 0); >>> + >>> + ret = macronix_30lfxg18ac_otp_enable(nand); >>> + if (ret) >>> + goto out_otp; >>> + >>> + page = offs_in_flash; >>> + /* 'page' will be result of division. */ >>> + offs_in_page = do_div(page, MACRONIX_30LFXG18AC_OTP_PAGE_SIZE); >>> + bytes_handled = 0; >>> + >>> + while (bytes_handled < len && >>> + page < MACRONIX_30LFXG18AC_OTP_PAGES) { >>> + size_t bytes_to_handle; >>> + u64 phys_page = page + MACRONIX_30LFXG18AC_OTP_START_PAGE; >>> + >>> + bytes_to_handle = min_t(size_t, len - bytes_handled, >>> + MACRONIX_30LFXG18AC_OTP_PAGE_SIZE - >>> + offs_in_page); >>> + >>> + if (write) >>> + ret = nand_prog_page_op(nand, phys_page, offs_in_page, >>> + &buf[bytes_handled], bytes_to_handle); >>> + else >>> + ret = nand_read_page_op(nand, phys_page, offs_in_page, >>> + &buf[bytes_handled], bytes_to_handle); >>> + if (ret) >>> + goto out_otp; >>> + >>> + bytes_handled += bytes_to_handle; >>> + offs_in_page = 0; >>> + page++; >>> + } >>> + >>> + *retlen = bytes_handled; >>> + >>> +out_otp: >>> + if (ret) >>> + dev_err(mtd->dev, "failed to perform OTP IO: %i\n", ret); >>> + >>> + ret = macronix_30lfxg18ac_otp_disable(nand); >>> + if (ret) >>> + dev_err(mtd->dev, "failed to leave OTP mode after %s\n", >>> + write ? "write" : "read"); >>> + >>> + nand->select_chip(mtd, -1); >>> + >>> + return ret; >>> +} >>> + >>> +static int macronix_30lfxg18ac_write_otp(struct mtd_info *mtd, loff_t to, >>> + size_t len, size_t *rlen, >>> + u_char *buf) >>> +{ >>> + return __macronix_30lfxg18ac_rw_otp(mtd, to, len, rlen, (u_char *)buf, >>> + true); >>> +} >>> + >>> +static int macronix_30lfxg18ac_read_otp(struct mtd_info *mtd, loff_t from, >>> + size_t len, size_t *rlen, >>> + u_char *buf) >>> +{ >>> + return __macronix_30lfxg18ac_rw_otp(mtd, from, len, rlen, buf, false); >>> +} >>> + >>> +static int macronix_30lfxg18ac_lock_otp(struct mtd_info *mtd, loff_t from, >>> + size_t len) >>> +{ >>> + /* See comment in 'macronix_30lfxg18ac_get_otp_info()'. */ >>> + return -EOPNOTSUPP; >>> +} >>> + >>> +static void macronix_nand_setup_otp(struct nand_chip *chip) >>> +{ >>> + static const char * const supported_otp_models[] = { >>> + "MX30LF1G18AC", >>> + "MX30LF2G18AC", >>> + "MX30LF4G18AC", >>> + }; >>> + int i; >>> + >>> + if (!chip->onfi_version || >>> + !(le16_to_cpu(chip->onfi_params.opt_cmd) >>> + & ONFI_OPT_CMD_SET_GET_FEATURES)) >>> + return; >>> + >>> + for (i = 0; i < ARRAY_SIZE(supported_otp_models); i++) { >>> + if (!strcmp(chip->onfi_params.model, supported_otp_models[i])) { >>> + struct mtd_info *mtd; >>> + >>> + mtd = nand_to_mtd(chip); >>> + mtd->_get_user_prot_info = macronix_30lfxg18ac_get_otp_info; >>> + mtd->_read_user_prot_reg = macronix_30lfxg18ac_read_otp; >>> + mtd->_write_user_prot_reg = macronix_30lfxg18ac_write_otp; >>> + mtd->_lock_user_prot_reg = macronix_30lfxg18ac_lock_otp; >>> + return; >>> + } >>> + } >>> +} >>> + >>> static int macronix_nand_init(struct nand_chip *chip) >>> { >>> if (nand_is_slc(chip)) >>> chip->bbt_options |= NAND_BBT_SCAN2NDPAGE; >>> >>> + macronix_nand_setup_otp(chip); >>> + >>> return 0; >>> } >>>
Sorry, pls ping Thanks, Arseniy On 08.01.2024 21:33, Arseniy Krasnov wrote: > Sorry, pls ping > > Thanks, Arseniy
Sorry, please ping Thanks, Arseniy On 11.02.2024 02:16, Arseniy Krasnov wrote: > Sorry, pls ping > > Thanks, Arseniy > > On 08.01.2024 21:33, Arseniy Krasnov wrote: >> Sorry, pls ping >> >> Thanks, Arseniy
Hi Dario Can apply this series and put in CI? Michael On Wed, Mar 13, 2024 at 7:43 AM Arseniy Krasnov <avkrasnov@salutedevices.com> wrote: > > Sorry, please ping > > Thanks, Arseniy > > On 11.02.2024 02:16, Arseniy Krasnov wrote: > > Sorry, pls ping > > > > Thanks, Arseniy > > > > On 08.01.2024 21:33, Arseniy Krasnov wrote: > >> Sorry, pls ping > >> > >> Thanks, Arseniy
Hello, Sorry, pls ping Thanks, Arseniy On 13.03.2024 09:46, Michael Nazzareno Trimarchi wrote: > Hi Dario > > Can apply this series and put in CI? > > Michael > > On Wed, Mar 13, 2024 at 7:43 AM Arseniy Krasnov > <avkrasnov@salutedevices.com> wrote: >> >> Sorry, please ping >> >> Thanks, Arseniy >> >> On 11.02.2024 02:16, Arseniy Krasnov wrote: >>> Sorry, pls ping >>> >>> Thanks, Arseniy >>> >>> On 08.01.2024 21:33, Arseniy Krasnov wrote: >>>> Sorry, pls ping >>>> >>>> Thanks, Arseniy > > >
Hi Dario did you add those patches in CI and test them again? Michael On Wed, Apr 17, 2024 at 8:44 PM Arseniy Krasnov <avkrasnov@salutedevices.com> wrote: > > Hello, > > Sorry, pls ping > > Thanks, Arseniy > > On 13.03.2024 09:46, Michael Nazzareno Trimarchi wrote: > > Hi Dario > > > > Can apply this series and put in CI? > > > > Michael > > > > On Wed, Mar 13, 2024 at 7:43 AM Arseniy Krasnov > > <avkrasnov@salutedevices.com> wrote: > >> > >> Sorry, please ping > >> > >> Thanks, Arseniy > >> > >> On 11.02.2024 02:16, Arseniy Krasnov wrote: > >>> Sorry, pls ping > >>> > >>> Thanks, Arseniy > >>> > >>> On 08.01.2024 21:33, Arseniy Krasnov wrote: > >>>> Sorry, pls ping > >>>> > >>>> Thanks, Arseniy > > > > > >
Arseniy, Michael, All On Wed, Apr 17, 2024 at 8:44 PM Michael Nazzareno Trimarchi <michael@amarulasolutions.com> wrote: > > Hi > > Dario did you add those patches in CI and test them again? > > Michael > > On Wed, Apr 17, 2024 at 8:44 PM Arseniy Krasnov > <avkrasnov@salutedevices.com> wrote: > > > > Hello, > > > > Sorry, pls ping > > > > Thanks, Arseniy > > > > On 13.03.2024 09:46, Michael Nazzareno Trimarchi wrote: > > > Hi Dario > > > > > > Can apply this series and put in CI? Sorry, but I mistakenly tagged it as 'superseded'. I just pushed it to my nand-next branch and I'm running the CI now. Thanks and regards, Dario > > > > > > Michael > > > > > > On Wed, Mar 13, 2024 at 7:43 AM Arseniy Krasnov > > > <avkrasnov@salutedevices.com> wrote: > > >> > > >> Sorry, please ping > > >> > > >> Thanks, Arseniy > > >> > > >> On 11.02.2024 02:16, Arseniy Krasnov wrote: > > >>> Sorry, pls ping > > >>> > > >>> Thanks, Arseniy > > >>> > > >>> On 08.01.2024 21:33, Arseniy Krasnov wrote: > > >>>> Sorry, pls ping > > >>>> > > >>>> Thanks, Arseniy > > > > > > > > > > > > > -- > Michael Nazzareno Trimarchi > Co-Founder & Chief Executive Officer > M. +39 347 913 2170 > michael@amarulasolutions.com > __________________________________ > > Amarula Solutions BV > Joop Geesinkweg 125, 1114 AB, Amsterdam, NL > T. +31 (0)85 111 9172 > info@amarulasolutions.com > www.amarulasolutions.com
diff --git a/drivers/mtd/nand/raw/nand_macronix.c b/drivers/mtd/nand/raw/nand_macronix.c index dc972e5909..4c6ddd9233 100644 --- a/drivers/mtd/nand/raw/nand_macronix.c +++ b/drivers/mtd/nand/raw/nand_macronix.c @@ -16,13 +16,183 @@ * GNU General Public License for more details. */ +#include <dm/device_compat.h> #include <linux/mtd/rawnand.h> +#define ONFI_FEATURE_ADDR_30LFXG18AC_OTP 0x90 +#define MACRONIX_30LFXG18AC_OTP_START_PAGE 2 +#define MACRONIX_30LFXG18AC_OTP_PAGES 30 +#define MACRONIX_30LFXG18AC_OTP_PAGE_SIZE 2112 +#define MACRONIX_30LFXG18AC_OTP_SIZE_BYTES \ + (MACRONIX_30LFXG18AC_OTP_PAGES * \ + MACRONIX_30LFXG18AC_OTP_PAGE_SIZE) + +#define MACRONIX_30LFXG18AC_OTP_EN BIT(0) + +static int macronix_30lfxg18ac_get_otp_info(struct mtd_info *mtd, size_t len, + size_t *retlen, + struct otp_info *buf) +{ + if (len < sizeof(*buf)) + return -EINVAL; + + /* Always report that OTP is unlocked. Reason is that this + * type of flash chip doesn't provide way to check that OTP + * is locked or not: subfeature parameter is implemented as + * volatile register. Technically OTP region could be locked + * and become readonly, but as there is no way to check it, + * don't allow to lock it ('_lock_user_prot_reg' callback + * always returns -EOPNOTSUPP) and thus we report that OTP + * is unlocked. + */ + buf->locked = 0; + buf->start = 0; + buf->length = MACRONIX_30LFXG18AC_OTP_SIZE_BYTES; + + *retlen = sizeof(*buf); + + return 0; +} + +static int macronix_30lfxg18ac_otp_enable(struct nand_chip *nand) +{ + u8 feature_buf[ONFI_SUBFEATURE_PARAM_LEN] = { 0 }; + struct mtd_info *mtd; + + mtd = nand_to_mtd(nand); + feature_buf[0] = MACRONIX_30LFXG18AC_OTP_EN; + + return nand->onfi_set_features(mtd, nand, ONFI_FEATURE_ADDR_30LFXG18AC_OTP, feature_buf); +} + +static int macronix_30lfxg18ac_otp_disable(struct nand_chip *nand) +{ + u8 feature_buf[ONFI_SUBFEATURE_PARAM_LEN] = { 0 }; + struct mtd_info *mtd; + + mtd = nand_to_mtd(nand); + return nand->onfi_set_features(mtd, nand, ONFI_FEATURE_ADDR_30LFXG18AC_OTP, feature_buf); +} + +static int __macronix_30lfxg18ac_rw_otp(struct mtd_info *mtd, + loff_t offs_in_flash, + size_t len, size_t *retlen, + u_char *buf, bool write) +{ + struct nand_chip *nand; + size_t bytes_handled; + off_t offs_in_page; + u64 page; + int ret; + + nand = mtd_to_nand(mtd); + nand->select_chip(mtd, 0); + + ret = macronix_30lfxg18ac_otp_enable(nand); + if (ret) + goto out_otp; + + page = offs_in_flash; + /* 'page' will be result of division. */ + offs_in_page = do_div(page, MACRONIX_30LFXG18AC_OTP_PAGE_SIZE); + bytes_handled = 0; + + while (bytes_handled < len && + page < MACRONIX_30LFXG18AC_OTP_PAGES) { + size_t bytes_to_handle; + u64 phys_page = page + MACRONIX_30LFXG18AC_OTP_START_PAGE; + + bytes_to_handle = min_t(size_t, len - bytes_handled, + MACRONIX_30LFXG18AC_OTP_PAGE_SIZE - + offs_in_page); + + if (write) + ret = nand_prog_page_op(nand, phys_page, offs_in_page, + &buf[bytes_handled], bytes_to_handle); + else + ret = nand_read_page_op(nand, phys_page, offs_in_page, + &buf[bytes_handled], bytes_to_handle); + if (ret) + goto out_otp; + + bytes_handled += bytes_to_handle; + offs_in_page = 0; + page++; + } + + *retlen = bytes_handled; + +out_otp: + if (ret) + dev_err(mtd->dev, "failed to perform OTP IO: %i\n", ret); + + ret = macronix_30lfxg18ac_otp_disable(nand); + if (ret) + dev_err(mtd->dev, "failed to leave OTP mode after %s\n", + write ? "write" : "read"); + + nand->select_chip(mtd, -1); + + return ret; +} + +static int macronix_30lfxg18ac_write_otp(struct mtd_info *mtd, loff_t to, + size_t len, size_t *rlen, + u_char *buf) +{ + return __macronix_30lfxg18ac_rw_otp(mtd, to, len, rlen, (u_char *)buf, + true); +} + +static int macronix_30lfxg18ac_read_otp(struct mtd_info *mtd, loff_t from, + size_t len, size_t *rlen, + u_char *buf) +{ + return __macronix_30lfxg18ac_rw_otp(mtd, from, len, rlen, buf, false); +} + +static int macronix_30lfxg18ac_lock_otp(struct mtd_info *mtd, loff_t from, + size_t len) +{ + /* See comment in 'macronix_30lfxg18ac_get_otp_info()'. */ + return -EOPNOTSUPP; +} + +static void macronix_nand_setup_otp(struct nand_chip *chip) +{ + static const char * const supported_otp_models[] = { + "MX30LF1G18AC", + "MX30LF2G18AC", + "MX30LF4G18AC", + }; + int i; + + if (!chip->onfi_version || + !(le16_to_cpu(chip->onfi_params.opt_cmd) + & ONFI_OPT_CMD_SET_GET_FEATURES)) + return; + + for (i = 0; i < ARRAY_SIZE(supported_otp_models); i++) { + if (!strcmp(chip->onfi_params.model, supported_otp_models[i])) { + struct mtd_info *mtd; + + mtd = nand_to_mtd(chip); + mtd->_get_user_prot_info = macronix_30lfxg18ac_get_otp_info; + mtd->_read_user_prot_reg = macronix_30lfxg18ac_read_otp; + mtd->_write_user_prot_reg = macronix_30lfxg18ac_write_otp; + mtd->_lock_user_prot_reg = macronix_30lfxg18ac_lock_otp; + return; + } + } +} + static int macronix_nand_init(struct nand_chip *chip) { if (nand_is_slc(chip)) chip->bbt_options |= NAND_BBT_SCAN2NDPAGE; + macronix_nand_setup_otp(chip); + return 0; }
Support for OTP area access on MX30LFxG18AC chip series. Signed-off-by: Arseniy Krasnov <avkrasnov@salutedevices.com> --- drivers/mtd/nand/raw/nand_macronix.c | 170 +++++++++++++++++++++++++++ 1 file changed, 170 insertions(+)