Message ID | 20231002011553.463514-28-sjg@chromium.org |
---|---|
State | Superseded |
Delegated to: | Bin Meng |
Headers | show
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[73.14.173.85]) by smtp.gmail.com with ESMTPSA id l26-20020a02a89a000000b0041d859c5721sm6819619jam.64.2023.10.01.18.16.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Oct 2023 18:16:29 -0700 (PDT) From: Simon Glass <sjg@chromium.org> To: U-Boot Mailing List <u-boot@lists.denx.de> Cc: Simon Glass <sjg@chromium.org>, Bin Meng <bmeng.cn@gmail.com>, Tom Rini <trini@konsulko.com>, Anatolij Gustschin <agust@denx.de> Subject: [PATCH 27/34] x86: coreboot: Enable unit tests Date: Sun, 1 Oct 2023 19:15:37 -0600 Message-ID: <20231002011553.463514-28-sjg@chromium.org> X-Mailer: git-send-email 2.42.0.582.g8ccd20d70d-goog In-Reply-To: <20231002011553.463514-1-sjg@chromium.org> References: <20231002011553.463514-1-sjg@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion <u-boot.lists.denx.de> List-Unsubscribe: <https://lists.denx.de/options/u-boot>, <mailto:u-boot-request@lists.denx.de?subject=unsubscribe> List-Archive: <https://lists.denx.de/pipermail/u-boot/> List-Post: <mailto:u-boot@lists.denx.de> List-Help: <mailto:u-boot-request@lists.denx.de?subject=help> List-Subscribe: <https://lists.denx.de/listinfo/u-boot>, <mailto:u-boot-request@lists.denx.de?subject=subscribe> Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" <u-boot-bounces@lists.denx.de> X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean |
Series |
x86: expo: Add support for editing coreboot CMOS RAM settings
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diff --git a/configs/coreboot_defconfig b/configs/coreboot_defconfig index 7d744e9962ae..5433a5ae0c2d 100644 --- a/configs/coreboot_defconfig +++ b/configs/coreboot_defconfig @@ -1,6 +1,7 @@ CONFIG_X86=y CONFIG_TEXT_BASE=0x1110000 CONFIG_SYS_MALLOC_LEN=0x2000000 +CONFIG_SYS_MALLOC_F_LEN=0x1000 CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="coreboot" @@ -16,6 +17,8 @@ CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" CONFIG_BOOTCOMMAND="bootflow scan -l; if bootflow menu; then cls; bootflow boot; fi" +CONFIG_CONSOLE_RECORD=y +CONFIG_CONSOLE_RECORD_OUT_SIZE=0x1000 CONFIG_PRE_CONSOLE_BUFFER=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_LOG=y @@ -60,3 +63,4 @@ CONFIG_CONSOLE_SCROLL_LINES=5 CONFIG_CMD_DHRYSTONE=y # CONFIG_GZIP is not set CONFIG_SMBIOS_PARSER=y +CONFIG_UNIT_TEST=y
Enable unit tests so we can run command-line tests in coreboot. Enable console recording, with enough space for the 'cbsysinfo' command. Add to the pre-relocation malloc() space to make room for this. Signed-off-by: Simon Glass <sjg@chromium.org> --- configs/coreboot_defconfig | 4 ++++ 1 file changed, 4 insertions(+)