| Message ID | 20230110113124.1434-4-ashok.reddy.soma@amd.com |
|---|---|
| State | Accepted |
| Commit | 386f5d367329a202abe71fd790e8ce4598b30e09 |
| Delegated to: | Jaehoon Chung |
| Headers | show |
| Series | Add eMMC 5.1 support for Versal NET | expand |
On 1/10/23 20:31, Ashok Reddy Soma wrote: > HS400 is indicated in bit63 of capability register in few IP's. > Add a quirk to check this and add HS400 to host capabilities. > > Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Best Regards, Jaehoon Chung > --- > drivers/mmc/sdhci.c | 4 ++++ > include/sdhci.h | 3 +++ > 2 files changed, 7 insertions(+) > > diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c > index 181ab9b7cb..c6b250b9a1 100644 > --- a/drivers/mmc/sdhci.c > +++ b/drivers/mmc/sdhci.c > @@ -995,6 +995,10 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, > cfg->host_caps |= MMC_CAP(UHS_SDR50); > } > > + if ((host->quirks & SDHCI_QUIRK_CAPS_BIT63_FOR_HS400) && > + (caps_1 & SDHCI_SUPPORT_HS400)) > + cfg->host_caps |= MMC_CAP(MMC_HS_400); > + > if (caps_1 & SDHCI_SUPPORT_DDR50) > cfg->host_caps |= MMC_CAP(UHS_DDR50); > > diff --git a/include/sdhci.h b/include/sdhci.h > index 64a3d309da..70fefca2a9 100644 > --- a/include/sdhci.h > +++ b/include/sdhci.h > @@ -189,6 +189,7 @@ > #define SDHCI_SUPPORT_SDR50 0x00000001 > #define SDHCI_SUPPORT_SDR104 0x00000002 > #define SDHCI_SUPPORT_DDR50 0x00000004 > +#define SDHCI_SUPPORT_HS400 BIT(31) > #define SDHCI_USE_SDR50_TUNING 0x00002000 > > #define SDHCI_CLOCK_MUL_MASK 0x00FF0000 > @@ -248,6 +249,8 @@ > #define SDHCI_QUIRK_USE_WIDE8 (1 << 8) > #define SDHCI_QUIRK_NO_1_8_V (1 << 9) > #define SDHCI_QUIRK_SUPPORT_SINGLE (1 << 10) > +/* Capability register bit-63 indicates HS400 support */ > +#define SDHCI_QUIRK_CAPS_BIT63_FOR_HS400 BIT(11) > > /* to make gcc happy */ > struct sdhci_host;
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 181ab9b7cb..c6b250b9a1 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -995,6 +995,10 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, cfg->host_caps |= MMC_CAP(UHS_SDR50); } + if ((host->quirks & SDHCI_QUIRK_CAPS_BIT63_FOR_HS400) && + (caps_1 & SDHCI_SUPPORT_HS400)) + cfg->host_caps |= MMC_CAP(MMC_HS_400); + if (caps_1 & SDHCI_SUPPORT_DDR50) cfg->host_caps |= MMC_CAP(UHS_DDR50); diff --git a/include/sdhci.h b/include/sdhci.h index 64a3d309da..70fefca2a9 100644 --- a/include/sdhci.h +++ b/include/sdhci.h @@ -189,6 +189,7 @@ #define SDHCI_SUPPORT_SDR50 0x00000001 #define SDHCI_SUPPORT_SDR104 0x00000002 #define SDHCI_SUPPORT_DDR50 0x00000004 +#define SDHCI_SUPPORT_HS400 BIT(31) #define SDHCI_USE_SDR50_TUNING 0x00002000 #define SDHCI_CLOCK_MUL_MASK 0x00FF0000 @@ -248,6 +249,8 @@ #define SDHCI_QUIRK_USE_WIDE8 (1 << 8) #define SDHCI_QUIRK_NO_1_8_V (1 << 9) #define SDHCI_QUIRK_SUPPORT_SINGLE (1 << 10) +/* Capability register bit-63 indicates HS400 support */ +#define SDHCI_QUIRK_CAPS_BIT63_FOR_HS400 BIT(11) /* to make gcc happy */ struct sdhci_host;
HS400 is indicated in bit63 of capability register in few IP's. Add a quirk to check this and add HS400 to host capabilities. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> --- drivers/mmc/sdhci.c | 4 ++++ include/sdhci.h | 3 +++ 2 files changed, 7 insertions(+)