| Message ID | 20221020221025.2473281-3-andre.przywara@arm.com |
|---|---|
| State | Accepted |
| Delegated to: | Tom Rini |
| Headers | show |
| Series | timer: add SP804 DM_TIMER driver (and use it) | expand |
On Thu, Oct 20, 2022 at 11:10:24PM +0100, Andre Przywara wrote: > The DT used for Calxeda Highbank and Midway systems exposes a "system > registers" block, modeled as a DT subnode. > This includes several clocks, including the two fixed clocks for the > main oscillator and timer. > > So far U-Boot was ignorant of this special construct (a "clocks" node > within the "hb-sregs" node), as it didn't need the PLL clocks in there. > But that also meant we lost the fixed clocks, which form the base for > the UART baudrate generator and also the SP804 timer. > > To allow the generic PL011 and SP804 driver to read the clock rate, > add a simple bus driver, which triggers the DT node discovery inside this > special node. As we only care about the fixed clocks (we don't have > drivers for the PLLs anyway), just ignore the address translation (for > now). > > The binding is described in bindings/arm/calxeda/hb-sregs.yaml, the DT > snippet in question looks like: > > ======================= > sregs@fff3c000 { > compatible = "calxeda,hb-sregs"; > reg = <0xfff3c000 0x1000>; > > clocks { > #address-cells = <1>; > #size-cells = <0>; > > osc: oscillator { > #clock-cells = <0>; > compatible = "fixed-clock"; > clock-frequency = <33333000>; > }; > .... > }; > }; > ======================= > > Signed-off-by: Andre Przywara <andre.przywara@arm.com> Applied to u-boot/master, thanks!
diff --git a/board/highbank/Makefile b/board/highbank/Makefile index 57f7f2e2a65..9e432119849 100644 --- a/board/highbank/Makefile +++ b/board/highbank/Makefile @@ -3,4 +3,4 @@ # (C) Copyright 2000-2006 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. -obj-y := highbank.o ahci.o +obj-y := highbank.o ahci.o hb_sregs.o diff --git a/board/highbank/hb_sregs.c b/board/highbank/hb_sregs.c new file mode 100644 index 00000000000..d9dd2c2bf67 --- /dev/null +++ b/board/highbank/hb_sregs.c @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Calxeda Highbank/Midway "system registers" bus driver + * + * There is a "clocks" subnode inside the top node, which groups all clocks, + * both programmable PLLs as well as fixed clocks. + * Simple allow the DT enumeration to look inside this node, so that we can + * read the fixed clock frequencies using the DM clock framework. + * + * Copyright (C) 2019 Arm Ltd. + */ + +#include <common.h> +#include <dm.h> +#include <dm/lists.h> + +static int hb_sregs_scan_fdt_dev(struct udevice *dev) +{ + ofnode clock_node, node; + + /* Search for subnode called "clocks". */ + ofnode_for_each_subnode(clock_node, dev_ofnode(dev)) { + if (!ofnode_name_eq(clock_node, "clocks")) + continue; + + /* Enumerate all nodes inside this "clocks" subnode. */ + ofnode_for_each_subnode(node, clock_node) + lists_bind_fdt(dev, node, NULL, NULL, false); + return 0; + } + + return -ENOENT; +} + +static const struct udevice_id highbank_sreg_ids[] = { + { .compatible = "calxeda,hb-sregs" }, + {} +}; + +U_BOOT_DRIVER(hb_sregs) = { + .name = "hb-sregs", + .id = UCLASS_SIMPLE_BUS, + .bind = hb_sregs_scan_fdt_dev, + .of_match = highbank_sreg_ids, +};
The DT used for Calxeda Highbank and Midway systems exposes a "system registers" block, modeled as a DT subnode. This includes several clocks, including the two fixed clocks for the main oscillator and timer. So far U-Boot was ignorant of this special construct (a "clocks" node within the "hb-sregs" node), as it didn't need the PLL clocks in there. But that also meant we lost the fixed clocks, which form the base for the UART baudrate generator and also the SP804 timer. To allow the generic PL011 and SP804 driver to read the clock rate, add a simple bus driver, which triggers the DT node discovery inside this special node. As we only care about the fixed clocks (we don't have drivers for the PLLs anyway), just ignore the address translation (for now). The binding is described in bindings/arm/calxeda/hb-sregs.yaml, the DT snippet in question looks like: ======================= sregs@fff3c000 { compatible = "calxeda,hb-sregs"; reg = <0xfff3c000 0x1000>; clocks { #address-cells = <1>; #size-cells = <0>; osc: oscillator { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <33333000>; }; .... }; }; ======================= Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- board/highbank/Makefile | 2 +- board/highbank/hb_sregs.c | 45 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 46 insertions(+), 1 deletion(-) create mode 100644 board/highbank/hb_sregs.c