| Message ID | 20220922064704.1740759-5-hanetzer@startmail.com |
|---|---|
| State | RFC |
| Delegated to: | Kever Yang |
| Headers | show |
| Series | Alternative debug outputs for rockchip devices | expand |
Hi Marty, On Thu, 22 Sept 2022 at 00:47, Marty E. Plummer <hanetzer@startmail.com> wrote: > > The meat of my problem. rk3399 has the ability to redirect uart2 to > sdcard pins. This setup half works; I can push input into the uart, but > not see output. > > Signed-off-by: Marty E. Plummer <hanetzer@startmail.com> > > --- > > arch/arm/dts/rk3399-gru.dtsi | 7 ++----- > arch/arm/dts/rk3399.dtsi | 4 ++-- > .../arm/include/asm/arch-rockchip/grf_rk3399.h | 3 +++ > arch/arm/mach-rockchip/rk3399/rk3399.c | 18 +++++++++--------- > 4 files changed, 16 insertions(+), 16 deletions(-) Perhaps the C code could be behind a Kconfig, with a comment about how to change the DT? Regards, Simon
On Wed, Sep 28, 2022 at 04:20:37AM -0600, Simon Glass wrote: > Hi Marty, > > On Thu, 22 Sept 2022 at 00:47, Marty E. Plummer <hanetzer@startmail.com> wrote: > > > > The meat of my problem. rk3399 has the ability to redirect uart2 to > > sdcard pins. This setup half works; I can push input into the uart, but > > not see output. > > > > Signed-off-by: Marty E. Plummer <hanetzer@startmail.com> > > > > --- > > > > arch/arm/dts/rk3399-gru.dtsi | 7 ++----- > > arch/arm/dts/rk3399.dtsi | 4 ++-- > > .../arm/include/asm/arch-rockchip/grf_rk3399.h | 3 +++ > > arch/arm/mach-rockchip/rk3399/rk3399.c | 18 +++++++++--------- > > 4 files changed, 16 insertions(+), 16 deletions(-) > > Perhaps the C code could be behind a Kconfig, with a comment about how > to change the DT? > Maybe if I do end up making this up for mainline inclusion, sure, but as of right now I just wanna get some console output to see why things aren't booting properly, so looking for dirty hax to work with for now. > Regards, > Simon
diff --git a/arch/arm/dts/rk3399-gru.dtsi b/arch/arm/dts/rk3399-gru.dtsi index b80f19066b..8c87c1cf19 100644 --- a/arch/arm/dts/rk3399-gru.dtsi +++ b/arch/arm/dts/rk3399-gru.dtsi @@ -510,7 +510,7 @@ ap_i2c_audio: &i2c8 { }; &sdmmc { - status = "okay"; + status = "disabled"; /* * Note: configure "sdmmc_cd" as card detect even though it's actually @@ -520,14 +520,11 @@ ap_i2c_audio: &i2c8 { * turned on that the system will still make sure the port is * configured as SDMMC and not JTAG. */ - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_cd_pin - &sdmmc_bus4>; bus-width = <4>; cap-mmc-highspeed; cap-sd-highspeed; - cd-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>; + // cd-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>; disable-wp; sd-uhs-sdr12; sd-uhs-sdr25; diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi index 3871c7fd83..55d5ee15be 100644 --- a/arch/arm/dts/rk3399.dtsi +++ b/arch/arm/dts/rk3399.dtsi @@ -638,7 +638,7 @@ reg-shift = <2>; reg-io-width = <4>; pinctrl-names = "default"; - pinctrl-0 = <&uart2c_xfer>; + pinctrl-0 = <&uart2a_xfer>; status = "disabled"; }; @@ -2571,7 +2571,7 @@ uart2a_xfer: uart2a-xfer { rockchip,pins = <4 RK_PB0 2 &pcfg_pull_up>, - <4 RK_PB1 2 &pcfg_pull_none>; + <4 RK_PB1 2 &pcfg_pull_up>; }; }; diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h index 658cc0dfc4..e1bfa31af7 100644 --- a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h +++ b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h @@ -554,6 +554,9 @@ enum { /* GRF_SOC_CON7 */ GRF_UART_DBG_SEL_SHIFT = 10, GRF_UART_DBG_SEL_MASK = 3 << GRF_UART_DBG_SEL_SHIFT, + // assumptions, none of this is documented in the TRM as far as I can see + GRF_UART_DBG_SEL_A = 0, + GRF_UART_DBG_SEL_B = 1, GRF_UART_DBG_SEL_C = 2, /* GRF_SOC_CON20 */ diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index 21db03b961..7d35e524dc 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -157,17 +157,17 @@ void board_debug_uart_init(void) GPIO_PULL_NORMAL); } - /* Enable early UART2 channel C on the RK3399 */ - rk_clrsetreg(&grf->gpio4c_iomux, - GRF_GPIO4C3_SEL_MASK, - GRF_UART2DGBC_SIN << GRF_GPIO4C3_SEL_SHIFT); - rk_clrsetreg(&grf->gpio4c_iomux, - GRF_GPIO4C4_SEL_MASK, - GRF_UART2DBGC_SOUT << GRF_GPIO4C4_SEL_SHIFT); - /* Set channel C as UART2 input */ + /* Enable early UART2 channel A on the RK3399 */ + rk_clrsetreg(&grf->gpio4b_iomux, + GRF_GPIO4B0_SEL_MASK, + GRF_UART2DBGA_SIN << GRF_GPIO4B0_SEL_SHIFT); + rk_clrsetreg(&grf->gpio4b_iomux, + GRF_GPIO4B1_SEL_MASK, + GRF_UART2DBGA_SOUT << GRF_GPIO4B0_SEL_SHIFT); + /* Set channel A as UART2 input */ rk_clrsetreg(&grf->soc_con7, GRF_UART_DBG_SEL_MASK, - GRF_UART_DBG_SEL_C << GRF_UART_DBG_SEL_SHIFT); + GRF_UART_DBG_SEL_A << GRF_UART_DBG_SEL_SHIFT); #endif } #endif
The meat of my problem. rk3399 has the ability to redirect uart2 to sdcard pins. This setup half works; I can push input into the uart, but not see output. Signed-off-by: Marty E. Plummer <hanetzer@startmail.com> --- arch/arm/dts/rk3399-gru.dtsi | 7 ++----- arch/arm/dts/rk3399.dtsi | 4 ++-- .../arm/include/asm/arch-rockchip/grf_rk3399.h | 3 +++ arch/arm/mach-rockchip/rk3399/rk3399.c | 18 +++++++++--------- 4 files changed, 16 insertions(+), 16 deletions(-)