Message ID | 20220401124325.1810108-4-pan@semihalf.com |
---|---|
State | Superseded |
Delegated to: | Simon Goldschmidt |
Headers | show |
Series | Add Chameleon V3 support | expand |
On Fri, 1 Apr 2022 at 06:44, Paweł Anikiel <pan@semihalf.com> wrote: > > Add devicetree for Google Chameleon V3 board > > Signed-off-by: Paweł Anikiel <pan@semihalf.com> > --- > arch/arm/dts/Makefile | 2 ++ > arch/arm/dts/socfpga_chameleonv3.dtsi | 21 +++++++++++++++++++++ > arch/arm/dts/socfpga_chameleonv3_270_3.dts | 9 +++++++++ > arch/arm/dts/socfpga_chameleonv3_480_2.dts | 9 +++++++++ > 4 files changed, 41 insertions(+) > create mode 100644 arch/arm/dts/socfpga_chameleonv3.dtsi > create mode 100644 arch/arm/dts/socfpga_chameleonv3_270_3.dts > create mode 100644 arch/arm/dts/socfpga_chameleonv3_480_2.dts Reviewed-by: Simon Glass <sjg@chromium.org> (has this been sent to Linux?)
On Mon, Apr 11, 2022 at 8:35 PM Simon Glass <sjg@chromium.org> wrote: > > On Fri, 1 Apr 2022 at 06:44, Paweł Anikiel <pan@semihalf.com> wrote: > > > > Add devicetree for Google Chameleon V3 board > > > > Signed-off-by: Paweł Anikiel <pan@semihalf.com> > > --- > > arch/arm/dts/Makefile | 2 ++ > > arch/arm/dts/socfpga_chameleonv3.dtsi | 21 +++++++++++++++++++++ > > arch/arm/dts/socfpga_chameleonv3_270_3.dts | 9 +++++++++ > > arch/arm/dts/socfpga_chameleonv3_480_2.dts | 9 +++++++++ > > 4 files changed, 41 insertions(+) > > create mode 100644 arch/arm/dts/socfpga_chameleonv3.dtsi > > create mode 100644 arch/arm/dts/socfpga_chameleonv3_270_3.dts > > create mode 100644 arch/arm/dts/socfpga_chameleonv3_480_2.dts > > Reviewed-by: Simon Glass <sjg@chromium.org> > > (has this been sent to Linux?) It has not been sent to Linux. Regards, Paweł
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index beaaf15131..0ec4a4cab6 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -411,6 +411,8 @@ dtb-$(CONFIG_ARCH_SOCFPGA) += \ socfpga_arria5_secu1.dtb \ socfpga_arria5_socdk.dtb \ socfpga_arria10_socdk_sdmmc.dtb \ + socfpga_chameleonv3_270_3.dtb \ + socfpga_chameleonv3_480_2.dtb \ socfpga_cyclone5_mcvevk.dtb \ socfpga_cyclone5_is1.dtb \ socfpga_cyclone5_socdk.dtb \ diff --git a/arch/arm/dts/socfpga_chameleonv3.dtsi b/arch/arm/dts/socfpga_chameleonv3.dtsi new file mode 100644 index 0000000000..8b6a6cd8e4 --- /dev/null +++ b/arch/arm/dts/socfpga_chameleonv3.dtsi @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2022 Google LLC + */ +#include "socfpga_mercury_aa1.dtsi" + +&gmac0 { + status = "okay"; +}; + +&i2c1 { + status = "okay"; +}; + +&mmc { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; diff --git a/arch/arm/dts/socfpga_chameleonv3_270_3.dts b/arch/arm/dts/socfpga_chameleonv3_270_3.dts new file mode 100644 index 0000000000..2e29d052e3 --- /dev/null +++ b/arch/arm/dts/socfpga_chameleonv3_270_3.dts @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2022 Google LLC + */ +/dts-v1/; + +#include "socfpga_chameleonv3_270_3_handoff.h" +#include "socfpga_arria10-handoff.dtsi" +#include "socfpga_chameleonv3.dtsi" diff --git a/arch/arm/dts/socfpga_chameleonv3_480_2.dts b/arch/arm/dts/socfpga_chameleonv3_480_2.dts new file mode 100644 index 0000000000..3273f216f2 --- /dev/null +++ b/arch/arm/dts/socfpga_chameleonv3_480_2.dts @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2022 Google LLC + */ +/dts-v1/; + +#include "socfpga_chameleonv3_480_2_handoff.h" +#include "socfpga_arria10-handoff.dtsi" +#include "socfpga_chameleonv3.dtsi"
Add devicetree for Google Chameleon V3 board Signed-off-by: Paweł Anikiel <pan@semihalf.com> --- arch/arm/dts/Makefile | 2 ++ arch/arm/dts/socfpga_chameleonv3.dtsi | 21 +++++++++++++++++++++ arch/arm/dts/socfpga_chameleonv3_270_3.dts | 9 +++++++++ arch/arm/dts/socfpga_chameleonv3_480_2.dts | 9 +++++++++ 4 files changed, 41 insertions(+) create mode 100644 arch/arm/dts/socfpga_chameleonv3.dtsi create mode 100644 arch/arm/dts/socfpga_chameleonv3_270_3.dts create mode 100644 arch/arm/dts/socfpga_chameleonv3_480_2.dts