Message ID | 20220223135051.27707-1-aford173@gmail.com |
---|---|
State | Accepted |
Commit | 448616126b6c9417f566d6a11040fde2971f2b90 |
Delegated to: | Stefano Babic |
Headers | show |
Series | imx: imx8mm/imx8mn_beacon: Remove redundant code | expand |
Hi Adam, On Wed, Feb 23, 2022 at 10:51 AM Adam Ford <aford173@gmail.com> wrote: > > The Ethernet controller and PHY use the device tree info to > configure themselves, so it's not necessary to manually do it > in the board file. This permits the removal of a bunch of headers > as well. > > Signed-off-by: Adam Ford <aford173@gmail.com> Nice code removal. Reviewed-by: Fabio Estevam <festevam@denx.de>
On 2022/2/23 21:50, Adam Ford wrote: > The Ethernet controller and PHY use the device tree info to > configure themselves, so it's not necessary to manually do it > in the board file. This permits the removal of a bunch of headers > as well. > > Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Peng Fan <peng.fan@nxp.com> > > diff --git a/board/beacon/imx8mm/imx8mm_beacon.c b/board/beacon/imx8mm/imx8mm_beacon.c > index c228bbf777..204235a3f8 100644 > --- a/board/beacon/imx8mm/imx8mm_beacon.c > +++ b/board/beacon/imx8mm/imx8mm_beacon.c > @@ -1,52 +1,13 @@ > // SPDX-License-Identifier: GPL-2.0+ > /* > - * Copyright 2020 Compass Electronics Group, LLC > + * Copyright 2022 Logic PD, Inc. dba Beacon EmbeddedWorks > */ > > -#include <common.h> > -#include <miiphy.h> > -#include <netdev.h> > #include <asm/global_data.h> > > -#include <asm/arch/clock.h> > -#include <asm/arch/sys_proto.h> > -#include <asm/io.h> > - > DECLARE_GLOBAL_DATA_PTR; > > -#if IS_ENABLED(CONFIG_FEC_MXC) > -static int setup_fec(void) > -{ > - struct iomuxc_gpr_base_regs *gpr = > - (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; > - > - /* Use 125M anatop REF_CLK1 for ENET1, not from external */ > - clrsetbits_le32(&gpr->gpr[1], 0x2000, 0); > - > - return 0; > -} > - > -int board_phy_config(struct phy_device *phydev) > -{ > - /* enable rgmii rxc skew and phy mode select to RGMII copper */ > - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); > - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); > - > - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); > - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); > - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); > - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); > - > - if (phydev->drv->config) > - phydev->drv->config(phydev); > - return 0; > -} > -#endif > - > int board_init(void) > { > - if (IS_ENABLED(CONFIG_FEC_MXC)) > - setup_fec(); > - > return 0; > } > diff --git a/board/beacon/imx8mn/imx8mn_beacon.c b/board/beacon/imx8mn/imx8mn_beacon.c > index 6397dac872..204235a3f8 100644 > --- a/board/beacon/imx8mn/imx8mn_beacon.c > +++ b/board/beacon/imx8mn/imx8mn_beacon.c > @@ -1,52 +1,13 @@ > // SPDX-License-Identifier: GPL-2.0+ > /* > - * Copyright 2020 Compass Electronics Group, LLC > + * Copyright 2022 Logic PD, Inc. dba Beacon EmbeddedWorks > */ > > -#include <common.h> > -#include <miiphy.h> > -#include <netdev.h> > - > -#include <asm/arch/clock.h> > -#include <asm/arch/sys_proto.h> > #include <asm/global_data.h> > -#include <asm/io.h> > > DECLARE_GLOBAL_DATA_PTR; > > -#if IS_ENABLED(CONFIG_FEC_MXC) > -static int setup_fec(void) > -{ > - struct iomuxc_gpr_base_regs *gpr = > - (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; > - > - /* Use 125M anatop REF_CLK1 for ENET1, not from external */ > - clrsetbits_le32(&gpr->gpr[1], 0x2000, 0); > - > - return 0; > -} > - > -int board_phy_config(struct phy_device *phydev) > -{ > - /* enable rgmii rxc skew and phy mode select to RGMII copper */ > - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); > - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); > - > - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); > - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); > - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); > - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); > - > - if (phydev->drv->config) > - phydev->drv->config(phydev); > - return 0; > -} > -#endif > - > int board_init(void) > { > - if (IS_ENABLED(CONFIG_FEC_MXC)) > - setup_fec(); > - > return 0; > } >
> The Ethernet controller and PHY use the device tree info to > configure themselves, so it's not necessary to manually do it > in the board file. This permits the removal of a bunch of headers > as well. > Signed-off-by: Adam Ford <aford173@gmail.com> > Reviewed-by: Fabio Estevam <festevam@denx.de> > Acked-by: Peng Fan <peng.fan@nxp.com> > diff --git a/board/beacon/imx8mm/imx8mm_beacon.c b/board/beacon/imx8mm/imx8mm_beacon.c > index c228bbf777..204235a3f8 100644 > --- a/board/beacon/imx8mm/imx8mm_beacon.c > +++ b/board/beacon/imx8mm/imx8mm_beacon.c > @@ -1,52 +1,13 @@ > // SPDX-License-Identifier: GPL-2.0+ > /* > - * Copyright 2020 Compass Electronics Group, LLC > + * Copyright 2022 Logic PD, Inc. dba Beacon EmbeddedWorks > */ > > -#include <common.h> > -#include <miiphy.h> > -#include <netdev.h> > #include <asm/global_data.h> > > -#include <asm/arch/clock.h> > -#include <asm/arch/sys_proto.h> > -#include <asm/io.h> > - > DECLARE_GLOBAL_DATA_PTR; > > -#if IS_ENABLED(CONFIG_FEC_MXC) > -static int setup_fec(void) > -{ > - struct iomuxc_gpr_base_regs *gpr = > - (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; > - > - /* Use 125M anatop REF_CLK1 for ENET1, not from external */ > - clrsetbits_le32(&gpr->gpr[1], 0x2000, 0); > - > - return 0; > -} > - > -int board_phy_config(struct phy_device *phydev) > -{ > - /* enable rgmii rxc skew and phy mode select to RGMII copper */ > - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); > - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); > - > - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); > - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); > - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); > - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); > - > - if (phydev->drv->config) > - phydev->drv->config(phydev); > - return 0; > -} > -#endif > - > int board_init(void) > { > - if (IS_ENABLED(CONFIG_FEC_MXC)) > - setup_fec(); > - > return 0; > } > diff --git a/board/beacon/imx8mn/imx8mn_beacon.c b/board/beacon/imx8mn/imx8mn_beacon.c > index 6397dac872..204235a3f8 100644 > --- a/board/beacon/imx8mn/imx8mn_beacon.c > +++ b/board/beacon/imx8mn/imx8mn_beacon.c > @@ -1,52 +1,13 @@ > // SPDX-License-Identifier: GPL-2.0+ > /* > - * Copyright 2020 Compass Electronics Group, LLC > + * Copyright 2022 Logic PD, Inc. dba Beacon EmbeddedWorks > */ > > -#include <common.h> > -#include <miiphy.h> > -#include <netdev.h> > - > -#include <asm/arch/clock.h> > -#include <asm/arch/sys_proto.h> > #include <asm/global_data.h> > -#include <asm/io.h> > > DECLARE_GLOBAL_DATA_PTR; > > -#if IS_ENABLED(CONFIG_FEC_MXC) > -static int setup_fec(void) > -{ > - struct iomuxc_gpr_base_regs *gpr = > - (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; > - > - /* Use 125M anatop REF_CLK1 for ENET1, not from external */ > - clrsetbits_le32(&gpr->gpr[1], 0x2000, 0); > - > - return 0; > -} > - > -int board_phy_config(struct phy_device *phydev) > -{ > - /* enable rgmii rxc skew and phy mode select to RGMII copper */ > - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); > - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); > - > - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); > - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); > - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); > - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); > - > - if (phydev->drv->config) > - phydev->drv->config(phydev); > - return 0; > -} > -#endif > - > int board_init(void) > { > - if (IS_ENABLED(CONFIG_FEC_MXC)) > - setup_fec(); > - > return 0; > } Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic
diff --git a/board/beacon/imx8mm/imx8mm_beacon.c b/board/beacon/imx8mm/imx8mm_beacon.c index c228bbf777..204235a3f8 100644 --- a/board/beacon/imx8mm/imx8mm_beacon.c +++ b/board/beacon/imx8mm/imx8mm_beacon.c @@ -1,52 +1,13 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2020 Compass Electronics Group, LLC + * Copyright 2022 Logic PD, Inc. dba Beacon EmbeddedWorks */ -#include <common.h> -#include <miiphy.h> -#include <netdev.h> #include <asm/global_data.h> -#include <asm/arch/clock.h> -#include <asm/arch/sys_proto.h> -#include <asm/io.h> - DECLARE_GLOBAL_DATA_PTR; -#if IS_ENABLED(CONFIG_FEC_MXC) -static int setup_fec(void) -{ - struct iomuxc_gpr_base_regs *gpr = - (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; - - /* Use 125M anatop REF_CLK1 for ENET1, not from external */ - clrsetbits_le32(&gpr->gpr[1], 0x2000, 0); - - return 0; -} - -int board_phy_config(struct phy_device *phydev) -{ - /* enable rgmii rxc skew and phy mode select to RGMII copper */ - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); - - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); - - if (phydev->drv->config) - phydev->drv->config(phydev); - return 0; -} -#endif - int board_init(void) { - if (IS_ENABLED(CONFIG_FEC_MXC)) - setup_fec(); - return 0; } diff --git a/board/beacon/imx8mn/imx8mn_beacon.c b/board/beacon/imx8mn/imx8mn_beacon.c index 6397dac872..204235a3f8 100644 --- a/board/beacon/imx8mn/imx8mn_beacon.c +++ b/board/beacon/imx8mn/imx8mn_beacon.c @@ -1,52 +1,13 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2020 Compass Electronics Group, LLC + * Copyright 2022 Logic PD, Inc. dba Beacon EmbeddedWorks */ -#include <common.h> -#include <miiphy.h> -#include <netdev.h> - -#include <asm/arch/clock.h> -#include <asm/arch/sys_proto.h> #include <asm/global_data.h> -#include <asm/io.h> DECLARE_GLOBAL_DATA_PTR; -#if IS_ENABLED(CONFIG_FEC_MXC) -static int setup_fec(void) -{ - struct iomuxc_gpr_base_regs *gpr = - (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; - - /* Use 125M anatop REF_CLK1 for ENET1, not from external */ - clrsetbits_le32(&gpr->gpr[1], 0x2000, 0); - - return 0; -} - -int board_phy_config(struct phy_device *phydev) -{ - /* enable rgmii rxc skew and phy mode select to RGMII copper */ - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); - - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); - - if (phydev->drv->config) - phydev->drv->config(phydev); - return 0; -} -#endif - int board_init(void) { - if (IS_ENABLED(CONFIG_FEC_MXC)) - setup_fec(); - return 0; }
The Ethernet controller and PHY use the device tree info to configure themselves, so it's not necessary to manually do it in the board file. This permits the removal of a bunch of headers as well. Signed-off-by: Adam Ford <aford173@gmail.com>