| Message ID | 20211224134347.41812-3-alpernebiyasak@gmail.com |
|---|---|
| State | Accepted |
| Commit | 8ba1ade3f89f7505250c190e2749ad72422cbbc0 |
| Delegated to: | Kever Yang |
| Headers | show |
| Series | rockchip: Improve support for Bob chromebook and add support for Kevin | expand |
On Fri, 24 Dec 2021 at 06:44, Alper Nebi Yasak <alpernebiyasak@gmail.com> wrote: > > From: Simon Glass <sjg@chromium.org> > > This adds some devicetree settings for the Gru-based boards, based on > what works on a Kevin board. > > Gru-based boards usually have an 8MiB SPI flash chip and boot from it. > Make the u-boot.rom file intended to be flashed on it match its size. > Add properties for booting from SPI, and only try to boot from SPI as > MMC and SD card don't seem to work in SPL yet. > > The Chromium OS EC needs a delay between transactions so it can get > itself ready. Also it currently uses a non-standard way of specifying > the interrupt. Add these so that the EC works reliably. > > The Rockchip Embedded DisplayPort driver is looking for a rockchip,panel > property to find the panel it should work on. Add the property for the > Gru-based boards. > > The U-Boot GPIO controlled regulator driver only considers the > "enable-gpios" devicetree property, not the singular "enable-gpio" one. > Some devicetree source files have the singular form as they were added > to Linux kernel when it used that form, and imported to U-Boot as is. > Fix one instance of this in the Gru boards' devicetree to the form that > works in U-Boot. > > The PWM controlled regulator driver complains that there is no init > voltage set for a regulator it drives, though it's not clear which one. > Set them all to the voltage levels coreboot sets them: 900 mV. > > The RK3399 SoC needs to know the voltage level that some supplies > provides, including one fixed 1.8V audio-related regulator. Although > this synchronization is currently statically done in the board init > functions, a not-so-hypothetical driver that does this dynamically would > query the regulator only to get -ENODATA and be confused. Make sure > U-Boot knows this supply is at 1.8V by setting its limits to that. > > Most of this is a reapplication of commit 08c85b57a5ec ("rockchip: gru: > Add extra device-tree settings") whose changes were removed during a > sync with Linux at commit 167efc2c7a46 ("arm64: dts: rk3399: Sync > v5.7-rc1 from Linux"). Apply things to rk3399-gru-u-boot.dtsi instead so > they don't get lost again. > > Signed-off-by: Simon Glass <sjg@chromium.org> > [Alper: move to -u-boot.dtsi, rewrite commit message, add more nodes] > Co-developed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> > Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> > Reviewed-by: Kever Yang <kever.yang@rock-chips.com> > --- > Kept sign-off and author as Simon based on the aforementioned commit. > > Changes in v3: > - Add tag: "Reviewed-by: Kever Yang <kever.yang@rock-chips.com>" > > arch/arm/dts/rk3399-gru-u-boot.dtsi | 55 +++++++++++++++++++++++++++++ > 1 file changed, 55 insertions(+) Reviewed-by: Simon Glass <sjg@chromium.org> Tested on bob, kevin Tested-by: Simon Glass <sjg@chromium.org>
diff --git a/arch/arm/dts/rk3399-gru-u-boot.dtsi b/arch/arm/dts/rk3399-gru-u-boot.dtsi index 390ac2bb5a9a..33734e99be50 100644 --- a/arch/arm/dts/rk3399-gru-u-boot.dtsi +++ b/arch/arm/dts/rk3399-gru-u-boot.dtsi @@ -5,6 +5,61 @@ #include "rk3399-u-boot.dtsi" +/ { + chosen { + u-boot,spl-boot-order = &spi_flash; + }; + + config { + u-boot,spl-payload-offset = <0x40000>; + }; +}; + +&binman { + rom { + size = <0x800000>; + }; +}; + +&cros_ec { + ec-interrupt = <&gpio0 RK_PA1 GPIO_ACTIVE_LOW>; +}; + +&edp { + rockchip,panel = <&edp_panel>; +}; + +&pp1800_audio { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; +}; + +&ppvar_bigcpu_pwm { + regulator-init-microvolt = <900000>; +}; + +&ppvar_centerlogic_pwm { + regulator-init-microvolt = <900000>; +}; + +&ppvar_gpu_pwm { + regulator-init-microvolt = <900000>; +}; + +&ppvar_litcpu_pwm { + regulator-init-microvolt = <900000>; +}; + +&ppvar_sd_card_io { + enable-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; +}; + +&spi5 { + spi-activate-delay = <100>; + spi-max-frequency = <3000000>; + spi-deactivate-delay = <200>; +}; + &spi_flash { u-boot,dm-pre-reloc; };