Message ID | 20210521200503.97577-3-rehn.andreas86@gmail.com |
---|---|
State | Deferred |
Delegated to: | Andre Przywara |
Headers | show |
Series | None | expand |
On Sat, May 22, 2021 at 1:36 AM Andreas Rehn <rehn.andreas86@gmail.com> wrote: > > Enable emac for licheepi-zero-dock as it provides a ethernet port > > Signed-off-by: Andreas Rehn <rehn.andreas86@gmail.com> > --- > arch/arm/dts/sun8i-v3s-licheepi-zero-dock.dts | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/arch/arm/dts/sun8i-v3s-licheepi-zero-dock.dts b/arch/arm/dts/sun8i-v3s-licheepi-zero-dock.dts > index db5cd0b857..4d564028f2 100644 > --- a/arch/arm/dts/sun8i-v3s-licheepi-zero-dock.dts > +++ b/arch/arm/dts/sun8i-v3s-licheepi-zero-dock.dts > @@ -49,6 +49,10 @@ > compatible = "licheepi,licheepi-zero-dock", "licheepi,licheepi-zero", > "allwinner,sun8i-v3s"; > > + aliases { > + ethernet0 = &emac; > + }; > + > leds { > /* The LEDs use PG0~2 pins, which conflict with MMC1 */ > status = "disabled"; > @@ -94,3 +98,8 @@ > voltage = <800000>; > }; > }; > + > +&emac { > + allwinner,leds-active-low; > + status = "okay"; > +}; We (atleast on sunXi) cannot support intermediate dst changes, better sync any specific tag or commit from upstream linux. Jagan.
diff --git a/arch/arm/dts/sun8i-v3s-licheepi-zero-dock.dts b/arch/arm/dts/sun8i-v3s-licheepi-zero-dock.dts index db5cd0b857..4d564028f2 100644 --- a/arch/arm/dts/sun8i-v3s-licheepi-zero-dock.dts +++ b/arch/arm/dts/sun8i-v3s-licheepi-zero-dock.dts @@ -49,6 +49,10 @@ compatible = "licheepi,licheepi-zero-dock", "licheepi,licheepi-zero", "allwinner,sun8i-v3s"; + aliases { + ethernet0 = &emac; + }; + leds { /* The LEDs use PG0~2 pins, which conflict with MMC1 */ status = "disabled"; @@ -94,3 +98,8 @@ voltage = <800000>; }; }; + +&emac { + allwinner,leds-active-low; + status = "okay"; +};
Enable emac for licheepi-zero-dock as it provides a ethernet port Signed-off-by: Andreas Rehn <rehn.andreas86@gmail.com> --- arch/arm/dts/sun8i-v3s-licheepi-zero-dock.dts | 9 +++++++++ 1 file changed, 9 insertions(+)