Message ID | 20210315050034.1934660-7-sjg@chromium.org |
---|---|
State | Accepted |
Commit | ac7765017a7f6b2c7f882dc6dbe5f64f142991ba |
Delegated to: | Simon Glass |
Headers | show |
Series | x86: Enhancements for booting from coreboot | expand |
On 3/15/21 2:00 PM, Simon Glass wrote: > Since the recent bug fix, it doesn't matter which GPIO phandle is used so > long as the GPIO number is right. Still, we may as well use the correct > one to avoid confusion. > > Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Best Regards, Jaehoon Chung > --- > > arch/x86/dts/chromebook_coral.dts | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts > index 9f84480e68e..30058be1ea3 100644 > --- a/arch/x86/dts/chromebook_coral.dts > +++ b/arch/x86/dts/chromebook_coral.dts > @@ -572,7 +572,7 @@ > sdmmc: sdmmc@1b,0 { > reg = <0x0000d800 0 0 0 0>; > compatible = "intel,apl-sd"; > - cd-gpios = <&gpio_n GPIO_177 GPIO_ACTIVE_LOW>; > + cd-gpios = <&gpio_sw GPIO_177 GPIO_ACTIVE_LOW>; > acpi,name = "SDCD"; > }; > >
On 3/15/21 2:00 PM, Simon Glass wrote: > Since the recent bug fix, it doesn't matter which GPIO phandle is used so > long as the GPIO number is right. Still, we may as well use the correct > one to avoid confusion. > > Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Best Regards, Jaehoon Chung > --- > > arch/x86/dts/chromebook_coral.dts | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Applied to u-boot-dm/next, thanks!
diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts index 9f84480e68e..30058be1ea3 100644 --- a/arch/x86/dts/chromebook_coral.dts +++ b/arch/x86/dts/chromebook_coral.dts @@ -572,7 +572,7 @@ sdmmc: sdmmc@1b,0 { reg = <0x0000d800 0 0 0 0>; compatible = "intel,apl-sd"; - cd-gpios = <&gpio_n GPIO_177 GPIO_ACTIVE_LOW>; + cd-gpios = <&gpio_sw GPIO_177 GPIO_ACTIVE_LOW>; acpi,name = "SDCD"; };
Since the recent bug fix, it doesn't matter which GPIO phandle is used so long as the GPIO number is right. Still, we may as well use the correct one to avoid confusion. Signed-off-by: Simon Glass <sjg@chromium.org> --- arch/x86/dts/chromebook_coral.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)