| Message ID | 20210130175416.114269-3-marek.vasut+renesas@gmail.com |
|---|---|
| State | Accepted |
| Commit | 06183ac5f583d6a6279dd5479cd9b44b7edd9d4c |
| Delegated to: | Marek Vasut |
| Headers | show |
| Series | [1/5] pci: renesas: Add root bus handling on Gen3 | expand |
diff --git a/drivers/pci/pci-rcar-gen3.c b/drivers/pci/pci-rcar-gen3.c index 6b08409b85..34a561ef8b 100644 --- a/drivers/pci/pci-rcar-gen3.c +++ b/drivers/pci/pci-rcar-gen3.c @@ -358,9 +358,9 @@ static int rcar_gen3_pcie_probe(struct udevice *dev) break; } - writel(0, priv->regs + PCIEPRAR(4)); - writel(0, priv->regs + PCIELAR(4)); - writel(0, priv->regs + PCIELAMR(4)); + writel(0, priv->regs + PCIEPRAR(1)); + writel(0, priv->regs + PCIELAR(1)); + writel(0, priv->regs + PCIELAMR(1)); ret = rcar_gen3_pcie_hw_init(dev); if (ret)
Because the first PCIExAR(n) register is configured with the mapping, It is the second PCIExAR(n) register that must be written with 0, not the last one. Update the n from 4 to 1 to select the correct register. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- drivers/pci/pci-rcar-gen3.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)