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[v3,3/4] pci: add a few ARI and SRIOV related defines

Message ID 20200818103511.11938-4-laurentiu.tudor@nxp.com
State Superseded
Delegated to: Priyanka Jain
Headers show
Series Support for specifying extra IOMMU mappings for PCI | expand

Commit Message

Laurentiu Tudor Aug. 18, 2020, 10:35 a.m. UTC 
From: Laurentiu Tudor <laurentiu.tudor@nxp.com>

Add a few defines related to ARI and SRIOV configuration.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
---
 include/pci.h | 14 ++++++++++++++
 1 file changed, 14 insertions(+)
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Patch

diff --git a/include/pci.h b/include/pci.h
index 2089db9f16..88a09505a5 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -492,6 +492,20 @@ 
 #define  PCI_EXP_LNKSTA_DLLLA	0x2000	/* Data Link Layer Link Active */
 #define PCI_EXP_SLTCAP		20	/* Slot Capabilities */
 #define  PCI_EXP_SLTCAP_PSN	0xfff80000 /* Physical Slot Number */
+#define PCI_EXP_DEVCAP2		36	/* Device Capabilities 2 */
+#define  PCI_EXP_DEVCAP2_ARI	0x00000020 /* ARI Forwarding Supported */
+#define PCI_EXP_DEVCTL2		40	/* Device Control 2 */
+#define  PCI_EXP_DEVCTL2_ARI	0x0020 /* Alternative Routing-ID */
+
+/* PCI SR-IOV Configuration */
+#define PCI_SRIOV_CTRL		8	/* SR-IOV Control Register */
+#define  PCI_SRIOV_CTRL_VF_EN	 0x00000001 /* VF Enable */
+#define  PCI_SRIOV_CTRL_ARI	 0x00000010 /* ARI Capable Hierarchy */
+#define PCI_SRIOV_TOTAL_VFS	14 /* TotalVFs */
+#define PCI_SRIOV_NUM_VFS	16 /* NumVFs */
+#define PCI_SRIOV_VF_OFFSET	20 /* First VF Offset */
+#define PCI_SRIOV_VF_STRIDE	22 /* VF Stride */
+
 #define PCI_EXP_LNKCTL2		48	/* Link Control 2 */
 
 /* Include the ID list */