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[U-Boot,1/2] rockchip: px30: Fixup PMUGRF registers layout order

Message ID 20191127101255.188723-1-paul.kocialkowski@bootlin.com
State Superseded
Delegated to: Kever Yang
Headers show
Series [U-Boot,1/2] rockchip: px30: Fixup PMUGRF registers layout order | expand

Commit Message

Paul Kocialkowski Nov. 27, 2019, 10:12 a.m. UTC
According to the PX30 TRM, the iomux registers come first, before the pull
and strength control registers.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
---
 arch/arm/include/asm/arch-rockchip/grf_px30.h | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

Comments

Kever Yang Nov. 28, 2019, 9:36 a.m. UTC | #1
On 2019/11/27 下午6:12, Paul Kocialkowski wrote:
> According to the PX30 TRM, the iomux registers come first, before the pull
> and strength control registers.
>
> Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

Thanks,
- Kever
> ---
>   arch/arm/include/asm/arch-rockchip/grf_px30.h | 16 ++++++++--------
>   1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm/include/asm/arch-rockchip/grf_px30.h b/arch/arm/include/asm/arch-rockchip/grf_px30.h
> index c167bb42fac9..3d2a8770322e 100644
> --- a/arch/arm/include/asm/arch-rockchip/grf_px30.h
> +++ b/arch/arm/include/asm/arch-rockchip/grf_px30.h
> @@ -112,18 +112,18 @@ struct px30_grf {
>   check_member(px30_grf, mac_con1, 0x904);
>   
>   struct px30_pmugrf {
> -	unsigned int gpio0a_e;
> -	unsigned int gpio0b_e;
> -	unsigned int gpio0c_e;
> -	unsigned int gpio0d_e;
> -	unsigned int gpio0a_p;
> -	unsigned int gpio0b_p;
> -	unsigned int gpio0c_p;
> -	unsigned int gpio0d_p;
>   	unsigned int gpio0al_iomux;
>   	unsigned int gpio0bl_iomux;
>   	unsigned int gpio0cl_iomux;
>   	unsigned int gpio0dl_iomux;
> +	unsigned int gpio0a_p;
> +	unsigned int gpio0b_p;
> +	unsigned int gpio0c_p;
> +	unsigned int gpio0d_p;
> +	unsigned int gpio0a_e;
> +	unsigned int gpio0b_e;
> +	unsigned int gpio0c_e;
> +	unsigned int gpio0d_e;
>   	unsigned int gpio0l_sr;
>   	unsigned int gpio0h_sr;
>   	unsigned int gpio0l_smt;
Heiko Stuebner Nov. 28, 2019, 9:40 a.m. UTC | #2
On 27.11.19 11:12, Paul Kocialkowski wrote:
> According to the PX30 TRM, the iomux registers come first, before the pull
> and strength control registers.
>
> Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>

Reviewed-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

Thanks for that catch
Heiko
diff mbox series

Patch

diff --git a/arch/arm/include/asm/arch-rockchip/grf_px30.h b/arch/arm/include/asm/arch-rockchip/grf_px30.h
index c167bb42fac9..3d2a8770322e 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_px30.h
@@ -112,18 +112,18 @@  struct px30_grf {
 check_member(px30_grf, mac_con1, 0x904);
 
 struct px30_pmugrf {
-	unsigned int gpio0a_e;
-	unsigned int gpio0b_e;
-	unsigned int gpio0c_e;
-	unsigned int gpio0d_e;
-	unsigned int gpio0a_p;
-	unsigned int gpio0b_p;
-	unsigned int gpio0c_p;
-	unsigned int gpio0d_p;
 	unsigned int gpio0al_iomux;
 	unsigned int gpio0bl_iomux;
 	unsigned int gpio0cl_iomux;
 	unsigned int gpio0dl_iomux;
+	unsigned int gpio0a_p;
+	unsigned int gpio0b_p;
+	unsigned int gpio0c_p;
+	unsigned int gpio0d_p;
+	unsigned int gpio0a_e;
+	unsigned int gpio0b_e;
+	unsigned int gpio0c_e;
+	unsigned int gpio0d_e;
 	unsigned int gpio0l_sr;
 	unsigned int gpio0h_sr;
 	unsigned int gpio0l_smt;