| Message ID | 20190925104043.34385-1-biwen.li@nxp.com |
|---|---|
| State | Awaiting Upstream |
| Delegated to: | Priyanka Jain |
| Headers | show |
| Series | [U-Boot,v3,1/2] armv7: ls102xa: add errata ID A-008646 for workaround | expand |
>-----Original Message----- >From: Biwen Li <biwen.li@nxp.com> >Sent: Wednesday, September 25, 2019 4:11 PM >To: albert.u.boot@aribaud.net; Prabhakar X ><prabhakar.kushwaha@nxp.com>; Rajesh Bhagat <rajesh.bhagat@nxp.com>; >Priyanka Jain <priyanka.jain@nxp.com>; Ran Wang <ran.wang_1@nxp.com>; >Leo Li <leoyang.li@nxp.com>; Jagdish Gediya <jagdish.gediya@nxp.com> >Cc: u-boot@lists.denx.de; Biwen Li <biwen.li@nxp.com> >Subject: [v3,1/2] armv7: ls102xa: add errata ID A-008646 for workaround > >The patch adds an errata ID A-008646 for workaround to provide more >information by ID. > >Signed-off-by: Biwen Li <biwen.li@nxp.com> >--- >Change in v3: > - adjust code style > >Change in v2: > - update subject and description > > arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c | 7 ++++--- > 1 file changed, 4 insertions(+), 3 deletions(-) > >diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c >b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c >index bb169aaaf4..afa4fd7a48 100644 >--- a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c >+++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c >@@ -68,9 +68,10 @@ static void __secure ls1_deepsleep_irq_cfg(void) > > ippdexpcr0 = in_be32(&rcpm->ippdexpcr0); > /* >- * Workaround: There is bug of register ippdexpcr1, when read it >always >- * returns zero, so its value is saved to a scrachpad register to be >- * read, that is why we don't read it from register ippdexpcr1 itself. >+ * Workaround of errata A-008646: There is bug of register >ippdexpcr1, >+ * when read it always returns zero, so its value is saved to a >+ * scrachpad register to be read, that is why we don't read it from >+ * register ippdexpcr1 itself. > */ > ippdexpcr1 = in_le32(&scfg->sparecr[7]); > out_be32(&rcpm->ippdexpcr1, ippdexpcr1); >-- >2.17.1 Added errata word in description. Applied to fsl-qoriq master, awaiting upstream. Thanks priyankajain
diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c index bb169aaaf4..afa4fd7a48 100644 --- a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c +++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c @@ -68,9 +68,10 @@ static void __secure ls1_deepsleep_irq_cfg(void) ippdexpcr0 = in_be32(&rcpm->ippdexpcr0); /* - * Workaround: There is bug of register ippdexpcr1, when read it always - * returns zero, so its value is saved to a scrachpad register to be - * read, that is why we don't read it from register ippdexpcr1 itself. + * Workaround of errata A-008646: There is bug of register ippdexpcr1, + * when read it always returns zero, so its value is saved to a + * scrachpad register to be read, that is why we don't read it from + * register ippdexpcr1 itself. */ ippdexpcr1 = in_le32(&scfg->sparecr[7]); out_be32(&rcpm->ippdexpcr1, ippdexpcr1);
The patch adds an errata ID A-008646 for workaround to provide more information by ID. Signed-off-by: Biwen Li <biwen.li@nxp.com> --- Change in v3: - adjust code style Change in v2: - update subject and description arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-)