diff mbox series

[U-Boot,v2,2/2] armv7: ls102xa: not power down OCRAM1

Message ID 20190924071928.21764-2-biwen.li@nxp.com
State Changes Requested
Delegated to: Priyanka Jain
Headers show
Series [U-Boot,v2,1/2] armv7: ls102xa: add errata ID A-008646 for workaround | expand

Commit Message

Biwen Li Sept. 24, 2019, 7:19 a.m. UTC
The patch always not power down OCRAM1
for wakeup source to wakeup system in
deep sleep

Signed-off-by: Biwen Li <biwen.li@nxp.com>
---
Change in v2:
	- split one patch to two patches
	- always not power down OCRAM1

 arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Priyanka Jain Sept. 25, 2019, 4:42 a.m. UTC | #1
>-----Original Message-----
>From: Biwen Li <biwen.li@nxp.com>
>Sent: Tuesday, September 24, 2019 12:49 PM
>To: albert.u.boot@aribaud.net; Prabhakar X
><prabhakar.kushwaha@nxp.com>; Rajesh Bhagat <rajesh.bhagat@nxp.com>;
>Priyanka Jain <priyanka.jain@nxp.com>; Ran Wang <ran.wang_1@nxp.com>;
>Leo Li <leoyang.li@nxp.com>; Jagdish Gediya <jagdish.gediya@nxp.com>
>Cc: u-boot@lists.denx.de; Biwen Li <biwen.li@nxp.com>
>Subject: [v2,2/2] armv7: ls102xa: not power down OCRAM1
>
>The patch always not power down OCRAM1
>for wakeup source to wakeup system in
>deep sleep
Please provide a better description.

--priyankajain
>
>Signed-off-by: Biwen Li <biwen.li@nxp.com>
>---
>Change in v2:
>	- split one patch to two patches
>	- always not power down OCRAM1
>
> arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
>diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
>b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
>index e23fcc135b..34773305ae 100644
>--- a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
>+++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
>@@ -73,7 +73,8 @@ static void __secure ls1_deepsleep_irq_cfg(void)
> 	 * read, that is why we don't read it from register ippdexpcr1 itself.
> 	 */
> 	ippdexpcr1 = in_le32(&scfg->sparecr[7]);
>-	out_be32(&rcpm->ippdexpcr1, ippdexpcr1);
>+	/* Always not power down OCRAM1 */
>+	out_be32(&rcpm->ippdexpcr1, ippdexpcr1 |
>RCPM_IPPDEXPCR1_OCRAM1);
>
> 	if (ippdexpcr0 & RCPM_IPPDEXPCR0_ETSEC)
> 		pmcintecr |= SCFG_PMCINTECR_ETSECRXG0 |
>--
>2.17.1
Biwen Li Sept. 25, 2019, 9:32 a.m. UTC | #2
: [v2,2/2] armv7: ls102xa: not power down OCRAM1
> >
> >The patch always not power down OCRAM1
> >for wakeup source to wakeup system in
> >deep sleep
> Please provide a better description.
Okay, got it, I will provide it in v3.
> 
> --priyankajain
> >
> >Signed-off-by: Biwen Li <biwen.li@nxp.com>
> >---
> >Change in v2:
> >	- split one patch to two patches
> >	- always not power down OCRAM1
> >
> > arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
> >
> >diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
> >b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
> >index e23fcc135b..34773305ae 100644
> >--- a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
> >+++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
> >@@ -73,7 +73,8 @@ static void __secure ls1_deepsleep_irq_cfg(void)
> > 	 * read, that is why we don't read it from register ippdexpcr1 itself.
> > 	 */
> > 	ippdexpcr1 = in_le32(&scfg->sparecr[7]);
> >-	out_be32(&rcpm->ippdexpcr1, ippdexpcr1);
> >+	/* Always not power down OCRAM1 */
> >+	out_be32(&rcpm->ippdexpcr1, ippdexpcr1 |
> >RCPM_IPPDEXPCR1_OCRAM1);
> >
> > 	if (ippdexpcr0 & RCPM_IPPDEXPCR0_ETSEC)
> > 		pmcintecr |= SCFG_PMCINTECR_ETSECRXG0 |
> >--
> >2.17.1
diff mbox series

Patch

diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
index e23fcc135b..34773305ae 100644
--- a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
+++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
@@ -73,7 +73,8 @@  static void __secure ls1_deepsleep_irq_cfg(void)
 	 * read, that is why we don't read it from register ippdexpcr1 itself.
 	 */
 	ippdexpcr1 = in_le32(&scfg->sparecr[7]);
-	out_be32(&rcpm->ippdexpcr1, ippdexpcr1);
+	/* Always not power down OCRAM1 */
+	out_be32(&rcpm->ippdexpcr1, ippdexpcr1 | RCPM_IPPDEXPCR1_OCRAM1);
 
 	if (ippdexpcr0 & RCPM_IPPDEXPCR0_ETSEC)
 		pmcintecr |= SCFG_PMCINTECR_ETSECRXG0 |