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[U-Boot] kconfig: Fix some platforms incorrect I2C clock divider

Message ID 20190802085353.29421-1-chuanhua.han@nxp.com
State Accepted
Delegated to: Prabhakar Kushwaha
Headers show
Series [U-Boot] kconfig: Fix some platforms incorrect I2C clock divider | expand

Commit Message

Chuanhua Han Aug. 2, 2019, 8:53 a.m. UTC
By default, i2c input clock is platform clk / 2, but some of the
platform of i2c clock divider does not meet this kind of circumstance,
so alone to set default values for these platforms.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
---
 arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Prabhakar Kushwaha Aug. 22, 2019, 8:33 a.m. UTC | #1
> -----Original Message-----
> From: Chuanhua Han <chuanhua.han@nxp.com>
> Sent: Friday, August 2, 2019 2:24 PM
> To: albert.u.boot@aribaud.net; Prabhakar Kushwaha
> <prabhakar.kushwaha@nxp.com>
> Cc: u-boot@lists.denx.de; Chuanhua Han <chuanhua.han@nxp.com>
> Subject: [PATCH] kconfig: Fix some platforms incorrect I2C clock divider
> 
> By default, i2c input clock is platform clk / 2, but some of the platform of i2c
> clock divider does not meet this kind of circumstance, so alone to set default
> values for these platforms.
> 
> Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
> ---

This patch has been applied to fsl-qoriq master, awaiting upstream.

--pk
diff mbox series

Patch

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 20f62c5..f011a62 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -503,6 +503,10 @@  config SYS_FSL_DUART_CLK_DIV
 config SYS_FSL_I2C_CLK_DIV
 	int "I2C clock divider"
 	default 1 if ARCH_LS1043A
+	default 4 if ARCH_LS1012A
+	default 4 if ARCH_LS1028A
+	default 8 if ARCH_LX2160A
+	default 8 if ARCH_LS1088A
 	default 2
 	help
 	  This is the divider that is used to derive I2C clock from Platform