| Message ID | 20190130120103.10506-2-laurentiu.tudor@nxp.com |
|---|---|
| State | Superseded |
| Delegated to: | York Sun |
| Headers | show |
| Series | [U-Boot] pci: layerscape: add option to statically allocate PCI StreamIDs | expand |
> -----Original Message----- > From: upstream-release-bounces@linux.nxdi.nxp.com <upstream-release- > bounces@linux.nxdi.nxp.com> On Behalf Of laurentiu.tudor@nxp.com > Sent: Wednesday, January 30, 2019 5:31 PM > To: u-boot@lists.denx.de; Prabhakar Kushwaha > <prabhakar.kushwaha@nxp.com>; York Sun <york.sun@nxp.com> > Cc: Laurentiu Tudor <laurentiu.tudor@nxp.com> > Subject: [upstream-release] [PATCH] pci: layerscape: add option to statically > allocate PCI StreamIDs > > From: Laurentiu Tudor <laurentiu.tudor@nxp.com> > > Certain PCI scenarios have more dynamic requirements, e.g. endpoints are > "hot-plugged" later in the system lifetime. Add a Kconfig option that allows > specifying a maximum number of end-points, per PCI controller and allocate > a StreamID for each one. > > Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> > --- > arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 28 +++++++++++++++++ > drivers/pci/pcie_layerscape_fixup.c | 38 +++++++++++++++++++++++ > 2 files changed, 66 insertions(+) > > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig > b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig > index 2b086da79b..1d633d71a8 100644 > --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig > +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig > @@ -571,3 +571,31 @@ config TFABOOT > help > Enabling this will make a U-Boot binary that is capable of being > booted via TFA. > + > +menuconfig FSL_PCIE_STATIC_STREAM_IDS > + bool "Allocate PCI streamIDs statically" > + default n > + depends on PCIE_LAYERSCAPE > + help > + Statically allocate a certain number of StreamIDs for each PCI > + controller, instead of enumerating the connected endpoints and > + allocate a StreamID for each one. This allocation method can > + be used in more dynamic PCI scenarios, e.g. where endpoints are > + "hot-plugged" later in the system bringup, by statically specifying > + a maximum number of StreamIDs expected for each PCI controller. > + > +if FSL_PCIE_STATIC_STREAM_IDS > + > +config FSL_PCIE1_STREAM_IDS_COUNT > + default 3 > + int "Maximum number of streamIDs to allocate for PCI1 controller" > + > +config FSL_PCIE2_STREAM_IDS_COUNT > + default 3 > + int "Maximum number of streamIDs to allocate for PCI2 controller" > + > +config FSL_PCIE3_STREAM_IDS_COUNT > + default 3 > + int "Maximum number of streamIDs to allocate for PCI3 controller" > + > +endif > diff --git a/drivers/pci/pcie_layerscape_fixup.c > b/drivers/pci/pcie_layerscape_fixup.c > index 1a17bd98aa..32355cbf2e 100644 > --- a/drivers/pci/pcie_layerscape_fixup.c > +++ b/drivers/pci/pcie_layerscape_fixup.c > @@ -177,6 +177,7 @@ static void fdt_pcie_set_iommu_map_entry(void > *blob, struct ls_pcie *pcie, > > static void fdt_fixup_pcie(void *blob) > { > +#if !CONFIG_FSL_PCIE_STATIC_STREAM_IDS > struct udevice *dev, *bus; > struct ls_pcie *pcie; > int streamid; > @@ -215,6 +216,43 @@ static void fdt_fixup_pcie(void *blob) > fdt_pcie_set_iommu_map_entry(blob, pcie, bdf >> 8, > streamid); > } > +#else > + static const int streamid_cnt[] = { > + CONFIG_FSL_PCIE1_STREAM_IDS_COUNT, > + CONFIG_FSL_PCIE2_STREAM_IDS_COUNT, > + CONFIG_FSL_PCIE3_STREAM_IDS_COUNT Why 3 controllers? > + }; > + struct ls_pcie *pcie; > + int i, streamid, index; > + pci_dev_t bdf; > + > + list_for_each_entry(pcie, &ls_pcie_list, list) { > + for (i = 0; i < streamid_cnt[pcie->idx]; i++) { > + streamid = ls_pcie_next_streamid(); > + if (streamid < 0) { > + debug("ERROR: no stream ids free\n"); > + continue; Why to continue if we are out of stream-ids? > + } > + > + index = ls_pcie_next_lut_index(pcie); > + if (index < 0) { > + debug("ERROR: no LUT indexes free\n"); > + continue; We can error out when out of LUT entry > + } > + > + bdf = PCI_BDF(i, 0, 0); > + /* map PCI b.d.f to streamID in LUT */ > + ls_pcie_lut_set_mapping(pcie, index, bdf >> 8, > + streamid); > + /* update msi-map in device tree */ > + fdt_pcie_set_msi_map_entry(blob, pcie, bdf >> 8, > + streamid); > + /* update iommu-map in device tree */ > + fdt_pcie_set_iommu_map_entry(blob, pcie, bdf >> > 8, > + streamid); > + } > + } > +#endif /* !CONFIG_FSL_PCIE_STATIC_STREAM_IDS */ > } > #endif > > -- > 2.17.1 > > _______________________________________________ > upstream-release mailing list > upstream-release@linux.nxdi.nxp.com > https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flin > ux.nxdi.nxp.com%2Fmailman%2Flistinfo%2Fupstream- > release&data=02%7C01%7Cbharat.bhushan%40nxp.com%7C58a43424e > 5724733c5f908d686aa9f3f%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0 > %7C636844464703698542&sdata=TZpx5GzIpO%2FUoGWMzDNPIy5SpH > UZFkSIDQLkZn%2FZMJE%3D&reserved=0
Hi Bharat, Actually I've sent this patch by mistake, sorry for that. I'll drop it and resend the patch series. --- Best Regards, Laurentiu On 30.01.2019 16:41, Bharat Bhushan wrote: > > >> -----Original Message----- >> From: upstream-release-bounces@linux.nxdi.nxp.com <upstream-release- >> bounces@linux.nxdi.nxp.com> On Behalf Of laurentiu.tudor@nxp.com >> Sent: Wednesday, January 30, 2019 5:31 PM >> To: u-boot@lists.denx.de; Prabhakar Kushwaha >> <prabhakar.kushwaha@nxp.com>; York Sun <york.sun@nxp.com> >> Cc: Laurentiu Tudor <laurentiu.tudor@nxp.com> >> Subject: [upstream-release] [PATCH] pci: layerscape: add option to statically >> allocate PCI StreamIDs >> >> From: Laurentiu Tudor <laurentiu.tudor@nxp.com> >> >> Certain PCI scenarios have more dynamic requirements, e.g. endpoints are >> "hot-plugged" later in the system lifetime. Add a Kconfig option that allows >> specifying a maximum number of end-points, per PCI controller and allocate >> a StreamID for each one. >> >> Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> >> --- >> arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 28 +++++++++++++++++ >> drivers/pci/pcie_layerscape_fixup.c | 38 +++++++++++++++++++++++ >> 2 files changed, 66 insertions(+) >> >> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig >> b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig >> index 2b086da79b..1d633d71a8 100644 >> --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig >> +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig >> @@ -571,3 +571,31 @@ config TFABOOT >> help >> Enabling this will make a U-Boot binary that is capable of being >> booted via TFA. >> + >> +menuconfig FSL_PCIE_STATIC_STREAM_IDS >> + bool "Allocate PCI streamIDs statically" >> + default n >> + depends on PCIE_LAYERSCAPE >> + help >> + Statically allocate a certain number of StreamIDs for each PCI >> + controller, instead of enumerating the connected endpoints and >> + allocate a StreamID for each one. This allocation method can >> + be used in more dynamic PCI scenarios, e.g. where endpoints are >> + "hot-plugged" later in the system bringup, by statically specifying >> + a maximum number of StreamIDs expected for each PCI controller. >> + >> +if FSL_PCIE_STATIC_STREAM_IDS >> + >> +config FSL_PCIE1_STREAM_IDS_COUNT >> + default 3 >> + int "Maximum number of streamIDs to allocate for PCI1 controller" >> + >> +config FSL_PCIE2_STREAM_IDS_COUNT >> + default 3 >> + int "Maximum number of streamIDs to allocate for PCI2 controller" >> + >> +config FSL_PCIE3_STREAM_IDS_COUNT >> + default 3 >> + int "Maximum number of streamIDs to allocate for PCI3 controller" >> + >> +endif >> diff --git a/drivers/pci/pcie_layerscape_fixup.c >> b/drivers/pci/pcie_layerscape_fixup.c >> index 1a17bd98aa..32355cbf2e 100644 >> --- a/drivers/pci/pcie_layerscape_fixup.c >> +++ b/drivers/pci/pcie_layerscape_fixup.c >> @@ -177,6 +177,7 @@ static void fdt_pcie_set_iommu_map_entry(void >> *blob, struct ls_pcie *pcie, >> >> static void fdt_fixup_pcie(void *blob) >> { >> +#if !CONFIG_FSL_PCIE_STATIC_STREAM_IDS >> struct udevice *dev, *bus; >> struct ls_pcie *pcie; >> int streamid; >> @@ -215,6 +216,43 @@ static void fdt_fixup_pcie(void *blob) >> fdt_pcie_set_iommu_map_entry(blob, pcie, bdf >> 8, >> streamid); >> } >> +#else >> + static const int streamid_cnt[] = { >> + CONFIG_FSL_PCIE1_STREAM_IDS_COUNT, >> + CONFIG_FSL_PCIE2_STREAM_IDS_COUNT, >> + CONFIG_FSL_PCIE3_STREAM_IDS_COUNT > > Why 3 controllers? > >> + }; >> + struct ls_pcie *pcie; >> + int i, streamid, index; >> + pci_dev_t bdf; >> + >> + list_for_each_entry(pcie, &ls_pcie_list, list) { >> + for (i = 0; i < streamid_cnt[pcie->idx]; i++) { >> + streamid = ls_pcie_next_streamid(); >> + if (streamid < 0) { >> + debug("ERROR: no stream ids free\n"); >> + continue; > > Why to continue if we are out of stream-ids? > >> + } >> + >> + index = ls_pcie_next_lut_index(pcie); >> + if (index < 0) { >> + debug("ERROR: no LUT indexes free\n"); >> + continue; > > We can error out when out of LUT entry > >> + } >> + >> + bdf = PCI_BDF(i, 0, 0); >> + /* map PCI b.d.f to streamID in LUT */ >> + ls_pcie_lut_set_mapping(pcie, index, bdf >> 8, >> + streamid); >> + /* update msi-map in device tree */ >> + fdt_pcie_set_msi_map_entry(blob, pcie, bdf >> 8, >> + streamid); >> + /* update iommu-map in device tree */ >> + fdt_pcie_set_iommu_map_entry(blob, pcie, bdf >> >> 8, >> + streamid); >> + } >> + } >> +#endif /* !CONFIG_FSL_PCIE_STATIC_STREAM_IDS */ >> } >> #endif >> >> -- >> 2.17.1 >> >> _______________________________________________ >> upstream-release mailing list >> upstream-release@linux.nxdi.nxp.com >> https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flin >> ux.nxdi.nxp.com%2Fmailman%2Flistinfo%2Fupstream- >> release&data=02%7C01%7Cbharat.bhushan%40nxp.com%7C58a43424e >> 5724733c5f908d686aa9f3f%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0 >> %7C636844464703698542&sdata=TZpx5GzIpO%2FUoGWMzDNPIy5SpH >> UZFkSIDQLkZn%2FZMJE%3D&reserved=0
Hi Laurentiu, > -----Original Message----- > From: u-boot-bounces@linux.nxdi.nxp.com [mailto:u-boot- > bounces@linux.nxdi.nxp.com] On Behalf Of laurentiu.tudor@nxp.com > Sent: Wednesday, 30 January, 2019 05:31 PM > To: u-boot@lists.denx.de; Prabhakar Kushwaha > <prabhakar.kushwaha@nxp.com>; York Sun <york.sun@nxp.com> > Subject: [u-boot] [PATCH] pci: layerscape: add option to statically allocate PCI > StreamIDs > > From: Laurentiu Tudor <laurentiu.tudor@nxp.com> > > Certain PCI scenarios have more dynamic requirements, e.g. endpoints are "hot- > plugged" later in the system lifetime. Add a Kconfig option that allows specifying > a maximum number of end-points, per PCI controller and allocate a StreamID > for each one. > > Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> > --- > arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 28 +++++++++++++++++ > drivers/pci/pcie_layerscape_fixup.c | 38 +++++++++++++++++++++++ > 2 files changed, 66 insertions(+) > > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig > b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig > index 2b086da79b..1d633d71a8 100644 > --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig > +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig > @@ -571,3 +571,31 @@ config TFABOOT > help > Enabling this will make a U-Boot binary that is capable of being > booted via TFA. > + > +menuconfig FSL_PCIE_STATIC_STREAM_IDS > + bool "Allocate PCI streamIDs statically" > + default n > + depends on PCIE_LAYERSCAPE > + help > + Statically allocate a certain number of StreamIDs for each PCI > + controller, instead of enumerating the connected endpoints and > + allocate a StreamID for each one. This allocation method can > + be used in more dynamic PCI scenarios, e.g. where endpoints are > + "hot-plugged" later in the system bringup, by statically specifying > + a maximum number of StreamIDs expected for each PCI controller. > + > +if FSL_PCIE_STATIC_STREAM_IDS > + > +config FSL_PCIE1_STREAM_IDS_COUNT > + default 3 > + int "Maximum number of streamIDs to allocate for PCI1 controller" > + > +config FSL_PCIE2_STREAM_IDS_COUNT > + default 3 > + int "Maximum number of streamIDs to allocate for PCI2 controller" > + > +config FSL_PCIE3_STREAM_IDS_COUNT > + default 3 > + int "Maximum number of streamIDs to allocate for PCI3 controller" > + > +endif > diff --git a/drivers/pci/pcie_layerscape_fixup.c > b/drivers/pci/pcie_layerscape_fixup.c > index 1a17bd98aa..32355cbf2e 100644 > --- a/drivers/pci/pcie_layerscape_fixup.c > +++ b/drivers/pci/pcie_layerscape_fixup.c > @@ -177,6 +177,7 @@ static void fdt_pcie_set_iommu_map_entry(void *blob, > struct ls_pcie *pcie, > > static void fdt_fixup_pcie(void *blob) > { > +#if !CONFIG_FSL_PCIE_STATIC_STREAM_IDS > struct udevice *dev, *bus; > struct ls_pcie *pcie; > int streamid; > @@ -215,6 +216,43 @@ static void fdt_fixup_pcie(void *blob) > fdt_pcie_set_iommu_map_entry(blob, pcie, bdf >> 8, > streamid); > } > +#else > + static const int streamid_cnt[] = { > + CONFIG_FSL_PCIE1_STREAM_IDS_COUNT, > + CONFIG_FSL_PCIE2_STREAM_IDS_COUNT, > + CONFIG_FSL_PCIE3_STREAM_IDS_COUNT > + }; > + struct ls_pcie *pcie; > + int i, streamid, index; > + pci_dev_t bdf; > + > + list_for_each_entry(pcie, &ls_pcie_list, list) { > + for (i = 0; i < streamid_cnt[pcie->idx]; i++) { > + streamid = ls_pcie_next_streamid(); > + if (streamid < 0) { > + debug("ERROR: no stream ids free\n"); > + continue; > + } > + > + index = ls_pcie_next_lut_index(pcie); > + if (index < 0) { > + debug("ERROR: no LUT indexes free\n"); > + continue; > + } > + > + bdf = PCI_BDF(i, 0, 0); As per my understanding, the BUS number in our SOCs would always be 0 for each PCIE controller. Only the device number and function number would change depending on the device(s) attached to PCIE controller. > + /* map PCI b.d.f to streamID in LUT */ > + ls_pcie_lut_set_mapping(pcie, index, bdf >> 8, > + streamid); > + /* update msi-map in device tree */ > + fdt_pcie_set_msi_map_entry(blob, pcie, bdf >> 8, > + streamid); > + /* update iommu-map in device tree */ > + fdt_pcie_set_iommu_map_entry(blob, pcie, bdf >> 8, > + streamid); > + } > + } > +#endif /* !CONFIG_FSL_PCIE_STATIC_STREAM_IDS */ > } > #endif Wouldn't the better alternative is to fix some stream IDs against BDF in device tree itself for all the PCIE devices that we know for sure would be attached to board. And limit the available streamIDs to be used by bootloader for dynamically discovered PCIE devices. > > -- > 2.17.1 > > _______________________________________________ > u-boot mailing list > u-boot@linux.nxdi.nxp.com > https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flinux.n > xdi.nxp.com%2Fmailman%2Flistinfo%2Fu- > boot&data=02%7C01%7Cpankaj.bansal%40nxp.com%7C8f02f086ad484f22 > ec9608d686aaa058%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63 > 6844464748371835&sdata=1ls1cXUJ0AmJfqDgVxKM3FX6kpep%2F1Pvx1M > ByOKl0Qc%3D&reserved=0
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 2b086da79b..1d633d71a8 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -571,3 +571,31 @@ config TFABOOT help Enabling this will make a U-Boot binary that is capable of being booted via TFA. + +menuconfig FSL_PCIE_STATIC_STREAM_IDS + bool "Allocate PCI streamIDs statically" + default n + depends on PCIE_LAYERSCAPE + help + Statically allocate a certain number of StreamIDs for each PCI + controller, instead of enumerating the connected endpoints and + allocate a StreamID for each one. This allocation method can + be used in more dynamic PCI scenarios, e.g. where endpoints are + "hot-plugged" later in the system bringup, by statically specifying + a maximum number of StreamIDs expected for each PCI controller. + +if FSL_PCIE_STATIC_STREAM_IDS + +config FSL_PCIE1_STREAM_IDS_COUNT + default 3 + int "Maximum number of streamIDs to allocate for PCI1 controller" + +config FSL_PCIE2_STREAM_IDS_COUNT + default 3 + int "Maximum number of streamIDs to allocate for PCI2 controller" + +config FSL_PCIE3_STREAM_IDS_COUNT + default 3 + int "Maximum number of streamIDs to allocate for PCI3 controller" + +endif diff --git a/drivers/pci/pcie_layerscape_fixup.c b/drivers/pci/pcie_layerscape_fixup.c index 1a17bd98aa..32355cbf2e 100644 --- a/drivers/pci/pcie_layerscape_fixup.c +++ b/drivers/pci/pcie_layerscape_fixup.c @@ -177,6 +177,7 @@ static void fdt_pcie_set_iommu_map_entry(void *blob, struct ls_pcie *pcie, static void fdt_fixup_pcie(void *blob) { +#if !CONFIG_FSL_PCIE_STATIC_STREAM_IDS struct udevice *dev, *bus; struct ls_pcie *pcie; int streamid; @@ -215,6 +216,43 @@ static void fdt_fixup_pcie(void *blob) fdt_pcie_set_iommu_map_entry(blob, pcie, bdf >> 8, streamid); } +#else + static const int streamid_cnt[] = { + CONFIG_FSL_PCIE1_STREAM_IDS_COUNT, + CONFIG_FSL_PCIE2_STREAM_IDS_COUNT, + CONFIG_FSL_PCIE3_STREAM_IDS_COUNT + }; + struct ls_pcie *pcie; + int i, streamid, index; + pci_dev_t bdf; + + list_for_each_entry(pcie, &ls_pcie_list, list) { + for (i = 0; i < streamid_cnt[pcie->idx]; i++) { + streamid = ls_pcie_next_streamid(); + if (streamid < 0) { + debug("ERROR: no stream ids free\n"); + continue; + } + + index = ls_pcie_next_lut_index(pcie); + if (index < 0) { + debug("ERROR: no LUT indexes free\n"); + continue; + } + + bdf = PCI_BDF(i, 0, 0); + /* map PCI b.d.f to streamID in LUT */ + ls_pcie_lut_set_mapping(pcie, index, bdf >> 8, + streamid); + /* update msi-map in device tree */ + fdt_pcie_set_msi_map_entry(blob, pcie, bdf >> 8, + streamid); + /* update iommu-map in device tree */ + fdt_pcie_set_iommu_map_entry(blob, pcie, bdf >> 8, + streamid); + } + } +#endif /* !CONFIG_FSL_PCIE_STATIC_STREAM_IDS */ } #endif