diff mbox series

[U-Boot] arm: sunxi: Enable SPL/SPI boot for Olinuxino Lime2-eMMC boards

Message ID 20190110093006.11728-1-plaes@plaes.org
State Accepted
Commit 58e9502e6d98976e2df8ee7d9d8e61ce9250ad7b
Delegated to: Jagannadha Sutradharudu Teki
Headers show
Series [U-Boot] arm: sunxi: Enable SPL/SPI boot for Olinuxino Lime2-eMMC boards | expand

Commit Message

Priit Laes Jan. 10, 2019, 9:30 a.m. UTC 
From: Priit Laes <priit.laes@paf.com>

Starting from revision K the Olimex-Lime2-eMMC boards include
eMMC 5.x chip. Unfortunately, the internal brom in the A20
cannot reliably initialize those chips resulting in random
boot failures on those boards.

To overcome this, all the latest Lime2-eMMC boards are
populated with 16MB SPI flash and therefore enable support
for SPI SPL boot.

For now, SPI flash can be managed using sunxi-fel's spiflash tools.

Signed-off-by: Priit Laes <priit.laes@paf.com>
---
 configs/A20-OLinuXino-Lime2-eMMC_defconfig | 1 +
 1 file changed, 1 insertion(+)

Comments

Jagan Teki Feb. 9, 2019, 3:22 p.m. UTC | #1 
On Thu, Jan 10, 2019 at 3:00 PM Priit Laes <plaes@plaes.org> wrote:
>
> From: Priit Laes <priit.laes@paf.com>
>
> Starting from revision K the Olimex-Lime2-eMMC boards include
> eMMC 5.x chip. Unfortunately, the internal brom in the A20
> cannot reliably initialize those chips resulting in random
> boot failures on those boards.
>
> To overcome this, all the latest Lime2-eMMC boards are
> populated with 16MB SPI flash and therefore enable support
> for SPI SPL boot.
>
> For now, SPI flash can be managed using sunxi-fel's spiflash tools.
>
> Signed-off-by: Priit Laes <priit.laes@paf.com>
> ---

Applied to u-boot-sunxi/master
diff mbox series

Patch

diff --git a/configs/A20-OLinuXino-Lime2-eMMC_defconfig b/configs/A20-OLinuXino-Lime2-eMMC_defconfig
index d37dc2906a..ac6213e364 100644
--- a/configs/A20-OLinuXino-Lime2-eMMC_defconfig
+++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig
@@ -1,6 +1,7 @@ 
 CONFIG_ARM=y
 CONFIG_ARCH_SUNXI=y
 CONFIG_SPL=y
+CONFIG_SPL_SPI_SUNXI=y
 CONFIG_MACH_SUN7I=y
 CONFIG_DRAM_CLK=384
 CONFIG_MMC0_CD_PIN="PH1"