| Message ID | 20180625103723.24760-4-icenowy@aosc.io |
|---|---|
| State | Superseded |
| Delegated to: | Jagannadha Sutradharudu Teki |
| Headers | show |
| Series | Allwinner H6 support (w/ SPL) | expand |
Hi, On 25/06/18 11:37, Icenowy Zheng wrote: > Allwinner H6 has a different RVBAR address with A64/H5. > > Add conditional RVBAR configuration into the code which does RMR switch. > > Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> And thanks for amending the assembly stub too! Cheers, Andre. > --- > arch/arm/include/asm/arch-sunxi/boot0.h | 4 ++++ > arch/arm/mach-sunxi/rmr_switch.S | 6 ++++++ > 2 files changed, 10 insertions(+) > > diff --git a/arch/arm/include/asm/arch-sunxi/boot0.h b/arch/arm/include/asm/arch-sunxi/boot0.h > index 9c6d82dda1..5176fdcfdc 100644 > --- a/arch/arm/include/asm/arch-sunxi/boot0.h > +++ b/arch/arm/include/asm/arch-sunxi/boot0.h > @@ -27,7 +27,11 @@ > .word 0xf57ff06f // isb sy > .word 0xe320f003 // wfi > .word 0xeafffffd // b @wfi > +#ifndef CONFIG_MACH_SUN50I_H6 > .word 0x017000a0 // writeable RVBAR mapping address > +#else > + .word 0x09010040 // writeable RVBAR mapping address > +#endif > #ifdef CONFIG_SPL_BUILD > .word CONFIG_SPL_TEXT_BASE > #else > diff --git a/arch/arm/mach-sunxi/rmr_switch.S b/arch/arm/mach-sunxi/rmr_switch.S > index cefa93001b..fafd306f95 100644 > --- a/arch/arm/mach-sunxi/rmr_switch.S > +++ b/arch/arm/mach-sunxi/rmr_switch.S > @@ -26,9 +26,15 @@ > @ reference and to be able to regenerate a (probably fixed) version of this > @ code found in encoded form in boot0.h. > > +#include <config.h> > + > .text > > +#ifndef CONFIG_MACH_SUN50I_H6 > ldr r1, =0x017000a0 @ MMIO mapped RVBAR[0] register > +#else > + ldr r1, =0x09010040 @ MMIO mapped RVBAR[0] register > +#endif > ldr r0, =0x57aA7add @ start address, to be replaced > str r0, [r1] > dsb sy >
diff --git a/arch/arm/include/asm/arch-sunxi/boot0.h b/arch/arm/include/asm/arch-sunxi/boot0.h index 9c6d82dda1..5176fdcfdc 100644 --- a/arch/arm/include/asm/arch-sunxi/boot0.h +++ b/arch/arm/include/asm/arch-sunxi/boot0.h @@ -27,7 +27,11 @@ .word 0xf57ff06f // isb sy .word 0xe320f003 // wfi .word 0xeafffffd // b @wfi +#ifndef CONFIG_MACH_SUN50I_H6 .word 0x017000a0 // writeable RVBAR mapping address +#else + .word 0x09010040 // writeable RVBAR mapping address +#endif #ifdef CONFIG_SPL_BUILD .word CONFIG_SPL_TEXT_BASE #else diff --git a/arch/arm/mach-sunxi/rmr_switch.S b/arch/arm/mach-sunxi/rmr_switch.S index cefa93001b..fafd306f95 100644 --- a/arch/arm/mach-sunxi/rmr_switch.S +++ b/arch/arm/mach-sunxi/rmr_switch.S @@ -26,9 +26,15 @@ @ reference and to be able to regenerate a (probably fixed) version of this @ code found in encoded form in boot0.h. +#include <config.h> + .text +#ifndef CONFIG_MACH_SUN50I_H6 ldr r1, =0x017000a0 @ MMIO mapped RVBAR[0] register +#else + ldr r1, =0x09010040 @ MMIO mapped RVBAR[0] register +#endif ldr r0, =0x57aA7add @ start address, to be replaced str r0, [r1] dsb sy
Allwinner H6 has a different RVBAR address with A64/H5. Add conditional RVBAR configuration into the code which does RMR switch. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> --- arch/arm/include/asm/arch-sunxi/boot0.h | 4 ++++ arch/arm/mach-sunxi/rmr_switch.S | 6 ++++++ 2 files changed, 10 insertions(+)