diff mbox series

[U-Boot,v2,8/9] mips: bmips: add support for bcm63268 usb

Message ID 20180204201021.1635-9-noltari@gmail.com
State Accepted, archived
Delegated to: Daniel Schwierzeck
Headers show
Series bmips: add support for bcm6368 usbh phy | expand

Commit Message

Álvaro Fernández Rojas Feb. 4, 2018, 8:10 p.m. UTC 
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
 v2: no changes

 arch/mips/dts/brcm,bcm63268.dtsi | 30 ++++++++++++++++++++++++++++++
 include/configs/bmips_bcm63268.h |  7 +++++++
 2 files changed, 37 insertions(+)
diff mbox series

Patch

diff --git a/arch/mips/dts/brcm,bcm63268.dtsi b/arch/mips/dts/brcm,bcm63268.dtsi
index 4d4e36cccc..ade0b49e68 100644
--- a/arch/mips/dts/brcm,bcm63268.dtsi
+++ b/arch/mips/dts/brcm,bcm63268.dtsi
@@ -183,6 +183,36 @@ 
 			status = "disabled";
 		};
 
+		ehci: usb-controller@10002500 {
+			compatible = "brcm,bcm63268-ehci", "generic-ehci";
+			reg = <0x10002500 0x100>;
+			phys = <&usbh>;
+			big-endian;
+
+			status = "disabled";
+		};
+
+		ohci: usb-controller@10002600 {
+			compatible = "brcm,bcm63268-ohci", "generic-ohci";
+			reg = <0x10002600 0x100>;
+			phys = <&usbh>;
+			big-endian;
+
+			status = "disabled";
+		};
+
+		usbh: usb-phy@10002700 {
+			compatible = "brcm,bcm63268-usbh";
+			reg = <0x10002700 0x38>;
+			#phy-cells = <0>;
+			clocks = <&periph_clk BCM63268_CLK_USBH>, <&timer_clk BCM63268_TCLK_USB_REF>;
+			clock-names = "usbh", "usb_ref";
+			power-domains = <&periph_pwr BCM63268_PWR_USBH>;
+			resets = <&periph_rst BCM63268_RST_USBH>;
+
+			status = "disabled";
+		};
+
 		memory-controller@10003000 {
 			compatible = "brcm,bcm6328-mc";
 			reg = <0x10003000 0x894>;
diff --git a/include/configs/bmips_bcm63268.h b/include/configs/bmips_bcm63268.h
index ac0a6700f7..042479b515 100644
--- a/include/configs/bmips_bcm63268.h
+++ b/include/configs/bmips_bcm63268.h
@@ -14,6 +14,13 @@ 
 #define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
+/* USB */
+#define CONFIG_EHCI_DESC_BIG_ENDIAN
+#define CONFIG_EHCI_MMIO_BIG_ENDIAN
+#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
+#define CONFIG_USB_OHCI_NEW
+
 /* U-Boot */
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000