Message ID | 1538759539-3646-4-git-send-email-chee.hong.ang@intel.com |
---|---|
State | Superseded |
Delegated to: | Marek Vasut |
Headers | show |
Series | Stratix10 FPGA reconfiguration support | expand |
On 10/05/2018 07:12 PM, chee.hong.ang@intel.com wrote: > From: "Ang, Chee Hong" <chee.hong.ang@intel.com> > > Enable 'fpga' command in u-boot. User will be able to use the fpga > command to program the FPGA on Stratix10 SoC. > > Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com> > --- > arch/arm/mach-socfpga/misc.c | 22 ++++++++++++++++++++++ > arch/arm/mach-socfpga/misc_s10.c | 4 ++++ > drivers/fpga/altera.c | 6 ++++++ > include/altera.h | 4 ++++ > 4 files changed, 36 insertions(+) > > diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c > index a4f6d5c..350aad1 100644 > --- a/arch/arm/mach-socfpga/misc.c > +++ b/arch/arm/mach-socfpga/misc.c > @@ -88,6 +88,27 @@ int overwrite_console(void) > #endif > > #ifdef CONFIG_FPGA > +#ifdef CONFIG_FPGA_STRATIX10 > +/* > + * FPGA programming support for SoC FPGA Stratix 10 > + */ > +static Altera_desc altera_fpga[] = { > + { > + /* Family */ > + Intel_FPGA_Stratix10, > + /* Interface type */ > + secure_device_manager_mailbox, > + /* No limitation as additional data will be ignored */ > + -1, > + /* No device function table */ > + NULL, > + /* Base interface address specified in driver */ > + NULL, > + /* No cookie implementation */ > + 0 > + }, > +}; > +#else > /* > * FPGA programming support for SoC FPGA Cyclone V > */ > @@ -107,6 +128,7 @@ static Altera_desc altera_fpga[] = { > 0 > }, > }; > +#endif > > /* add device descriptor to FPGA device table */ > void socfpga_fpga_add(void) > diff --git a/arch/arm/mach-socfpga/misc_s10.c b/arch/arm/mach-socfpga/misc_s10.c > index 918baac..7fb945c 100644 > --- a/arch/arm/mach-socfpga/misc_s10.c > +++ b/arch/arm/mach-socfpga/misc_s10.c > @@ -124,6 +124,10 @@ int arch_misc_init(void) > > int arch_early_init_r(void) > { > +#ifdef CONFIG_FPGA > + socfpga_fpga_add(); Can we have an empty implementation of this if CONFIG_FPGA is not defined to avoid proliferation of ifdefs ? > +#endif > + > return 0; > } > > diff --git a/drivers/fpga/altera.c b/drivers/fpga/altera.c > index 9605554..7c8f518 100644 > --- a/drivers/fpga/altera.c > +++ b/drivers/fpga/altera.c > @@ -39,6 +39,9 @@ static const struct altera_fpga { > #if defined(CONFIG_FPGA_STRATIX_V) > { Altera_StratixV, "StratixV", stratixv_load, NULL, NULL }, > #endif > +#if defined(CONFIG_FPGA_STRATIX10) > + { Intel_FPGA_Stratix10, "Stratix10", stratix10_load, NULL, NULL }, > +#endif > #if defined(CONFIG_FPGA_SOCFPGA) > { Altera_SoCFPGA, "SoC FPGA", socfpga_load, NULL, NULL }, > #endif > @@ -154,6 +157,9 @@ int altera_info(Altera_desc *desc) > case fast_passive_parallel_security: > printf("Fast Passive Parallel with Security (FPPS)\n"); > break; > + case secure_device_manager_mailbox: > + puts("Secure Device Manager (SDM) Mailbox\n"); > + break; > /* Add new interface types here */ > default: > printf("Unsupported interface type, %d\n", desc->iface); > diff --git a/include/altera.h b/include/altera.h > index 233b467..22d55cf 100644 > --- a/include/altera.h > +++ b/include/altera.h > @@ -39,6 +39,8 @@ enum altera_iface { > fast_passive_parallel, > /* fast passive parallel with security (FPPS) */ > fast_passive_parallel_security, > + /* secure device manager (SDM) mailbox */ > + secure_device_manager_mailbox, > /* insert all new types before this */ > max_altera_iface_type, > }; > @@ -54,6 +56,8 @@ enum altera_family { > Altera_StratixII, > /* StratixV Family */ > Altera_StratixV, > + /* Stratix10 Family */ > + Intel_FPGA_Stratix10, > /* SoCFPGA Family */ > Altera_SoCFPGA, > >
diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c index a4f6d5c..350aad1 100644 --- a/arch/arm/mach-socfpga/misc.c +++ b/arch/arm/mach-socfpga/misc.c @@ -88,6 +88,27 @@ int overwrite_console(void) #endif #ifdef CONFIG_FPGA +#ifdef CONFIG_FPGA_STRATIX10 +/* + * FPGA programming support for SoC FPGA Stratix 10 + */ +static Altera_desc altera_fpga[] = { + { + /* Family */ + Intel_FPGA_Stratix10, + /* Interface type */ + secure_device_manager_mailbox, + /* No limitation as additional data will be ignored */ + -1, + /* No device function table */ + NULL, + /* Base interface address specified in driver */ + NULL, + /* No cookie implementation */ + 0 + }, +}; +#else /* * FPGA programming support for SoC FPGA Cyclone V */ @@ -107,6 +128,7 @@ static Altera_desc altera_fpga[] = { 0 }, }; +#endif /* add device descriptor to FPGA device table */ void socfpga_fpga_add(void) diff --git a/arch/arm/mach-socfpga/misc_s10.c b/arch/arm/mach-socfpga/misc_s10.c index 918baac..7fb945c 100644 --- a/arch/arm/mach-socfpga/misc_s10.c +++ b/arch/arm/mach-socfpga/misc_s10.c @@ -124,6 +124,10 @@ int arch_misc_init(void) int arch_early_init_r(void) { +#ifdef CONFIG_FPGA + socfpga_fpga_add(); +#endif + return 0; } diff --git a/drivers/fpga/altera.c b/drivers/fpga/altera.c index 9605554..7c8f518 100644 --- a/drivers/fpga/altera.c +++ b/drivers/fpga/altera.c @@ -39,6 +39,9 @@ static const struct altera_fpga { #if defined(CONFIG_FPGA_STRATIX_V) { Altera_StratixV, "StratixV", stratixv_load, NULL, NULL }, #endif +#if defined(CONFIG_FPGA_STRATIX10) + { Intel_FPGA_Stratix10, "Stratix10", stratix10_load, NULL, NULL }, +#endif #if defined(CONFIG_FPGA_SOCFPGA) { Altera_SoCFPGA, "SoC FPGA", socfpga_load, NULL, NULL }, #endif @@ -154,6 +157,9 @@ int altera_info(Altera_desc *desc) case fast_passive_parallel_security: printf("Fast Passive Parallel with Security (FPPS)\n"); break; + case secure_device_manager_mailbox: + puts("Secure Device Manager (SDM) Mailbox\n"); + break; /* Add new interface types here */ default: printf("Unsupported interface type, %d\n", desc->iface); diff --git a/include/altera.h b/include/altera.h index 233b467..22d55cf 100644 --- a/include/altera.h +++ b/include/altera.h @@ -39,6 +39,8 @@ enum altera_iface { fast_passive_parallel, /* fast passive parallel with security (FPPS) */ fast_passive_parallel_security, + /* secure device manager (SDM) mailbox */ + secure_device_manager_mailbox, /* insert all new types before this */ max_altera_iface_type, }; @@ -54,6 +56,8 @@ enum altera_family { Altera_StratixII, /* StratixV Family */ Altera_StratixV, + /* Stratix10 Family */ + Intel_FPGA_Stratix10, /* SoCFPGA Family */ Altera_SoCFPGA,