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[U-Boot,v2,1/3] spi: sh_qspi: full DM conversion

Message ID 1525847797-29055-1-git-send-email-akash@openedev.com
State Superseded
Delegated to: Jagannadha Sutradharudu Teki
Headers show
Series [U-Boot,v2,1/3] spi: sh_qspi: full DM conversion | expand

Commit Message

Akash May 9, 2018, 6:36 a.m. UTC 
v1->v2
New in v2
update Kconfig
replace __sh_qspi_setup to sh_qspi_setup
add missing memeber of platform data

Signed-off-by: Akash Gajjar <akash@openedev.com>
---
 drivers/spi/Kconfig                | 12 +++++-----
 drivers/spi/sh_qspi.c              | 49 +++++++++++++++++++-------------------
 include/dm/platform_data/qspi_sh.h |  4 ----
 3 files changed, 31 insertions(+), 34 deletions(-)

Comments

Jagan Teki May 9, 2018, 11:21 a.m. UTC | #1 
What I understand from this is you made changes on top of your
previous patch which is wrong. Since the first patch is not accepted
and request for changes you need to make changes on top. Since this is
v2 you mentioned 'changes for v2' what is been fixed/updated with this
version.

On Wed, May 9, 2018 at 12:06 PM, Akash Gajjar <gajjar04akash@gmail.com> wrote:
> v1->v2
> New in v2
> update Kconfig
> replace __sh_qspi_setup to sh_qspi_setup
> add missing memeber of platform data
>
> Signed-off-by: Akash Gajjar <akash@openedev.com>
> ---

Changes you need to write it here?

>  drivers/spi/Kconfig                | 12 +++++-----
>  drivers/spi/sh_qspi.c              | 49 +++++++++++++++++++-------------------
>  include/dm/platform_data/qspi_sh.h |  4 ----
>  3 files changed, 31 insertions(+), 34 deletions(-)
>

Send v3.
diff mbox series

Patch

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index ec92b84..81079c5 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -155,6 +155,12 @@  config SANDBOX_SPI
 		};
 	  };
 
+config SH_QSPI
+	bool "Renesas Quad SPI driver"
+	help
+	  Enable the Renesas Quad SPI controller driver. This driver can be
+	  used on Renesas SoCs.
+
 config STM32_QSPI
 	bool "STM32F7 QSPI driver"
 	depends on STM32F7
@@ -259,12 +265,6 @@  config SH_SPI
 	  Enable the SuperH SPI controller driver. This driver can be used
 	  on various SuperH SoCs, such as SH7757.
 
-config SH_QSPI
-	bool "Renesas Quad SPI driver"
-	help
-	  Enable the Renesas Quad SPI controller driver. This driver can be
-	  used on Renesas SoCs.
-
 config TI_QSPI
 	bool "TI QSPI driver"
 	help
diff --git a/drivers/spi/sh_qspi.c b/drivers/spi/sh_qspi.c
index 5fdd52e..b81cee5 100644
--- a/drivers/spi/sh_qspi.c
+++ b/drivers/spi/sh_qspi.c
@@ -77,49 +77,48 @@  struct sh_qspi_priv {
 	struct sh_qspi_regs *regs;
 };
 
-static int __sh_qspi_setup(struct sh_qspi_priv *priv)
+static void sh_qspi_setup(struct sh_qspi_priv *priv)
 {
-	/* QSPI initialize */
-	priv->regs = (struct sh_qspi_regs *)SH_QSPI_BASE;
+	struct sh_qspi_regs *regs = priv->regs;
 
 	/* Set master mode only */
-	writeb(SPCR_MSTR, &priv->regs->spcr);
+	writeb(SPCR_MSTR, &regs->spcr);
 
 	/* Set SSL signal level */
-	writeb(0x00, &priv->regs->sslp);
+	writeb(0x00, &regs->sslp);
 
 	/* Set MOSI signal value when transfer is in idle state */
-	writeb(SPPCR_IO3FV | SPPCR_IO2FV, &priv->regs->sppcr);
+	writeb(SPPCR_IO3FV | SPPCR_IO2FV, &regs->sppcr);
 
 	/* Set bit rate. See 58.3.8 Quad Serial Peripheral Interface */
-	writeb(0x01, &priv->regs->spbr);
+	writeb(0x01, &regs->spbr);
 
 	/* Disable Dummy Data Transmission */
-	writeb(0x00, &priv->regs->spdcr);
+	writeb(0x00, &regs->spdcr);
 
 	/* Set clock delay value */
-	writeb(0x00, &priv->regs->spckd);
+	writeb(0x00, &regs->spckd);
 
 	/* Set SSL negation delay value */
-	writeb(0x00, &priv->regs->sslnd);
+	writeb(0x00, &regs->sslnd);
 
 	/* Set next-access delay value */
-	writeb(0x00, &priv->regs->spnd);
+	writeb(0x00, &regs->spnd);
 
 	/* Set equence command */
-	writew(SPCMD_INIT2, &priv->regs->spcmd0);
+	writew(SPCMD_INIT2, &regs->spcmd0);
 
 	/* Reset transfer and receive Buffer */
-	setbits_8(&priv->regs->spbfcr, SPBFCR_TXRST | SPBFCR_RXRST);
+	setbits_8(&regs->spbfcr, SPBFCR_TXRST | SPBFCR_RXRST);
 
 	/* Clear transfer and receive Buffer control bit */
-	clrbits_8(&priv->regs->spbfcr, SPBFCR_TXRST | SPBFCR_RXRST);
+	clrbits_8(&regs->spbfcr, SPBFCR_TXRST | SPBFCR_RXRST);
 
 	/* Set equence control method. Use equence0 only */
-	writeb(0x00, &priv->regs->spscr);
+	writeb(0x00, &regs->spscr);
 
 	/* Enable SPI function */
-	setbits_8(&priv->regs->spcr, SPCR_SPE);
+	setbits_8(&regs->spcr, SPCR_SPE);
 }
 
 static int sh_qspi_set_speed(struct udevice *bus, uint hz)
@@ -156,7 +155,7 @@  static int sh_qspi_xfer(struct udevice *dev, unsigned int bitlen,
 
 	if (dout == NULL && din == NULL) {
 		if (flags & SPI_XFER_END)
-			spi_cs_deactivate(regs);
+			spi_cs_deactivate(regs);	/* TODO */
 		return 0;
 	}
 
@@ -168,7 +167,7 @@  static int sh_qspi_xfer(struct udevice *dev, unsigned int bitlen,
 	nbyte = bitlen / 8;
 
 	if (flags & SPI_XFER_BEGIN) {
-		spi_cs_activate(regs);
+		spi_cs_activate(regs);			/* TODO */
 
 		/* Set 1048576 byte */
 		writel(0x100000, spbmul0);
@@ -219,7 +218,7 @@  static int sh_qspi_xfer(struct udevice *dev, unsigned int bitlen,
 	}
 
 	if (flags & SPI_XFER_END)
-		spi_cs_deactivate(regs);
+		spi_cs_deactivate(regs);		/* TODO */
 
 	return ret;
 }
@@ -229,7 +228,9 @@  static int sh_qspi_probe(struct udevice *bus)
 	struct sh_qspi_platdata *plat = bus->platdata;
 	struct sh_qspi_priv *priv = dev_get_priv(bus);
 
-	__sh_qspi_setup(priv);
+	priv->regs = plat->regs;
+
+	sh_qspi_setup(priv);
 
 	return 0;
 }
@@ -252,14 +253,14 @@  static int sh_qspi_ofdata_to_platadata(struct udevice *bus)
 	if (addr == FDT_ADDR_T_NONE)
 		return -EINVAL;
 
-	plat->cs = fdtdec_get_int(gd->fdt_blob, dev_of_offset(bus),
-			"num-cs", 4);
+	plat->regs = (struct sh_qspi_regs *regs)addr;
 
 	return 0;
 }
 
-static const struct udevice_id davinci_spi_ids[] = {
-	{ .compatible = "sh,sh-qspi" },
+/* TODO: update comptaible device tree binding */
+static const struct udevice_id sh_qspi_ids[] = {
+	{ .compatible = " " },
 	{ }
 };
 #endif
diff --git a/include/dm/platform_data/qspi_sh.h b/include/dm/platform_data/qspi_sh.h
index 1a8529c..14479ad 100644
--- a/include/dm/platform_data/qspi_sh.h
+++ b/include/dm/platform_data/qspi_sh.h
@@ -7,10 +7,6 @@ 
 #ifndef __qspi_sh_h
 #define __qspi_sh_h
 
-/*
- * struct sh_qspi_platdata - information about a sh qspi module
- *
- */
 struct sh_qspi_platdata {
 	struct sh_qspi_regs *regs;
 	uint cs;