diff mbox

[U-Boot,v2] rockchip: phycore: Read configuration EEPROM & set ethaddr in late init

Message ID 1501760910-14036-1-git-send-email-w.egorov@phytec.de
State Changes Requested
Delegated to: Philipp Tomsich
Headers show

Commit Message

Wadim Egorov Aug. 3, 2017, 11:48 a.m. UTC 
Read SoM information from EEPROM and set ethaddr in late init.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
---
Changes in v2:
- Fixed fdt_path_offset() error handling

---
 board/phytec/phycore_rk3288/phycore-rk3288.c | 62 ++++++++++++++++++++++++++++
 board/phytec/phycore_rk3288/som.h            | 21 ++++++++++
 configs/phycore-rk3288_defconfig             |  2 +
 3 files changed, 85 insertions(+)
 create mode 100644 board/phytec/phycore_rk3288/som.h

Comments

Philipp Tomsich Aug. 3, 2017, 12:14 p.m. UTC | #1 
Wadim,

The earlier version of your patch already made it onto master.
Could you please resubmit this fix as a new patch?

Thanks,
Philipp. 

> On 03 Aug 2017, at 13:48, Wadim Egorov <w.egorov@phytec.de> wrote:
> 
> Read SoM information from EEPROM and set ethaddr in late init.
> 
> Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
> ---
> Changes in v2:
> - Fixed fdt_path_offset() error handling
> 
> ---
> board/phytec/phycore_rk3288/phycore-rk3288.c | 62 ++++++++++++++++++++++++++++
> board/phytec/phycore_rk3288/som.h            | 21 ++++++++++
> configs/phycore-rk3288_defconfig             |  2 +
> 3 files changed, 85 insertions(+)
> create mode 100644 board/phytec/phycore_rk3288/som.h
> 
> diff --git a/board/phytec/phycore_rk3288/phycore-rk3288.c b/board/phytec/phycore_rk3288/phycore-rk3288.c
> index 20696f6..1b60be9 100644
> --- a/board/phytec/phycore_rk3288/phycore-rk3288.c
> +++ b/board/phytec/phycore_rk3288/phycore-rk3288.c
> @@ -5,4 +5,66 @@
>  * SPDX-License-Identifier:     GPL-2.0+
>  */
> 
> +#include <asm/io.h>
> #include <common.h>
> +#include <dm.h>
> +#include <i2c.h>
> +#include <i2c_eeprom.h>
> +#include <netdev.h>
> +#include "som.h"
> +
> +static int valid_rk3288_som(struct rk3288_som *som)
> +{
> +	unsigned char *p = (unsigned char *)som;
> +	unsigned char *e = p + sizeof(struct rk3288_som) - 1;
> +	int hw = 0;
> +
> +	while (p < e) {
> +		hw += hweight8(*p);
> +		p++;
> +	}
> +
> +	return hw == som->bs;
> +}
> +
> +int rk_board_late_init(void)
> +{
> +	int ret;
> +	struct udevice *dev;
> +	struct rk3288_som opt;
> +	int off;
> +
> +	/* Get the identificatioin page of M24C32-D EEPROM */
> +	off = fdt_path_offset(gd->fdt_blob, "eeprom0");
> +	if (off < 0) {
> +		printf("%s: No eeprom0 path offset\n", __func__);
> +		return off;
> +	}
> +
> +	ret = uclass_get_device_by_of_offset(UCLASS_I2C_EEPROM, off, &dev);
> +	if (ret) {
> +		printf("%s: Could not find EEPROM\n", __func__);
> +		return ret;
> +	}
> +
> +	ret = i2c_set_chip_offset_len(dev, 2);
> +	if (ret)
> +		return ret;
> +
> +	ret = i2c_eeprom_read(dev, 0, (uint8_t *)&opt,
> +				sizeof(struct rk3288_som));
> +	if (ret) {
> +		printf("%s: Could not read EEPROM\n", __func__);
> +		return ret;
> +	}
> +
> +	if (opt.api_version != 0 || !valid_rk3288_som(&opt)) {
> +		printf("Invalid data or wrong EEPROM layout version.\n");
> +		/* Proceed anyway, since there is no fallback option */
> +	}
> +
> +	if (is_valid_ethaddr(opt.mac))
> +		eth_setenv_enetaddr("ethaddr", opt.mac);
> +
> +	return 0;
> +}
> diff --git a/board/phytec/phycore_rk3288/som.h b/board/phytec/phycore_rk3288/som.h
> new file mode 100644
> index 0000000..1b7f9a1
> --- /dev/null
> +++ b/board/phytec/phycore_rk3288/som.h
> @@ -0,0 +1,21 @@
> +/*
> + * Copyright (C) 2017 PHYTEC Messtechnik GmbH
> + * Author: Wadim Egorov <w.egorov@phytec.de>
> + *
> + * SPDX-License-Identifier:     GPL-2.0+
> + */
> +
> +/*
> + * rk3288_som struct represents the eeprom layout for PHYTEC RK3288 based SoMs
> + */
> +struct rk3288_som {
> +	unsigned char api_version;	/* EEPROM layout API version */
> +	unsigned char mod_version;	/* PCM/PFL/PCA */
> +	unsigned char option[12];	/* coding for variants */
> +	unsigned char som_rev;		/* SOM revision */
> +	unsigned char mac[6];
> +	unsigned char ksp;		/* 1: KSP, 2: KSM */
> +	unsigned char kspno;		/* Number for KSP/KSM module */
> +	unsigned char reserved[8];	/* not used */
> +	unsigned char bs;		/* Bits set in previous bytes */
> +} __attribute__ ((__packed__));
> diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig
> index 618d983..4e016fe 100644
> --- a/configs/phycore-rk3288_defconfig
> +++ b/configs/phycore-rk3288_defconfig
> @@ -43,6 +43,8 @@ CONFIG_CLK=y
> CONFIG_SPL_CLK=y
> CONFIG_ROCKCHIP_GPIO=y
> CONFIG_SYS_I2C_ROCKCHIP=y
> +CONFIG_MISC=y
> +CONFIG_I2C_EEPROM=y
> CONFIG_MMC_DW=y
> CONFIG_MMC_DW_ROCKCHIP=y
> CONFIG_DM_ETH=y
> -- 
> 1.9.1
>
Wadim Egorov Aug. 3, 2017, 12:22 p.m. UTC | #2 
Hi,

I don't see this patch on master or next. You picked another one:

  commit c03635c3d14c5402229fcfacedbbdff48f3de221
  Author: Wadim Egorov <w.egorov@phytec.de>
  Date:   Tue Jul 18 11:53:10 2017 +0200

      rockchip: phycore: Add ID page of M24C32-D EEPROM

I dropped the above patch from the series.

Regards,
Wadim


Am 03.08.2017 um 14:14 schrieb Dr. Philipp Tomsich:
> Wadim,
>
> The earlier version of your patch already made it onto master.
> Could you please resubmit this fix as a new patch?
>
> Thanks,
> Philipp. 
>
>> On 03 Aug 2017, at 13:48, Wadim Egorov <w.egorov@phytec.de> wrote:
>>
>> Read SoM information from EEPROM and set ethaddr in late init.
>>
>> Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
>> ---
>> Changes in v2:
>> - Fixed fdt_path_offset() error handling
>>
>> ---
>> board/phytec/phycore_rk3288/phycore-rk3288.c | 62 ++++++++++++++++++++++++++++
>> board/phytec/phycore_rk3288/som.h            | 21 ++++++++++
>> configs/phycore-rk3288_defconfig             |  2 +
>> 3 files changed, 85 insertions(+)
>> create mode 100644 board/phytec/phycore_rk3288/som.h
>>
>> diff --git a/board/phytec/phycore_rk3288/phycore-rk3288.c b/board/phytec/phycore_rk3288/phycore-rk3288.c
>> index 20696f6..1b60be9 100644
>> --- a/board/phytec/phycore_rk3288/phycore-rk3288.c
>> +++ b/board/phytec/phycore_rk3288/phycore-rk3288.c
>> @@ -5,4 +5,66 @@
>>  * SPDX-License-Identifier:     GPL-2.0+
>>  */
>>
>> +#include <asm/io.h>
>> #include <common.h>
>> +#include <dm.h>
>> +#include <i2c.h>
>> +#include <i2c_eeprom.h>
>> +#include <netdev.h>
>> +#include "som.h"
>> +
>> +static int valid_rk3288_som(struct rk3288_som *som)
>> +{
>> +	unsigned char *p = (unsigned char *)som;
>> +	unsigned char *e = p + sizeof(struct rk3288_som) - 1;
>> +	int hw = 0;
>> +
>> +	while (p < e) {
>> +		hw += hweight8(*p);
>> +		p++;
>> +	}
>> +
>> +	return hw == som->bs;
>> +}
>> +
>> +int rk_board_late_init(void)
>> +{
>> +	int ret;
>> +	struct udevice *dev;
>> +	struct rk3288_som opt;
>> +	int off;
>> +
>> +	/* Get the identificatioin page of M24C32-D EEPROM */
>> +	off = fdt_path_offset(gd->fdt_blob, "eeprom0");
>> +	if (off < 0) {
>> +		printf("%s: No eeprom0 path offset\n", __func__);
>> +		return off;
>> +	}
>> +
>> +	ret = uclass_get_device_by_of_offset(UCLASS_I2C_EEPROM, off, &dev);
>> +	if (ret) {
>> +		printf("%s: Could not find EEPROM\n", __func__);
>> +		return ret;
>> +	}
>> +
>> +	ret = i2c_set_chip_offset_len(dev, 2);
>> +	if (ret)
>> +		return ret;
>> +
>> +	ret = i2c_eeprom_read(dev, 0, (uint8_t *)&opt,
>> +				sizeof(struct rk3288_som));
>> +	if (ret) {
>> +		printf("%s: Could not read EEPROM\n", __func__);
>> +		return ret;
>> +	}
>> +
>> +	if (opt.api_version != 0 || !valid_rk3288_som(&opt)) {
>> +		printf("Invalid data or wrong EEPROM layout version.\n");
>> +		/* Proceed anyway, since there is no fallback option */
>> +	}
>> +
>> +	if (is_valid_ethaddr(opt.mac))
>> +		eth_setenv_enetaddr("ethaddr", opt.mac);
>> +
>> +	return 0;
>> +}
>> diff --git a/board/phytec/phycore_rk3288/som.h b/board/phytec/phycore_rk3288/som.h
>> new file mode 100644
>> index 0000000..1b7f9a1
>> --- /dev/null
>> +++ b/board/phytec/phycore_rk3288/som.h
>> @@ -0,0 +1,21 @@
>> +/*
>> + * Copyright (C) 2017 PHYTEC Messtechnik GmbH
>> + * Author: Wadim Egorov <w.egorov@phytec.de>
>> + *
>> + * SPDX-License-Identifier:     GPL-2.0+
>> + */
>> +
>> +/*
>> + * rk3288_som struct represents the eeprom layout for PHYTEC RK3288 based SoMs
>> + */
>> +struct rk3288_som {
>> +	unsigned char api_version;	/* EEPROM layout API version */
>> +	unsigned char mod_version;	/* PCM/PFL/PCA */
>> +	unsigned char option[12];	/* coding for variants */
>> +	unsigned char som_rev;		/* SOM revision */
>> +	unsigned char mac[6];
>> +	unsigned char ksp;		/* 1: KSP, 2: KSM */
>> +	unsigned char kspno;		/* Number for KSP/KSM module */
>> +	unsigned char reserved[8];	/* not used */
>> +	unsigned char bs;		/* Bits set in previous bytes */
>> +} __attribute__ ((__packed__));
>> diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig
>> index 618d983..4e016fe 100644
>> --- a/configs/phycore-rk3288_defconfig
>> +++ b/configs/phycore-rk3288_defconfig
>> @@ -43,6 +43,8 @@ CONFIG_CLK=y
>> CONFIG_SPL_CLK=y
>> CONFIG_ROCKCHIP_GPIO=y
>> CONFIG_SYS_I2C_ROCKCHIP=y
>> +CONFIG_MISC=y
>> +CONFIG_I2C_EEPROM=y
>> CONFIG_MMC_DW=y
>> CONFIG_MMC_DW_ROCKCHIP=y
>> CONFIG_DM_ETH=y
>> -- 
>> 1.9.1
>>
Philipp Tomsich Aug. 3, 2017, 12:24 p.m. UTC | #3 
Thanks, that clarifies it.

> On 03 Aug 2017, at 14:22, Wadim Egorov <w.egorov@phytec.de> wrote:
> 
> Hi,
> 
> I don't see this patch on master or next. You picked another one:
> 
>  commit c03635c3d14c5402229fcfacedbbdff48f3de221
>  Author: Wadim Egorov <w.egorov@phytec.de>
>  Date:   Tue Jul 18 11:53:10 2017 +0200
> 
>      rockchip: phycore: Add ID page of M24C32-D EEPROM
> 
> I dropped the above patch from the series.
> 
> Regards,
> Wadim
> 
> 
> Am 03.08.2017 um 14:14 schrieb Dr. Philipp Tomsich:
>> Wadim,
>> 
>> The earlier version of your patch already made it onto master.
>> Could you please resubmit this fix as a new patch?
>> 
>> Thanks,
>> Philipp. 
>> 
>>> On 03 Aug 2017, at 13:48, Wadim Egorov <w.egorov@phytec.de> wrote:
>>> 
>>> Read SoM information from EEPROM and set ethaddr in late init.
>>> 
>>> Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
>>> ---
>>> Changes in v2:
>>> - Fixed fdt_path_offset() error handling
>>> 
>>> ---
>>> board/phytec/phycore_rk3288/phycore-rk3288.c | 62 ++++++++++++++++++++++++++++
>>> board/phytec/phycore_rk3288/som.h            | 21 ++++++++++
>>> configs/phycore-rk3288_defconfig             |  2 +
>>> 3 files changed, 85 insertions(+)
>>> create mode 100644 board/phytec/phycore_rk3288/som.h
>>> 
>>> diff --git a/board/phytec/phycore_rk3288/phycore-rk3288.c b/board/phytec/phycore_rk3288/phycore-rk3288.c
>>> index 20696f6..1b60be9 100644
>>> --- a/board/phytec/phycore_rk3288/phycore-rk3288.c
>>> +++ b/board/phytec/phycore_rk3288/phycore-rk3288.c
>>> @@ -5,4 +5,66 @@
>>> * SPDX-License-Identifier:     GPL-2.0+
>>> */
>>> 
>>> +#include <asm/io.h>
>>> #include <common.h>
>>> +#include <dm.h>
>>> +#include <i2c.h>
>>> +#include <i2c_eeprom.h>
>>> +#include <netdev.h>
>>> +#include "som.h"
>>> +
>>> +static int valid_rk3288_som(struct rk3288_som *som)
>>> +{
>>> +	unsigned char *p = (unsigned char *)som;
>>> +	unsigned char *e = p + sizeof(struct rk3288_som) - 1;
>>> +	int hw = 0;
>>> +
>>> +	while (p < e) {
>>> +		hw += hweight8(*p);
>>> +		p++;
>>> +	}
>>> +
>>> +	return hw == som->bs;
>>> +}
>>> +
>>> +int rk_board_late_init(void)
>>> +{
>>> +	int ret;
>>> +	struct udevice *dev;
>>> +	struct rk3288_som opt;
>>> +	int off;
>>> +
>>> +	/* Get the identificatioin page of M24C32-D EEPROM */
>>> +	off = fdt_path_offset(gd->fdt_blob, "eeprom0");
>>> +	if (off < 0) {
>>> +		printf("%s: No eeprom0 path offset\n", __func__);
>>> +		return off;
>>> +	}
>>> +
>>> +	ret = uclass_get_device_by_of_offset(UCLASS_I2C_EEPROM, off, &dev);
>>> +	if (ret) {
>>> +		printf("%s: Could not find EEPROM\n", __func__);
>>> +		return ret;
>>> +	}
>>> +
>>> +	ret = i2c_set_chip_offset_len(dev, 2);
>>> +	if (ret)
>>> +		return ret;
>>> +
>>> +	ret = i2c_eeprom_read(dev, 0, (uint8_t *)&opt,
>>> +				sizeof(struct rk3288_som));
>>> +	if (ret) {
>>> +		printf("%s: Could not read EEPROM\n", __func__);
>>> +		return ret;
>>> +	}
>>> +
>>> +	if (opt.api_version != 0 || !valid_rk3288_som(&opt)) {
>>> +		printf("Invalid data or wrong EEPROM layout version.\n");
>>> +		/* Proceed anyway, since there is no fallback option */
>>> +	}
>>> +
>>> +	if (is_valid_ethaddr(opt.mac))
>>> +		eth_setenv_enetaddr("ethaddr", opt.mac);
>>> +
>>> +	return 0;
>>> +}
>>> diff --git a/board/phytec/phycore_rk3288/som.h b/board/phytec/phycore_rk3288/som.h
>>> new file mode 100644
>>> index 0000000..1b7f9a1
>>> --- /dev/null
>>> +++ b/board/phytec/phycore_rk3288/som.h
>>> @@ -0,0 +1,21 @@
>>> +/*
>>> + * Copyright (C) 2017 PHYTEC Messtechnik GmbH
>>> + * Author: Wadim Egorov <w.egorov@phytec.de>
>>> + *
>>> + * SPDX-License-Identifier:     GPL-2.0+
>>> + */
>>> +
>>> +/*
>>> + * rk3288_som struct represents the eeprom layout for PHYTEC RK3288 based SoMs
>>> + */
>>> +struct rk3288_som {
>>> +	unsigned char api_version;	/* EEPROM layout API version */
>>> +	unsigned char mod_version;	/* PCM/PFL/PCA */
>>> +	unsigned char option[12];	/* coding for variants */
>>> +	unsigned char som_rev;		/* SOM revision */
>>> +	unsigned char mac[6];
>>> +	unsigned char ksp;		/* 1: KSP, 2: KSM */
>>> +	unsigned char kspno;		/* Number for KSP/KSM module */
>>> +	unsigned char reserved[8];	/* not used */
>>> +	unsigned char bs;		/* Bits set in previous bytes */
>>> +} __attribute__ ((__packed__));
>>> diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig
>>> index 618d983..4e016fe 100644
>>> --- a/configs/phycore-rk3288_defconfig
>>> +++ b/configs/phycore-rk3288_defconfig
>>> @@ -43,6 +43,8 @@ CONFIG_CLK=y
>>> CONFIG_SPL_CLK=y
>>> CONFIG_ROCKCHIP_GPIO=y
>>> CONFIG_SYS_I2C_ROCKCHIP=y
>>> +CONFIG_MISC=y
>>> +CONFIG_I2C_EEPROM=y
>>> CONFIG_MMC_DW=y
>>> CONFIG_MMC_DW_ROCKCHIP=y
>>> CONFIG_DM_ETH=y
>>> -- 
>>> 1.9.1
>>> 
>
Philipp Tomsich Aug. 4, 2017, 10:43 p.m. UTC | #4 
> Read SoM information from EEPROM and set ethaddr in late init.
> 
> Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
> ---
> Changes in v2:
> - Fixed fdt_path_offset() error handling
> 
> ---
>  board/phytec/phycore_rk3288/phycore-rk3288.c | 62 ++++++++++++++++++++++++++++
>  board/phytec/phycore_rk3288/som.h            | 21 ++++++++++
>  configs/phycore-rk3288_defconfig             |  2 +
>  3 files changed, 85 insertions(+)
>  create mode 100644 board/phytec/phycore_rk3288/som.h
> 

Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich Aug. 18, 2017, 1:28 p.m. UTC | #5 
> Read SoM information from EEPROM and set ethaddr in late init.
> 
> Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
> ---
> Changes in v2:
> - Fixed fdt_path_offset() error handling
> 
> ---
>  board/phytec/phycore_rk3288/phycore-rk3288.c | 62 ++++++++++++++++++++++++++++
>  board/phytec/phycore_rk3288/som.h            | 21 ++++++++++
>  configs/phycore-rk3288_defconfig             |  2 +
>  3 files changed, 85 insertions(+)
>  create mode 100644 board/phytec/phycore_rk3288/som.h
> 

Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich Aug. 18, 2017, 3:55 p.m. UTC | #6 
Wadim,

> On 18 Aug 2017, at 15:28, Philipp Tomsich <philipp.tomsich@theobroma-systems.com> wrote:
> 
>> Read SoM information from EEPROM and set ethaddr in late init.
>> 
>> Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
>> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
>> ---
>> Changes in v2:
>> - Fixed fdt_path_offset() error handling
>> 

This patch breaks the build for 'phycore-rk3288’ for me, so I can’t apply.
I get the following error from buildman:
>        arm:  +   phycore-rk3288                      
> +   eth_setenv_enetaddr("ethaddr", opt.mac);
> +   ^
> +board/phytec/phycore_rk3288/built-in.o: In function `rk_board_late_init':
> +board/phytec/phycore_rk3288/phycore-rk3288.c:67: undefined reference to `eth_setenv_enetaddr'
> +arm-unknown-linux-gnueabi-ld.bfd: BFD (GNU Binutils) 2.24 assertion fail /home/tony/buildall/src/binutils/bfd/elf32-arm.c:7696
> +arm-unknown-linux-gnueabi-ld.bfd: error: required section '.rel.plt' not found in the linker script
> +arm-unknown-linux-gnueabi-ld.bfd: final link failed: Invalid operation
> +make[1]: *** [u-boot] Error 1
> +make: *** [sub-make] Error 2
> w+board/phytec/phycore_rk3288/phycore-rk3288.c: In function 'rk_board_late_init':
> w+board/phytec/phycore_rk3288/phycore-rk3288.c:67:3: warning: implicit declaration of function 'eth_setenv_enetaddr' [-Wimplicit-function-declaration]

Regards,
Philipp.
diff mbox

Patch

diff --git a/board/phytec/phycore_rk3288/phycore-rk3288.c b/board/phytec/phycore_rk3288/phycore-rk3288.c
index 20696f6..1b60be9 100644
--- a/board/phytec/phycore_rk3288/phycore-rk3288.c
+++ b/board/phytec/phycore_rk3288/phycore-rk3288.c
@@ -5,4 +5,66 @@ 
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
+#include <asm/io.h>
 #include <common.h>
+#include <dm.h>
+#include <i2c.h>
+#include <i2c_eeprom.h>
+#include <netdev.h>
+#include "som.h"
+
+static int valid_rk3288_som(struct rk3288_som *som)
+{
+	unsigned char *p = (unsigned char *)som;
+	unsigned char *e = p + sizeof(struct rk3288_som) - 1;
+	int hw = 0;
+
+	while (p < e) {
+		hw += hweight8(*p);
+		p++;
+	}
+
+	return hw == som->bs;
+}
+
+int rk_board_late_init(void)
+{
+	int ret;
+	struct udevice *dev;
+	struct rk3288_som opt;
+	int off;
+
+	/* Get the identificatioin page of M24C32-D EEPROM */
+	off = fdt_path_offset(gd->fdt_blob, "eeprom0");
+	if (off < 0) {
+		printf("%s: No eeprom0 path offset\n", __func__);
+		return off;
+	}
+
+	ret = uclass_get_device_by_of_offset(UCLASS_I2C_EEPROM, off, &dev);
+	if (ret) {
+		printf("%s: Could not find EEPROM\n", __func__);
+		return ret;
+	}
+
+	ret = i2c_set_chip_offset_len(dev, 2);
+	if (ret)
+		return ret;
+
+	ret = i2c_eeprom_read(dev, 0, (uint8_t *)&opt,
+				sizeof(struct rk3288_som));
+	if (ret) {
+		printf("%s: Could not read EEPROM\n", __func__);
+		return ret;
+	}
+
+	if (opt.api_version != 0 || !valid_rk3288_som(&opt)) {
+		printf("Invalid data or wrong EEPROM layout version.\n");
+		/* Proceed anyway, since there is no fallback option */
+	}
+
+	if (is_valid_ethaddr(opt.mac))
+		eth_setenv_enetaddr("ethaddr", opt.mac);
+
+	return 0;
+}
diff --git a/board/phytec/phycore_rk3288/som.h b/board/phytec/phycore_rk3288/som.h
new file mode 100644
index 0000000..1b7f9a1
--- /dev/null
+++ b/board/phytec/phycore_rk3288/som.h
@@ -0,0 +1,21 @@ 
+/*
+ * Copyright (C) 2017 PHYTEC Messtechnik GmbH
+ * Author: Wadim Egorov <w.egorov@phytec.de>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/*
+ * rk3288_som struct represents the eeprom layout for PHYTEC RK3288 based SoMs
+ */
+struct rk3288_som {
+	unsigned char api_version;	/* EEPROM layout API version */
+	unsigned char mod_version;	/* PCM/PFL/PCA */
+	unsigned char option[12];	/* coding for variants */
+	unsigned char som_rev;		/* SOM revision */
+	unsigned char mac[6];
+	unsigned char ksp;		/* 1: KSP, 2: KSM */
+	unsigned char kspno;		/* Number for KSP/KSM module */
+	unsigned char reserved[8];	/* not used */
+	unsigned char bs;		/* Bits set in previous bytes */
+} __attribute__ ((__packed__));
diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig
index 618d983..4e016fe 100644
--- a/configs/phycore-rk3288_defconfig
+++ b/configs/phycore-rk3288_defconfig
@@ -43,6 +43,8 @@  CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_I2C_EEPROM=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_DM_ETH=y