| Message ID | 1500410199-13039-30-git-send-email-philipp.tomsich@theobroma-systems.com |
|---|---|
| State | Superseded |
| Delegated to: | Philipp Tomsich |
| Headers | show |
Hi Philipp: On 2017年07月19日 04:36, Philipp Tomsich wrote: > The RK3368 has both a limited SPL size (just 0x7000 bytes) and the > added challenge of booting in AArch64, which increases the code size > for SPL (particularily when using the LP64 programming model). For > this reason we expect the RK3368 to always use OF_PLATDATA for its > SPL stage. According to your previous patch, maybe you mean TPL here? > This change adds support for the MSCH, PMUGRF and GRF register regions > in syscon, which are necessary for initialising the RK3368's DRAM > controller. > > Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> > --- > > arch/arm/mach-rockchip/rk3368/syscon_rk3368.c | 35 +++++++++++++++++++++++++++ > 1 file changed, 35 insertions(+) > > diff --git a/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c b/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c > index 03e97eb..90a993e 100644 > --- a/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c > +++ b/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c > @@ -1,6 +1,8 @@ > /* > * (C) Copyright 2017 Rockchip Electronics Co., Ltd > * Author: Andy Yan <andy.yan@rock-chips.com> > + * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH > + * > * SPDX-License-Identifier: GPL-2.0+ > */ > > @@ -14,6 +16,8 @@ static const struct udevice_id rk3368_syscon_ids[] = { > .data = ROCKCHIP_SYSCON_GRF }, > { .compatible = "rockchip,rk3368-pmugrf", > .data = ROCKCHIP_SYSCON_PMUGRF }, > + { .compatible = "rockchip,rk3368-msch", > + .data = ROCKCHIP_SYSCON_MSCH }, > { } > }; > > @@ -22,3 +26,34 @@ U_BOOT_DRIVER(syscon_rk3368) = { > .id = UCLASS_SYSCON, > .of_match = rk3368_syscon_ids, > }; > + > +#if CONFIG_IS_ENABLED(OF_PLATDATA) > +static int rk3368_syscon_bind_of_platdata(struct udevice *dev) > +{ > + dev->driver_data = dev->driver->of_match->data; > + debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data); > + > + return 0; > +} > + > +U_BOOT_DRIVER(rockchip_rk3368_grf) = { > + .name = "rockchip_rk3368_grf", > + .id = UCLASS_SYSCON, > + .of_match = rk3368_syscon_ids, > + .bind = rk3368_syscon_bind_of_platdata, > +}; > + > +U_BOOT_DRIVER(rockchip_rk3368_pmugrf) = { > + .name = "rockchip_rk3368_pmugrf", > + .id = UCLASS_SYSCON, > + .of_match = rk3368_syscon_ids + 1, > + .bind = rk3368_syscon_bind_of_platdata, > +}; > + > +U_BOOT_DRIVER(rockchip_rk3368_msch) = { > + .name = "rockchip_rk3368_msch", > + .id = UCLASS_SYSCON, > + .of_match = rk3368_syscon_ids + 2, > + .bind = rk3368_syscon_bind_of_platdata, > +}; > +#endif
diff --git a/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c b/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c index 03e97eb..90a993e 100644 --- a/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c +++ b/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c @@ -1,6 +1,8 @@ /* * (C) Copyright 2017 Rockchip Electronics Co., Ltd * Author: Andy Yan <andy.yan@rock-chips.com> + * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH + * * SPDX-License-Identifier: GPL-2.0+ */ @@ -14,6 +16,8 @@ static const struct udevice_id rk3368_syscon_ids[] = { .data = ROCKCHIP_SYSCON_GRF }, { .compatible = "rockchip,rk3368-pmugrf", .data = ROCKCHIP_SYSCON_PMUGRF }, + { .compatible = "rockchip,rk3368-msch", + .data = ROCKCHIP_SYSCON_MSCH }, { } }; @@ -22,3 +26,34 @@ U_BOOT_DRIVER(syscon_rk3368) = { .id = UCLASS_SYSCON, .of_match = rk3368_syscon_ids, }; + +#if CONFIG_IS_ENABLED(OF_PLATDATA) +static int rk3368_syscon_bind_of_platdata(struct udevice *dev) +{ + dev->driver_data = dev->driver->of_match->data; + debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data); + + return 0; +} + +U_BOOT_DRIVER(rockchip_rk3368_grf) = { + .name = "rockchip_rk3368_grf", + .id = UCLASS_SYSCON, + .of_match = rk3368_syscon_ids, + .bind = rk3368_syscon_bind_of_platdata, +}; + +U_BOOT_DRIVER(rockchip_rk3368_pmugrf) = { + .name = "rockchip_rk3368_pmugrf", + .id = UCLASS_SYSCON, + .of_match = rk3368_syscon_ids + 1, + .bind = rk3368_syscon_bind_of_platdata, +}; + +U_BOOT_DRIVER(rockchip_rk3368_msch) = { + .name = "rockchip_rk3368_msch", + .id = UCLASS_SYSCON, + .of_match = rk3368_syscon_ids + 2, + .bind = rk3368_syscon_bind_of_platdata, +}; +#endif
The RK3368 has both a limited SPL size (just 0x7000 bytes) and the added challenge of booting in AArch64, which increases the code size for SPL (particularily when using the LP64 programming model). For this reason we expect the RK3368 to always use OF_PLATDATA for its SPL stage. This change adds support for the MSCH, PMUGRF and GRF register regions in syscon, which are necessary for initialising the RK3368's DRAM controller. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> --- arch/arm/mach-rockchip/rk3368/syscon_rk3368.c | 35 +++++++++++++++++++++++++++ 1 file changed, 35 insertions(+)