| Message ID | 1493246198-4884-2-git-send-email-philipp.tomsich@theobroma-systems.com |
|---|---|
| State | Accepted |
| Commit | a70feb462016d1a6a4e6254aa10ba68948b458f2 |
| Delegated to: | Simon Glass |
| Headers | show |
On 26 April 2017 at 16:36, Philipp Tomsich <philipp.tomsich@theobroma-systems.com> wrote: > The (non-secure) efuse node in the DTS requests PCLK_EFUSE1024NS. > To allow us to add a efuse-driver (and more importantly, to allow > probes of such a driver to succeed), we need need to accept requests > for PCLK_EFUSE1024NS and return a non-error result. > > As PCLK_EFUSE1024NS is enabled by default (i.e. after reset), we don't > implement any logic to manage this clock gate and simply assume that > the reset-default has not been changed. > > Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> > Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com> > --- > > drivers/clk/rockchip/clk_rk3399.c | 4 ++++ > 1 file changed, 4 insertions(+) > Acked-by: Simon Glass <sjg@chromium.org>
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index 72395e2..4dbc1b0 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -882,6 +882,8 @@ static ulong rk3399_clk_get_rate(struct clk *clk) case DCLK_VOP0: case DCLK_VOP1: break; + case PCLK_EFUSE1024NS: + break; default: return -ENOENT; } @@ -923,6 +925,8 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate) case SCLK_DDRCLK: ret = rk3399_ddr_set_clk(priv->cru, rate); break; + case PCLK_EFUSE1024NS: + break; default: return -ENOENT; }