| Message ID | 1491383072-20899-1-git-send-email-santan.kumar@nxp.com |
|---|---|
| State | Accepted |
| Delegated to: | York Sun |
| Headers | show |
On 04/05/2017 02:01 AM, Santan Kumar wrote: > Signed-off-by: Santan Kumar <santan.kumar@nxp.com> > Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> > --- > arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c > index ab83e85..4db3c76 100644 > --- a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c > +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c > @@ -70,6 +70,7 @@ static struct serdes_config serdes2_cfg_tbl[] = { > SATA2 } }, > {0x4A, {SGMII9, SGMII10, SGMII11, SGMII12, PCIE4, PCIE4, SATA1, > SATA2 } }, > + {0x51, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, PCIE4, PCIE4 } }, > {0x57, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, SGMII15, SGMII16 } }, > {} > }; > Santan, Does this patch replace another one with subject "armv8: ls2081a: Add serdes2 protocol 0x51 support"? It changes the same file the same way. For future update, you are required to put version number and change log to it. York
> -----Original Message----- > From: york sun > Sent: Wednesday, April 5, 2017 9:13 PM > To: Santan Kumar <santan.kumar@nxp.com>; u-boot@lists.denx.de > Cc: Priyanka Jain <priyanka.jain@nxp.com> > Subject: Re: [PATCH] armv8: ls2080a: Add serdes2 protocol 0x51 support > > On 04/05/2017 02:01 AM, Santan Kumar wrote: > > Signed-off-by: Santan Kumar <santan.kumar@nxp.com> > > Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> > > --- > > arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c > > b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c > > index ab83e85..4db3c76 100644 > > --- a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c > > +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c > > @@ -70,6 +70,7 @@ static struct serdes_config serdes2_cfg_tbl[] = { > > SATA2 } }, > > {0x4A, {SGMII9, SGMII10, SGMII11, SGMII12, PCIE4, PCIE4, SATA1, > > SATA2 } }, > > + {0x51, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, PCIE4, PCIE4 } }, > > {0x57, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, SGMII15, SGMII16 } }, > > {} > > }; > > > > Santan, > > Does this patch replace another one with subject "armv8: ls2081a: Add > serdes2 protocol 0x51 support"? It changes the same file the same way. > For future update, you are required to put version number and change log to > it. > > York [Santan Kumar] yes, this patch replaces the earlier one. What should I do now? Should I send another patch with version number 3?
On 04/05/2017 08:47 AM, Santan Kumar wrote: > >> >> Santan, >> >> Does this patch replace another one with subject "armv8: ls2081a: Add >> serdes2 protocol 0x51 support"? It changes the same file the same way. >> For future update, you are required to put version number and change log to >> it. >> >> York > [Santan Kumar] yes, this patch replaces the earlier one. What should I do now? Should I send another patch with version number 3? > Don't send another version. Just reply to your previous one saying it is superseded so others won't spend time on it. York
On 04/05/2017 02:01 AM, Santan Kumar wrote: > Signed-off-by: Santan Kumar <santan.kumar@nxp.com> > Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> > --- Applied to u-boot-fsl-qoriq master, awaiting upstream. Thanks. York
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c index ab83e85..4db3c76 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c @@ -70,6 +70,7 @@ static struct serdes_config serdes2_cfg_tbl[] = { SATA2 } }, {0x4A, {SGMII9, SGMII10, SGMII11, SGMII12, PCIE4, PCIE4, SATA1, SATA2 } }, + {0x51, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, PCIE4, PCIE4 } }, {0x57, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, SGMII15, SGMII16 } }, {} };