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[U-Boot,2/5,v5] armv8: Make SEC read/write as snoopable for LS1043

Message ID 1449563070-5761-2-git-send-email-aneesh.bansal@freescale.com
State Accepted
Delegated to: York Sun
Headers show

Commit Message

Aneesh Bansal Dec. 8, 2015, 8:24 a.m. UTC
For LS1043, SEC read/writes are made snoopable by setting
the corresponding bits in SCFG to avoid coherency issues.

Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
---
Changes in v5: None

Changes in v4: None

Changes in v3: None

Changes in v2: 
New Patch set created with an additional patch
Commit Subject modified

 arch/arm/cpu/armv8/fsl-layerscape/soc.c | 5 +++++
 1 file changed, 5 insertions(+)

Comments

York Sun Dec. 15, 2015, 1:07 a.m. UTC | #1
On 12/08/2015 04:24 PM, Aneesh Bansal wrote:
> For LS1043, SEC read/writes are made snoopable by setting
> the corresponding bits in SCFG to avoid coherency issues.
> 
> Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
> ---
> Changes in v5: None
> 
> Changes in v4: None
> 
> Changes in v3: None
> 
> Changes in v2: 
> New Patch set created with an additional patch
> Commit Subject modified

Applied to fsl-qoriq master. Awaiting upstream.

York
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Patch

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 8896b70..85d8df8 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -124,11 +124,16 @@  void fsl_lsch3_early_init_f(void)
 void fsl_lsch2_early_init_f(void)
 {
 	struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
+	struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
 
 #ifdef CONFIG_FSL_IFC
 	init_early_memctl_regs();	/* tighten IFC timing */
 #endif
 
+	/* Make SEC reads and writes snoopable */
+	setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SECRDSNP |
+		     SCFG_SNPCNFGCR_SECWRSNP);
+
 	/*
 	 * Enable snoop requests and DVM message requests for
 	 * Slave insterface S4 (A53 core cluster)